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commit 8e3b064430300bba4ef15e99ddcda3d861e8e264
parent d0e903dac630b5d05e4b21dd90e410540ab55b6d
Author: Paul Kocialkowski <contact@paulk.fr>
Date:   Tue, 19 Apr 2016 18:09:30 +0200

Coreboot, vboot and depthcharge updates to Coreboot 4.3 for CrOS devices

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>

Diffstat:
resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch | 6+++---
resources/depthcharge/patch/0002-Coreboot-image-integration-removal.patch | 6+++---
resources/depthcharge/patch/0003-DOTCONFIG-location-correction.patch | 6+++---
resources/depthcharge/patch/0004-Adaptation-for-a-read-only-boot-path-when-no-vboot-h.patch | 6+++---
resources/depthcharge/patch/0005-Proper-firmware-index-report-for-read-only-boot-path.patch | 70----------------------------------------------------------------------
resources/depthcharge/patch/0005-vboot-Only-initialize-cparams-once.patch | 34++++++++++++++++++++++++++++++++++
resources/depthcharge/patch/0006-Proper-firmware-index-report-for-read-only-boot-path.patch | 70++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/depthcharge/patch/0006-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch | 30------------------------------
resources/depthcharge/patch/0007-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch | 30++++++++++++++++++++++++++++++
resources/depthcharge/patch/0007-vboot-Display-callbacks-for-developer-and-recovery-m.patch | 219-------------------------------------------------------------------------------
resources/depthcharge/patch/0008-vboot-Display-callbacks-for-developer-and-recovery-m.patch | 251+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/config/depthcharge/veyron_speedy/cbrevision | 2+-
resources/libreboot/config/depthcharge/veyron_speedy/config | 53++++++++++++++++++++++++++++++++++++-----------------
resources/libreboot/config/depthcharge/veyron_speedy/vbootrevision | 2+-
resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0001-util-xcompile-Detect-toolchains-with-bare-arm-prefix.patch | 26++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0002-libpayload-use-32bit-access-when-accessing-4byte-wid.patch | 48++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0003-rockchip-rk3288-UART-uses-32bit-wide-registers.patch | 31+++++++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0004-chromeos-Allow-disabling-vboot-firmware-verification.patch | 112+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/depthcharge/veyron_speedy/0001-chromeos-Allow-disabling-vboot-firmware-verification.patch | 98-------------------------------------------------------------------------------
resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch | 33+++++++++++++++++++++++++++++++++
resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0002-firmware-Text-based-screen-display-in-priority.patch | 39+++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch | 91+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0004-firmware-Hold-key-combination-in-developer-mode.patch | 49+++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch | 55+++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0006-firmware-Separate-screen-and-wait-at-device-informat.patch | 79+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0007-firmware-Localization-keys-removal.patch | 53+++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch | 33---------------------------------
resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0002-firmware-Text-based-screen-display-in-priority.patch | 39---------------------------------------
resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch | 79-------------------------------------------------------------------------------
resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0004-firmware-Hold-key-combination-in-developer-mode.patch | 50--------------------------------------------------
resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch | 55-------------------------------------------------------
resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0006-firmware-Separate-screen-and-wait-at-device-informat.patch | 79-------------------------------------------------------------------------------
resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0007-firmware-Localization-keys-removal.patch | 54------------------------------------------------------
resources/scripts/helpers/download/depthcharge | 11+++++++----
resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/blobs.list | 52++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/nonblobs.list | 335+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/nonblobs_notes | 15+++++++++++++++
resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/blobs.list | 52----------------------------------------------------
resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/nonblobs.list | 335-------------------------------------------------------------------------------
resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/nonblobs_notes | 15---------------
resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/blobs.list | 19+++++++++++++++++++
resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/nonblobs.list | 29+++++++++++++++++++++++++++++
resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/nonblobs_notes | 5+++++
resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/blobs.list | 19-------------------
resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/nonblobs.list | 29-----------------------------
resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/nonblobs_notes | 5-----
46 files changed, 1513 insertions(+), 1296 deletions(-)

diff --git a/resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch b/resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch @@ -1,7 +1,7 @@ -From 095ae6281bb2d5bdab288fa042e5c4daa05c5ca3 Mon Sep 17 00:00:00 2001 +From 80e3428c2e50b5a6838d71a89007f610eda5e2dc Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski <contact@paulk.fr> Date: Mon, 3 Aug 2015 14:39:42 +0200 -Subject: [PATCH 1/7] arm: armv7-a march abi flag for ARMv7 hardware +Subject: [PATCH 1/8] arm: armv7-a march abi flag for ARMv7 hardware Specifying the march is required to get depthcharge to build with e.g. the arm toolchain built by coreboot's crossgcc script. Without this flag, the toolchain @@ -26,5 +26,5 @@ index b2fce32..455e370 100644 ifeq ($(CONFIG_ARCH_ARM_V8),y) -- -1.9.1 +2.8.0 diff --git a/resources/depthcharge/patch/0002-Coreboot-image-integration-removal.patch b/resources/depthcharge/patch/0002-Coreboot-image-integration-removal.patch @@ -1,7 +1,7 @@ -From 4e7d727edf1939904bc516d569ceef9e295f454c Mon Sep 17 00:00:00 2001 +From f095d901afe02728fb0471d51e02553036cd2538 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski <contact@paulk.fr> Date: Mon, 3 Aug 2015 14:49:34 +0200 -Subject: [PATCH 2/7] Coreboot image integration removal +Subject: [PATCH 2/8] Coreboot image integration removal There is no need to integrate the built depthcharge binary inside a coreboot image right after building it, coreboot will handle this on its own. @@ -29,5 +29,5 @@ index a73785b..564dd13 100644 $(notdir $1)_unified: $1.bin $1.payload PHONY += $(notdir $1)_unified -- -1.9.1 +2.8.0 diff --git a/resources/depthcharge/patch/0003-DOTCONFIG-location-correction.patch b/resources/depthcharge/patch/0003-DOTCONFIG-location-correction.patch @@ -1,7 +1,7 @@ -From 72bb1a69cf6c0f58d3c1a8f6ba98334640818566 Mon Sep 17 00:00:00 2001 +From dfdcd8c218215df4e1523bf6dd11270bc4f52605 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski <contact@paulk.fr> Date: Sun, 9 Aug 2015 12:06:28 +0200 -Subject: [PATCH 3/7] DOTCONFIG location correction +Subject: [PATCH 3/8] DOTCONFIG location correction The configuration file doesn't have to be in src and HAVE_DOTCONFIG holds its current location. @@ -25,5 +25,5 @@ index a1a9d33..13305cd 100644 ifeq ($(CONFIG_ARCH_X86),y) ARCH = x86 -- -1.9.1 +2.8.0 diff --git a/resources/depthcharge/patch/0004-Adaptation-for-a-read-only-boot-path-when-no-vboot-h.patch b/resources/depthcharge/patch/0004-Adaptation-for-a-read-only-boot-path-when-no-vboot-h.patch @@ -1,7 +1,7 @@ -From 5ad9900434045ea97c536c98cb514bdb43114c12 Mon Sep 17 00:00:00 2001 +From 0ec9edead1d9de5f913333e6aa77bcd3de83a617 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski <contact@paulk.fr> Date: Sun, 9 Aug 2015 12:09:35 +0200 -Subject: [PATCH 4/7] Adaptation for a read-only boot path when no vboot +Subject: [PATCH 4/8] Adaptation for a read-only boot path when no vboot handoff data is found When no vboot handoff data is found, this makes the unified depthcharge build @@ -128,5 +128,5 @@ index 10fcb93..575dcfd 100644 return 0; } -- -1.9.1 +2.8.0 diff --git a/resources/depthcharge/patch/0005-Proper-firmware-index-report-for-read-only-boot-path.patch b/resources/depthcharge/patch/0005-Proper-firmware-index-report-for-read-only-boot-path.patch @@ -1,70 +0,0 @@ -From dce70fb042d91ba74359a6dfb519f31d77e2c328 Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 20:24:50 +0200 -Subject: [PATCH 5/7] Proper firmware index report for read-only boot path - -When booting from a read-only boot path, the active firmware to report is RO. -This is detected with the lack of a vboot handoff pointer. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - src/vboot/crossystem/fdt.c | 2 +- - src/vboot/firmware_id.c | 6 +++++- - src/vboot/firmware_id.h | 1 + - 3 files changed, 7 insertions(+), 2 deletions(-) - -diff --git a/src/vboot/crossystem/fdt.c b/src/vboot/crossystem/fdt.c -index ca39dac..a79b192 100644 ---- a/src/vboot/crossystem/fdt.c -+++ b/src/vboot/crossystem/fdt.c -@@ -73,7 +73,7 @@ static int install_crossystem_data(DeviceTreeFixup *fixup, DeviceTree *tree) - nvstorage_flash_get_blob_size()); - } - -- int fw_index = vdat->firmware_index; -+ int fw_index = get_active_fw_index(vdat); - const char *fwid; - int fwid_size; - -diff --git a/src/vboot/firmware_id.c b/src/vboot/firmware_id.c -index 3662921..955bc84 100644 ---- a/src/vboot/firmware_id.c -+++ b/src/vboot/firmware_id.c -@@ -36,6 +36,7 @@ static struct fwid { - } fw_fmap_ops[] = { - {VDAT_RW_A, "RW_FWID_A", NULL, 0, "RW A: ID NOT FOUND"}, - {VDAT_RW_B, "RW_FWID_B", NULL, 0, "RW B: ID NOT FOUND"}, -+ {VDAT_RO, "RO_FRID", NULL, 0, "RO: ID NOT FOUND"}, - {VDAT_RECOVERY, "RO_FRID", NULL, 0, "RO: ID NOT FOUND"}, - }; - -@@ -130,10 +131,13 @@ static VbSharedDataHeader *get_vdat(void) - return NULL; - } - --static inline int get_active_fw_index(VbSharedDataHeader *vdat) -+int get_active_fw_index(VbSharedDataHeader *vdat) - { - int fw_index = VDAT_UNKNOWN; - -+ if (lib_sysinfo.vboot_handoff == NULL) -+ return VDAT_RO; -+ - if (vdat) - fw_index = vdat->firmware_index; - -diff --git a/src/vboot/firmware_id.h b/src/vboot/firmware_id.h -index fb6f206..090e9d1 100644 ---- a/src/vboot/firmware_id.h -+++ b/src/vboot/firmware_id.h -@@ -49,6 +49,7 @@ int get_rwb_fw_size(void); - * Get firmware details for currently active fw type. It looks up vdat, - * identifies fw_index and returns appropriate id and size for that index. - */ -+int get_active_fw_index(VbSharedDataHeader *vdat); - const char *get_active_fw_id(void); - int get_active_fw_size(void); - --- -1.9.1 - diff --git a/resources/depthcharge/patch/0005-vboot-Only-initialize-cparams-once.patch b/resources/depthcharge/patch/0005-vboot-Only-initialize-cparams-once.patch @@ -0,0 +1,34 @@ +From 40668e8b5fb9a9e07a3b1ddf334bd4e12a38525f Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 18 Apr 2016 11:14:19 +0200 +Subject: [PATCH 5/8] vboot: Only initialize cparams once + +Calling common_params_init multiple times in a row results in emptying cparams +each time, causing the GBB data to be lost as it is only read once (the first +time). + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + src/vboot/util/commonparams.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/src/vboot/util/commonparams.c b/src/vboot/util/commonparams.c +index 9f29473..3a71a8b 100644 +--- a/src/vboot/util/commonparams.c ++++ b/src/vboot/util/commonparams.c +@@ -159,8 +159,10 @@ int is_cparams_initialized(void) + int common_params_init(int clear_shared_data) + { + // Set up the common param structure. +- memset(&cparams, 0, sizeof(cparams)); +- cparams_initialized = 1; ++ if (!is_cparams_initialized()) { ++ memset(&cparams, 0, sizeof(cparams)); ++ cparams_initialized = 1; ++ } + + if (gbb_init()) + return 1; +-- +2.8.0 + diff --git a/resources/depthcharge/patch/0006-Proper-firmware-index-report-for-read-only-boot-path.patch b/resources/depthcharge/patch/0006-Proper-firmware-index-report-for-read-only-boot-path.patch @@ -0,0 +1,70 @@ +From 8acd4854603672dd1bc16900c9eb58dd5c8c342d Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 20:24:50 +0200 +Subject: [PATCH 6/8] Proper firmware index report for read-only boot path + +When booting from a read-only boot path, the active firmware to report is RO. +This is detected with the lack of a vboot handoff pointer. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + src/vboot/crossystem/fdt.c | 2 +- + src/vboot/firmware_id.c | 6 +++++- + src/vboot/firmware_id.h | 1 + + 3 files changed, 7 insertions(+), 2 deletions(-) + +diff --git a/src/vboot/crossystem/fdt.c b/src/vboot/crossystem/fdt.c +index ca39dac..a79b192 100644 +--- a/src/vboot/crossystem/fdt.c ++++ b/src/vboot/crossystem/fdt.c +@@ -73,7 +73,7 @@ static int install_crossystem_data(DeviceTreeFixup *fixup, DeviceTree *tree) + nvstorage_flash_get_blob_size()); + } + +- int fw_index = vdat->firmware_index; ++ int fw_index = get_active_fw_index(vdat); + const char *fwid; + int fwid_size; + +diff --git a/src/vboot/firmware_id.c b/src/vboot/firmware_id.c +index 3662921..955bc84 100644 +--- a/src/vboot/firmware_id.c ++++ b/src/vboot/firmware_id.c +@@ -36,6 +36,7 @@ static struct fwid { + } fw_fmap_ops[] = { + {VDAT_RW_A, "RW_FWID_A", NULL, 0, "RW A: ID NOT FOUND"}, + {VDAT_RW_B, "RW_FWID_B", NULL, 0, "RW B: ID NOT FOUND"}, ++ {VDAT_RO, "RO_FRID", NULL, 0, "RO: ID NOT FOUND"}, + {VDAT_RECOVERY, "RO_FRID", NULL, 0, "RO: ID NOT FOUND"}, + }; + +@@ -130,10 +131,13 @@ static VbSharedDataHeader *get_vdat(void) + return NULL; + } + +-static inline int get_active_fw_index(VbSharedDataHeader *vdat) ++int get_active_fw_index(VbSharedDataHeader *vdat) + { + int fw_index = VDAT_UNKNOWN; + ++ if (lib_sysinfo.vboot_handoff == NULL) ++ return VDAT_RO; ++ + if (vdat) + fw_index = vdat->firmware_index; + +diff --git a/src/vboot/firmware_id.h b/src/vboot/firmware_id.h +index fb6f206..090e9d1 100644 +--- a/src/vboot/firmware_id.h ++++ b/src/vboot/firmware_id.h +@@ -49,6 +49,7 @@ int get_rwb_fw_size(void); + * Get firmware details for currently active fw type. It looks up vdat, + * identifies fw_index and returns appropriate id and size for that index. + */ ++int get_active_fw_index(VbSharedDataHeader *vdat); + const char *get_active_fw_id(void); + int get_active_fw_size(void); + +-- +2.8.0 + diff --git a/resources/depthcharge/patch/0006-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch b/resources/depthcharge/patch/0006-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch @@ -1,30 +0,0 @@ -From 9eb389b0273cf07add859cd162c1411d15806149 Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 20:30:14 +0200 -Subject: [PATCH 6/7] fdt: nonvolatile-context-storage report to mkbp for EC NV - storage - -This allows old versions of crossystem to detect that it should use mosys to -access NV storage in case it is stored on the EC. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - src/vboot/crossystem/fdt.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/vboot/crossystem/fdt.c b/src/vboot/crossystem/fdt.c -index a79b192..0487513 100644 ---- a/src/vboot/crossystem/fdt.c -+++ b/src/vboot/crossystem/fdt.c -@@ -56,7 +56,7 @@ static int install_crossystem_data(DeviceTreeFixup *fixup, DeviceTree *tree) - dt_add_string_prop(node, "nonvolatile-context-storage","nvram"); - } else if (CONFIG_NV_STORAGE_CROS_EC) { - dt_add_string_prop(node, -- "nonvolatile-context-storage", "cros-ec"); -+ "nonvolatile-context-storage", "mkbp"); - } else if (CONFIG_NV_STORAGE_DISK) { - dt_add_string_prop(node, "nonvolatile-context-storage", "disk"); - dt_add_u32_prop(node, "nonvolatile-context-lba", --- -1.9.1 - diff --git a/resources/depthcharge/patch/0007-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch b/resources/depthcharge/patch/0007-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch @@ -0,0 +1,30 @@ +From ff08bf3966b3c299d6ead9707cc17a71ff9e50c7 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 20:30:14 +0200 +Subject: [PATCH 7/8] fdt: nonvolatile-context-storage report to mkbp for EC NV + storage + +This allows old versions of crossystem to detect that it should use mosys to +access NV storage in case it is stored on the EC. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + src/vboot/crossystem/fdt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/vboot/crossystem/fdt.c b/src/vboot/crossystem/fdt.c +index a79b192..0487513 100644 +--- a/src/vboot/crossystem/fdt.c ++++ b/src/vboot/crossystem/fdt.c +@@ -56,7 +56,7 @@ static int install_crossystem_data(DeviceTreeFixup *fixup, DeviceTree *tree) + dt_add_string_prop(node, "nonvolatile-context-storage","nvram"); + } else if (CONFIG_NV_STORAGE_CROS_EC) { + dt_add_string_prop(node, +- "nonvolatile-context-storage", "cros-ec"); ++ "nonvolatile-context-storage", "mkbp"); + } else if (CONFIG_NV_STORAGE_DISK) { + dt_add_string_prop(node, "nonvolatile-context-storage", "disk"); + dt_add_u32_prop(node, "nonvolatile-context-lba", +-- +2.8.0 + diff --git a/resources/depthcharge/patch/0007-vboot-Display-callbacks-for-developer-and-recovery-m.patch b/resources/depthcharge/patch/0007-vboot-Display-callbacks-for-developer-and-recovery-m.patch @@ -1,219 +0,0 @@ -From 541a3f09ecb062e3f0778eb9846732cfabcbfbba Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Tue, 11 Aug 2015 11:22:54 +0200 -Subject: [PATCH 7/7] vboot: Display callbacks for developer and recovery mode - screens - -We don't want to use bitmaps stored in GBB since they recommend the use of non- -free software (Chrome OS), so this implements a text-based interface instead. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - src/vboot/callbacks/display.c | 168 +++++++++++++++++++++++++++++++++++++++--- - 1 file changed, 156 insertions(+), 12 deletions(-) - -diff --git a/src/vboot/callbacks/display.c b/src/vboot/callbacks/display.c -index efa0691..b659f7b 100644 ---- a/src/vboot/callbacks/display.c -+++ b/src/vboot/callbacks/display.c -@@ -84,9 +84,17 @@ void print_on_center(const char *msg) - print_string(msg); - } - --VbError_t VbExDisplayScreen(uint32_t screen_type) -+VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc) - { -- const char *msg = NULL; -+ unsigned int rows, cols; -+ uint32_t boot_signed_only = 0; -+ uint32_t boot_usb = 0; -+ uint32_t boot_legacy = 0; -+ const char *fw_id; -+ int fw_index; -+ void *blob = NULL; -+ int size = 0; -+ char *msg; - - /* - * Show the debug messages for development. It is a backup method -@@ -98,31 +106,167 @@ VbError_t VbExDisplayScreen(uint32_t screen_type) - video_console_clear(); - break; - case VB_SCREEN_DEVELOPER_WARNING: -- msg = "developer mode warning"; -+ video_console_clear(); -+ video_console_set_cursor(0, 0); -+ -+ if (vnc != NULL) { -+ VbNvGet(vnc, VBNV_DEV_BOOT_SIGNED_ONLY, -+ &boot_signed_only); -+ -+ VbNvGet(vnc, VBNV_DEV_BOOT_USB, &boot_usb); -+ VbNvGet(vnc, VBNV_DEV_BOOT_LEGACY, &boot_legacy); -+ } -+ -+ print_string( -+ "Welcome to developer mode!\n\n" -+ "Useful key combinations:\n" -+ "- Ctrl + H: Hold developer mode\n" -+ "- Ctrl + D: Boot from internal storage\n"); -+ -+ if (boot_usb) -+ print_string("- Ctrl + U: Boot from external media\n"); -+ -+ if (boot_legacy) -+ print_string("- Ctrl + L: Boot from legacy payload\n"); -+ -+ print_string( -+ "- Ctrl + I: Show device information\n" -+ "- Space: Disable developer mode\n\n" -+ "This screen is shown for 3 seconds (if not held)." -+ "\n\n"); -+ -+ if (vnc != NULL) { -+ if (!boot_signed_only) -+ print_string( -+ "Warning: this device will boot kernels" -+ " without verifying their signature!" -+ "\n"); -+ -+ if (boot_usb) -+ print_string( -+ "Warning: this device will boot from " -+ "external media!\n"); -+ -+ if (boot_legacy) -+ print_string( -+ "Warning: this device will boot legacy " -+ "payloads!\n"); -+ -+ if (!boot_signed_only || boot_usb) -+ print_string("\n"); -+ } -+ -+ find_common_params(&blob, &size); -+ -+ if (blob != NULL) { -+ VbSharedDataHeader *vdat = (VbSharedDataHeader *) blob; -+ fw_index = get_active_fw_index(vdat); -+ fw_id = get_fw_id(fw_index); -+ -+ if (fw_id == NULL) -+ fw_id = "NOT FOUND"; -+ -+ print_string("Active firmware id: "); -+ print_string(fw_id); -+ -+ switch (fw_index) { -+ case VDAT_RW_A: -+ print_string(" (RW A)\n"); -+ break; -+ case VDAT_RW_B: -+ print_string(" (RW A)\n"); -+ break; -+ case VDAT_RO: -+ print_string(" (RO)\n"); -+ break; -+ default: -+ print_string(" (UNKNOWN)\n"); -+ break; -+ } -+ } - break; - case VB_SCREEN_DEVELOPER_EGG: -- msg = "easter egg"; -+ video_console_clear(); -+ print_on_center("Free as in Freedom!"); - break; - case VB_SCREEN_RECOVERY_REMOVE: -- msg = "remove inserted devices"; -+ video_console_clear(); -+ print_on_center( -+ "Please remove any external media before accessing " -+ "recovery screen."); - break; - case VB_SCREEN_RECOVERY_INSERT: -- msg = "insert recovery image"; -- break; - case VB_SCREEN_RECOVERY_NO_GOOD: -- msg = "insert image invalid"; -+ video_console_clear(); -+ print_string( -+ "Welcome to recovery mode!\n\n" -+ "Useful key combinations:\n" -+ "- Ctrl + D: Enable developer mode (if possible)\n\n"); -+ -+ if (screen_type == VB_SCREEN_RECOVERY_NO_GOOD) -+ print_on_center( -+ "Invalid recovery media, please instert a " -+ "valid one."); -+ else -+ print_on_center( -+ "Please insert an external recovery media."); -+ break; -+ case VB_SCREEN_RECOVERY_TO_DEV: -+ video_console_clear(); -+ video_get_rows_cols(&rows, &cols); -+ -+ video_console_set_cursor(0, 0); -+ -+ print_string( -+ "Enabling developer mode will allow booting unsigned " -+ "kernels and booting from external media (when enabled " -+ "with crossystem).\n\n" -+ "Developer mode can be disabled via the developer mode " -+ "screen."); -+ -+ msg = "Developer mode will be enabled."; -+ video_console_set_cursor((cols - strlen(msg)) / 2, rows / 2); -+ print_string(msg); -+ -+ msg = "Press enter to confirm or escape to go back."; -+ video_console_set_cursor((cols - strlen(msg)) / 2, -+ rows / 2 + 2); -+ print_string(msg); -+ break; -+ case VB_SCREEN_DEVELOPER_TO_NORM: -+ video_console_clear(); -+ video_get_rows_cols(&rows, &cols); -+ -+ video_console_set_cursor(0, 0); -+ -+ print_string( -+ "Disabling developer mode will restrict boot to signed " -+ "kernels stored on internal memory only.\n\n" -+ "Developer mode can be enabled again via the recovery " -+ "mode screen."); -+ -+ msg = "Developer mode will be disabled."; -+ video_console_set_cursor((cols - strlen(msg)) / 2, rows / 2); -+ print_string(msg); -+ -+ msg = "Press enter to confirm or escape to go back."; -+ video_console_set_cursor((cols - strlen(msg)) / 2, -+ rows / 2 + 2); -+ print_string(msg); - break; - case VB_SCREEN_WAIT: -- msg = "wait for ec update"; -+ video_console_clear(); -+ print_on_center("Waiting for EC update..."); -+ break; -+ case VB_SCREEN_TO_NORM_CONFIRMED: -+ video_console_clear(); -+ print_on_center("Disabling developer mode."); - break; - default: - printf("Not a valid screen type: %d.\n", screen_type); - return VBERROR_INVALID_SCREEN_INDEX; - } - -- if (msg) -- print_on_center(msg); -- - return VBERROR_SUCCESS; - } - --- -1.9.1 - diff --git a/resources/depthcharge/patch/0008-vboot-Display-callbacks-for-developer-and-recovery-m.patch b/resources/depthcharge/patch/0008-vboot-Display-callbacks-for-developer-and-recovery-m.patch @@ -0,0 +1,251 @@ +From 50a27cb948d3e944e3e466146b0d81939e8ce9a5 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Tue, 11 Aug 2015 11:22:54 +0200 +Subject: [PATCH 8/8] vboot: Display callbacks for developer and recovery mode + screens + +We don't want to use bitmaps stored in GBB since they recommend the use of non- +free software (Chrome OS), so this implements a text-based interface instead. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + src/vboot/callbacks/display.c | 200 ++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 185 insertions(+), 15 deletions(-) + +diff --git a/src/vboot/callbacks/display.c b/src/vboot/callbacks/display.c +index 183e278..ece9140 100644 +--- a/src/vboot/callbacks/display.c ++++ b/src/vboot/callbacks/display.c +@@ -86,12 +86,19 @@ void print_on_center(const char *msg) + print_string(msg); + } + +-VbError_t VbExDisplayScreen(uint32_t screen_type, uint32_t locale) ++VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc, ++ uint32_t locale) + { +- const char *msg = NULL; +- +- if (vboot_draw_screen(screen_type, locale) == CBGFX_SUCCESS) +- return VBERROR_SUCCESS; ++ unsigned int rows, cols; ++ uint32_t default_boot = 0; ++ uint32_t boot_signed_only = 0; ++ uint32_t boot_usb = 0; ++ uint32_t boot_legacy = 0; ++ const char *fw_id; ++ int fw_index; ++ void *blob = NULL; ++ int size = 0; ++ char *msg; + + /* + * Show the debug messages for development. It is a backup method +@@ -103,31 +110,194 @@ VbError_t VbExDisplayScreen(uint32_t screen_type, uint32_t locale) + video_console_clear(); + break; + case VB_SCREEN_DEVELOPER_WARNING: +- msg = "developer mode warning"; ++ video_console_clear(); ++ video_console_set_cursor(0, 0); ++ ++ if (vnc != NULL) { ++ VbNvGet(vnc, VBNV_DEV_BOOT_SIGNED_ONLY, ++ &boot_signed_only); ++ ++ VbNvGet(vnc, VBNV_DEV_BOOT_USB, &boot_usb); ++ VbNvGet(vnc, VBNV_DEV_BOOT_LEGACY, &boot_legacy); ++ ++ VbNvGet(vnc, VBNV_DEV_DEFAULT_BOOT, &default_boot); ++ } ++ ++ print_string( ++ "Welcome to developer mode!\n\n" ++ "Useful key combinations:\n" ++ "- Ctrl + H: Hold developer mode\n" ++ "- Ctrl + D: Boot from internal storage\n"); ++ ++ if (boot_usb) ++ print_string("- Ctrl + U: Boot from external media\n"); ++ ++ if (boot_legacy) ++ print_string("- Ctrl + L: Boot from legacy payload\n"); ++ ++ print_string( ++ "- Ctrl + I: Show device information\n" ++ "- Space: Disable developer mode\n\n" ++ "This screen is shown for 3 seconds (if not held)." ++ "\n\n"); ++ ++ if (vnc != NULL) { ++ if (!boot_signed_only) ++ print_string( ++ "Warning: this device will boot kernels" ++ " without verifying their signature!" ++ "\n"); ++ ++ if (boot_usb) ++ print_string( ++ "Warning: this device will boot from " ++ "external media!\n"); ++ ++ if (boot_legacy) ++ print_string( ++ "Warning: this device will boot legacy " ++ "payloads!\n"); ++ ++ if (!boot_signed_only || boot_usb) ++ print_string("\n"); ++ ++ print_string("Default boot medium: "); ++ ++ switch (default_boot) { ++ case VBNV_DEV_DEFAULT_BOOT_DISK: ++ print_string("internal storage"); ++ break; ++ case VBNV_DEV_DEFAULT_BOOT_USB: ++ print_string("external media"); ++ break; ++ case VBNV_DEV_DEFAULT_BOOT_LEGACY: ++ print_string("legacy payload"); ++ break; ++ default: ++ print_string("unknown"); ++ break; ++ } ++ ++ print_string("\n"); ++ } ++ ++ find_common_params(&blob, &size); ++ ++ if (blob != NULL) { ++ VbSharedDataHeader *vdat = (VbSharedDataHeader *) blob; ++ fw_index = get_active_fw_index(vdat); ++ fw_id = get_fw_id(fw_index); ++ ++ if (fw_id == NULL) ++ fw_id = "NOT FOUND"; ++ ++ print_string("Active firmware id: "); ++ print_string(fw_id); ++ ++ switch (fw_index) { ++ case VDAT_RW_A: ++ print_string(" (RW A)\n"); ++ break; ++ case VDAT_RW_B: ++ print_string(" (RW A)\n"); ++ break; ++ case VDAT_RO: ++ print_string(" (RO)\n"); ++ break; ++ default: ++ print_string(" (UNKNOWN)\n"); ++ break; ++ } ++ } + break; + case VB_SCREEN_DEVELOPER_EGG: +- msg = "easter egg"; ++ video_console_clear(); ++ print_on_center("Free as in Freedom!"); + break; + case VB_SCREEN_RECOVERY_REMOVE: +- msg = "remove inserted devices"; ++ video_console_clear(); ++ print_on_center( ++ "Please remove any external media before accessing " ++ "recovery screen."); + break; + case VB_SCREEN_RECOVERY_INSERT: +- msg = "insert recovery image"; +- break; + case VB_SCREEN_RECOVERY_NO_GOOD: +- msg = "insert image invalid"; ++ video_console_clear(); ++ print_string( ++ "Welcome to recovery mode!\n\n" ++ "Useful key combinations:\n" ++ "- Ctrl + D: Enable developer mode (if possible)\n\n"); ++ ++ if (screen_type == VB_SCREEN_RECOVERY_NO_GOOD) ++ print_on_center( ++ "Invalid recovery media, please instert a " ++ "valid one."); ++ else ++ print_on_center( ++ "Please insert an external recovery media."); ++ break; ++ case VB_SCREEN_RECOVERY_TO_DEV: ++ video_console_clear(); ++ video_get_rows_cols(&rows, &cols); ++ ++ video_console_set_cursor(0, 0); ++ ++ print_string( ++ "Enabling developer mode will allow booting unsigned " ++ "kernels and booting from external media (when enabled " ++ "with crossystem).\n\n" ++ "Developer mode can be disabled via the developer mode " ++ "screen."); ++ ++ msg = "Developer mode will be enabled."; ++ video_console_set_cursor((cols - strlen(msg)) / 2, rows / 2); ++ print_string(msg); ++ ++ msg = "Press enter to confirm or escape to go back."; ++ video_console_set_cursor((cols - strlen(msg)) / 2, ++ rows / 2 + 2); ++ print_string(msg); ++ break; ++ case VB_SCREEN_DEVELOPER_TO_NORM: ++ video_console_clear(); ++ video_get_rows_cols(&rows, &cols); ++ ++ video_console_set_cursor(0, 0); ++ ++ print_string( ++ "Disabling developer mode will restrict boot to signed " ++ "kernels stored on internal memory only.\n\n" ++ "Developer mode can be enabled again via the recovery " ++ "mode screen."); ++ ++ msg = "Developer mode will be disabled."; ++ video_console_set_cursor((cols - strlen(msg)) / 2, rows / 2); ++ print_string(msg); ++ ++ msg = "Press enter to confirm or escape to go back."; ++ video_console_set_cursor((cols - strlen(msg)) / 2, ++ rows / 2 + 2); ++ print_string(msg); + break; + case VB_SCREEN_WAIT: +- msg = "wait for ec update"; ++ video_console_clear(); ++ print_on_center("Waiting for EC update..."); ++ break; ++ case VB_SCREEN_TO_NORM_CONFIRMED: ++ video_console_clear(); ++ print_on_center("Disabling developer mode."); ++ break; ++ case VB_SCREEN_OS_BROKEN: ++ video_console_clear(); ++ print_on_center( ++ "Something went wrong and the device cannot boot.\n" ++ "Press Escape + Refresh + Power to access recovery."); + break; + default: + printf("Not a valid screen type: %d.\n", screen_type); + return VBERROR_INVALID_SCREEN_INDEX; + } + +- if (msg) +- print_on_center(msg); +- + return VBERROR_SUCCESS; + } + +-- +2.8.0 + diff --git a/resources/libreboot/config/depthcharge/veyron_speedy/cbrevision b/resources/libreboot/config/depthcharge/veyron_speedy/cbrevision @@ -1 +1 @@ -33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f +1bf5e6409678d04fd15f9625460078853118521c diff --git a/resources/libreboot/config/depthcharge/veyron_speedy/config b/resources/libreboot/config/depthcharge/veyron_speedy/config @@ -9,7 +9,7 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMMON_CBFS_SPI_WRAPPER=y -# CONFIG_MULTIPLE_CBFS_INSTANCES is not set +CONFIG_MULTIPLE_CBFS_INSTANCES=y CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set # CONFIG_ANY_TOOLCHAIN is not set @@ -29,12 +29,14 @@ CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION=y CONFIG_FLASHMAP_OFFSET=0x100000 CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set +# CONFIG_BOOTBLOCK_CUSTOM is not set CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" -# CONFIG_SKIP_MAX_REBOOT_CNT_CLEAR is not set +CONFIG_C_ENVIRONMENT_BOOTBLOCK=y # CONFIG_UPDATE_IMAGE is not set CONFIG_GENERIC_GPIO_LIB=y CONFIG_BOARD_ID_AUTO=y CONFIG_RAM_CODE_SUPPORT=y +# CONFIG_BOOTSPLASH_IMAGE is not set # CONFIG_ACPI_SATA_GENERATOR is not set # @@ -48,7 +50,6 @@ CONFIG_RAM_CODE_SUPPORT=y # CONFIG_VENDOR_AMD is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set -# CONFIG_VENDOR_ARIMA is not set # CONFIG_VENDOR_ARTECGROUP is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set @@ -66,13 +67,13 @@ CONFIG_RAM_CODE_SUPPORT=y # CONFIG_VENDOR_DMP is not set # CONFIG_VENDOR_ECS is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ESD is not set # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GIZMOSPHERE is not set CONFIG_VENDOR_GOOGLE=y # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set -# CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_IEI is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_IWAVE is not set @@ -86,11 +87,11 @@ CONFIG_VENDOR_GOOGLE=y # CONFIG_VENDOR_MITAC is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_NEC is not set -# CONFIG_VENDOR_NEWISYS is not set # CONFIG_VENDOR_NOKIA is not set # CONFIG_VENDOR_NVIDIA is not set # CONFIG_VENDOR_PACKARDBELL is not set # CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PURISM is not set # CONFIG_VENDOR_RCA is not set # CONFIG_VENDOR_RODA is not set # CONFIG_VENDOR_SAMSUNG is not set @@ -115,22 +116,30 @@ CONFIG_MAX_CPUS=1 # CONFIG_VGA_BIOS is not set CONFIG_UDELAY_IO=y CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y +CONFIG_MAX_REBOOT_CNT=3 CONFIG_UART_FOR_CONSOLE=0 CONFIG_ID_SECTION_OFFSET=0x80 +CONFIG_CACHE_ROM_SIZE_OVERRIDE=0 +CONFIG_CBFS_SIZE=0x100000 +CONFIG_POST_DEVICE=y # CONFIG_BOARD_GOOGLE_AURON is not set # CONFIG_BOARD_GOOGLE_BOLT is not set # CONFIG_BOARD_GOOGLE_BUTTERFLY is not set +# CONFIG_BOARD_GOOGLE_CHELL is not set # CONFIG_BOARD_GOOGLE_COSMOS is not set # CONFIG_BOARD_GOOGLE_CYAN is not set # CONFIG_BOARD_GOOGLE_DAISY is not set # CONFIG_BOARD_GOOGLE_FALCO is not set # CONFIG_BOARD_GOOGLE_FOSTER is not set # CONFIG_BOARD_GOOGLE_GLADOS is not set +# CONFIG_BOARD_GOOGLE_GUADO is not set # CONFIG_BOARD_GOOGLE_JECHT is not set +# CONFIG_BOARD_GOOGLE_LARS is not set # CONFIG_BOARD_GOOGLE_LINK is not set # CONFIG_BOARD_GOOGLE_NYAN is not set # CONFIG_BOARD_GOOGLE_NYAN_BIG is not set # CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set +# CONFIG_BOARD_GOOGLE_OAK is not set # CONFIG_BOARD_GOOGLE_PANTHER is not set # CONFIG_BOARD_GOOGLE_PARROT is not set # CONFIG_BOARD_GOOGLE_PEACH_PIT is not set @@ -144,6 +153,7 @@ CONFIG_ID_SECTION_OFFSET=0x80 # CONFIG_BOARD_GOOGLE_SMAUG is not set # CONFIG_BOARD_GOOGLE_STORM is not set # CONFIG_BOARD_GOOGLE_STOUT is not set +# CONFIG_BOARD_GOOGLE_TIDUS is not set # CONFIG_BOARD_GOOGLE_URARA is not set # CONFIG_BOARD_GOOGLE_VEYRON_GUS is not set # CONFIG_BOARD_GOOGLE_VEYRON_JAQ is not set @@ -157,6 +167,7 @@ CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY=y # CONFIG_BOARD_GOOGLE_VEYRON_THEA is not set # CONFIG_BOARD_GOOGLE_VEYRON_BRAIN is not set # CONFIG_BOARD_GOOGLE_VEYRON_DANGER is not set +# CONFIG_BOARD_GOOGLE_VEYRON_EMILE is not set # CONFIG_BOARD_GOOGLE_VEYRON_MICKEY is not set # CONFIG_BOARD_GOOGLE_VEYRON_RIALTO is not set # CONFIG_BOARD_GOOGLE_VEYRON_ROMY is not set @@ -169,11 +180,9 @@ CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF690000 CONFIG_BOARD_GOOGLE_VEYRON=y CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=100 CONFIG_PMIC_BUS=0 -CONFIG_CBFS_SIZE=0x100000 -CONFIG_CACHE_ROM_SIZE_OVERRIDE=0 -CONFIG_POST_DEVICE=y CONFIG_CPU_ADDR_BITS=36 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +# CONFIG_NO_POST is not set CONFIG_BOARD_ROMSIZE_KB_4096=y # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set @@ -187,7 +196,9 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set CONFIG_COREBOOT_ROMSIZE_KB=4096 CONFIG_ROM_SIZE=0x400000 -# CONFIG_SYSTEM_TYPE_LAPTOP is not set +CONFIG_FMDFILE="src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" +CONFIG_SYSTEM_TYPE_LAPTOP=y +# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set # # Chipset @@ -197,10 +208,10 @@ CONFIG_ROM_SIZE=0x400000 # SoC # # CONFIG_SOC_BROADCOM_CYGNUS is not set -CONFIG_BOOTBLOCK_CPU_INIT="soc/rockchip/rk3288/bootblock.c" CONFIG_TTYS0_BASE=0x3f8 CONFIG_HEAP_SIZE=0x4000 # CONFIG_SOC_MARVELL_BG4CD is not set +# CONFIG_SOC_MEDIATEK_MT8173 is not set # CONFIG_SOC_NVIDIA_TEGRA124 is not set # CONFIG_SOC_NVIDIA_TEGRA132 is not set # CONFIG_SOC_NVIDIA_TEGRA210 is not set @@ -232,12 +243,15 @@ CONFIG_NUM_IPI_STARTS=2 # CONFIG_TSC_SYNC_MFENCE is not set CONFIG_LOGICAL_CPUS=y # CONFIG_SMM_TSEG is not set +# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set +# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set # CONFIG_X86_AMD_FIXED_MTRRS is not set # CONFIG_PLATFORM_USES_FSP1_0 is not set # CONFIG_PARALLEL_MP is not set # CONFIG_BACKUP_DEFAULT_SMM_REGION is not set # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set # CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set +# CONFIG_USES_MICROCODE_HEADER_FILES is not set # # Northbridge @@ -290,6 +304,7 @@ CONFIG_VIRTUAL_DEV_SWITCH=y # CONFIG_PHYSICAL_REC_SWITCH is not set # CONFIG_LID_SWITCH is not set # CONFIG_WIPEOUT_SUPPORTED is not set +# CONFIG_HAVE_REGULATORY_DOMAIN is not set # CONFIG_UEFI_2_4_BINDING is not set CONFIG_ARCH_ARM=y CONFIG_ARCH_BOOTBLOCK_ARM=y @@ -306,7 +321,6 @@ CONFIG_ARCH_ROMSTAGE_ARMV7=y CONFIG_ARCH_RAMSTAGE_ARMV7=y # CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set # CONFIG_ARCH_VERSTAGE_ARMV7_M is not set -# CONFIG_ARM_BOOTBLOCK_CUSTOM is not set # CONFIG_ARM_LPAE is not set # CONFIG_ARCH_ARM64 is not set # CONFIG_ARCH_BOOTBLOCK_ARM64 is not set @@ -317,7 +331,6 @@ CONFIG_ARCH_RAMSTAGE_ARMV7=y # CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set # CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set # CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set -# CONFIG_ARM64_BOOTBLOCK_CUSTOM is not set # CONFIG_ARM64_A53_ERRATUM_843419 is not set # CONFIG_ARCH_MIPS is not set # CONFIG_ARCH_BOOTBLOCK_MIPS is not set @@ -329,7 +342,6 @@ CONFIG_ARCH_RAMSTAGE_ARMV7=y # CONFIG_ARCH_VERSTAGE_RISCV is not set # CONFIG_ARCH_ROMSTAGE_RISCV is not set # CONFIG_ARCH_RAMSTAGE_RISCV is not set -# CONFIG_RISCV_BOOTBLOCK_CUSTOM is not set # CONFIG_ARCH_X86 is not set # CONFIG_ARCH_BOOTBLOCK_X86_32 is not set # CONFIG_ARCH_VERSTAGE_X86_32 is not set @@ -353,6 +365,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y CONFIG_NATIVE_VGA_INIT_USE_EDID=y # CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is not set # CONFIG_MULTIPLE_VGA_ADAPTERS is not set +# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set # CONFIG_SPD_CACHE is not set # CONFIG_PCI is not set # CONFIG_PXE_ROM is not set @@ -386,8 +399,6 @@ CONFIG_I2C_TPM=y # CONFIG_DRIVERS_LENOVO_WACOM is not set # CONFIG_DRIVER_MAXIM_MAX77686 is not set # CONFIG_DRIVER_PARADE_PS8625 is not set -CONFIG_TPM_INIT_FAILURE_IS_FATAL=y -CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT=y # CONFIG_DRIVERS_RICOH_RCE822 is not set # CONFIG_DRIVERS_SIL_3114 is not set CONFIG_SPI_FLASH=y @@ -427,6 +438,10 @@ CONFIG_CONSOLE_SERIAL=y # # device-specific UART # + +# +# Serial port base address = 0x3f8 +# CONFIG_CONSOLE_SERIAL_115200=y # CONFIG_CONSOLE_SERIAL_57600 is not set # CONFIG_CONSOLE_SERIAL_38400 is not set @@ -446,13 +461,16 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set -# CONFIG_NO_POST is not set # CONFIG_CONSOLE_POST is not set CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set +# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set # CONFIG_HAVE_ACPI_RESUME is not set CONFIG_HAVE_HARD_RESET=y +# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set CONFIG_HAVE_MONOTONIC_TIMER=y CONFIG_GENERIC_UDELAY=y # CONFIG_TIMER_QUEUE is not set @@ -465,6 +483,7 @@ CONFIG_GENERIC_UDELAY=y # CONFIG_VGA is not set # CONFIG_GFXUMA is not set # CONFIG_COMMON_FADT is not set +# CONFIG_ACPI_NHLT is not set # # System tables @@ -500,10 +519,10 @@ CONFIG_COMPRESSED_PAYLOAD_LZMA=y # CONFIG_TRACE is not set # CONFIG_ENABLE_APIC_EXT_ID is not set CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_IASL_WARNINGS_ARE_ERRORS=y # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set # CONFIG_POWER_BUTTON_FORCE_ENABLE is not set # CONFIG_POWER_BUTTON_FORCE_DISABLE is not set # CONFIG_POWER_BUTTON_IS_OPTIONAL is not set # CONFIG_REG_SCRIPT is not set -CONFIG_MAX_REBOOT_CNT=3 diff --git a/resources/libreboot/config/depthcharge/veyron_speedy/vbootrevision b/resources/libreboot/config/depthcharge/veyron_speedy/vbootrevision @@ -1 +1 @@ -fbf631c845c08299f0bcbae3f311c5807d34c0d6 +933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7 diff --git a/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0001-util-xcompile-Detect-toolchains-with-bare-arm-prefix.patch b/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0001-util-xcompile-Detect-toolchains-with-bare-arm-prefix.patch @@ -0,0 +1,26 @@ +From 1a378294fa9afdc4d6d3b0e580ba78d33a62d044 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Tue, 19 Apr 2016 12:02:14 +0200 +Subject: [PATCH 1/4] util: xcompile: Detect toolchains with bare arm prefix + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + util/xcompile/xcompile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile +index b0199eb..1765183 100755 +--- a/util/xcompile/xcompile ++++ b/util/xcompile/xcompile +@@ -290,7 +290,7 @@ SUPPORTED_ARCHITECTURES="arm arm64 mipsel riscv x64 x86 power8" + arch_config_arm() { + TARCH="arm" + TBFDARCHS="littlearm" +- TCLIST="armv7-a armv7a" ++ TCLIST="armv7-a armv7a arm" + TWIDTH="32" + TSUPP="arm armv4 armv7 armv7_m" + TABI="eabi" +-- +2.8.0 + diff --git a/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0002-libpayload-use-32bit-access-when-accessing-4byte-wid.patch b/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0002-libpayload-use-32bit-access-when-accessing-4byte-wid.patch @@ -0,0 +1,48 @@ +From be5ba870e006e8e7fe0f1ace2952b540c3aec3d9 Mon Sep 17 00:00:00 2001 +From: Patrick Georgi <pgeorgi@chromium.org> +Date: Mon, 8 Feb 2016 21:17:12 +0100 +Subject: [PATCH 2/4] libpayload: use 32bit access when accessing 4byte wide + uart registers + +This fixes serial on rk3288. + +Change-Id: I3dbf3cc165e516ed7b0132332624f882c0c9b27f +Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> +Reviewed-on: https://review.coreboot.org/13636 +Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> +Tested-by: build bot (Jenkins) +--- + payloads/libpayload/drivers/serial/8250.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/payloads/libpayload/drivers/serial/8250.c b/payloads/libpayload/drivers/serial/8250.c +index 7fe9920..0386f23 100644 +--- a/payloads/libpayload/drivers/serial/8250.c ++++ b/payloads/libpayload/drivers/serial/8250.c +@@ -46,7 +46,10 @@ static uint8_t serial_read_reg(int offset) + return inb(IOBASE + offset); + else + #endif +- return readb(MEMBASE + offset); ++ if (lib_sysinfo.serial->regwidth == 4) ++ return readl(MEMBASE + offset) & 0xff; ++ else ++ return readb(MEMBASE + offset); + } + + static void serial_write_reg(uint8_t val, int offset) +@@ -58,7 +61,10 @@ static void serial_write_reg(uint8_t val, int offset) + outb(val, IOBASE + offset); + else + #endif +- writeb(val, MEMBASE + offset); ++ if (lib_sysinfo.serial->regwidth == 4) ++ writel(val & 0xff, MEMBASE + offset); ++ else ++ writeb(val, MEMBASE + offset); + } + + #if IS_ENABLED(CONFIG_LP_SERIAL_SET_SPEED) +-- +2.8.0 + diff --git a/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0003-rockchip-rk3288-UART-uses-32bit-wide-registers.patch b/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0003-rockchip-rk3288-UART-uses-32bit-wide-registers.patch @@ -0,0 +1,31 @@ +From 02bc24a863a9b580d5eb32b780296ff8a5c3d2c1 Mon Sep 17 00:00:00 2001 +From: Patrick Georgi <pgeorgi@chromium.org> +Date: Mon, 8 Feb 2016 20:28:32 +0100 +Subject: [PATCH 3/4] rockchip/rk3288: UART uses 32bit wide registers + +Change-Id: I084eb4694a2aa8f66afc1f3148480608ac3ff02b +Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> +Reviewed-on: https://review.coreboot.org/13635 +Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> +Tested-by: build bot (Jenkins) +Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> +--- + src/soc/rockchip/rk3288/uart.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/soc/rockchip/rk3288/uart.c b/src/soc/rockchip/rk3288/uart.c +index 9847734..8576dc1 100644 +--- a/src/soc/rockchip/rk3288/uart.c ++++ b/src/soc/rockchip/rk3288/uart.c +@@ -155,7 +155,7 @@ void uart_fill_lb(void *data) + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS; + serial.baud = default_baudrate(); +- serial.regwidth = 1; ++ serial.regwidth = 4; + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +-- +2.8.0 + diff --git a/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0004-chromeos-Allow-disabling-vboot-firmware-verification.patch b/resources/libreboot/patch/coreboot/1bf5e6409678d04fd15f9625460078853118521c/depthcharge/veyron_speedy/0004-chromeos-Allow-disabling-vboot-firmware-verification.patch @@ -0,0 +1,112 @@ +From 1122f7a00ad7b9cab11a548ed2ba24536bfc194e Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Sun, 9 Aug 2015 10:23:38 +0200 +Subject: [PATCH 4/4] chromeos: Allow disabling vboot firmware verification + when ChromeOS is enabled + +Some ChromeOS bindings might be wanted without using vboot verification, for +instance to boot up depthcharge from the version of Coreboot installed in the +write-protected part of the SPI flash (without jumping to a RW firmware). + +Vboot firmware verification is still selected by default when ChromeOS is +enabled, but this allows more flexibility since vboot firmware verification is +no longer a hard requirement for ChromeOS (that this particular use case still +allows booting ChromeOS). + +In the future, it would make sense to have all the separate components that +CONFIG_CHROMEOS enables have their own config options, so that they can be +enabled separately. + +Change-Id: Ia4057a56838aa05dcf3cb250ae1a27fd91402ddb +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + src/lib/bootmode.c | 2 ++ + src/soc/rockchip/rk3288/Kconfig | 2 +- + src/vendorcode/google/chromeos/Kconfig | 4 +--- + src/vendorcode/google/chromeos/vboot2/Kconfig | 4 ++++ + 4 files changed, 8 insertions(+), 4 deletions(-) + +diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c +index 15f7a5a..e4be29e 100644 +--- a/src/lib/bootmode.c ++++ b/src/lib/bootmode.c +@@ -76,8 +76,10 @@ void gfx_set_init_done(int done) + int display_init_required(void) + { + /* For Chrome OS always honor vboot_skip_display_init(). */ ++#if CONFIG_VBOOT_VERIFY_FIRMWARE + if (IS_ENABLED(CONFIG_CHROMEOS)) + return !vboot_skip_display_init(); ++#endif + + /* By default always initialize display. */ + return 1; +diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig +index 65e6dc3..7947514 100644 +--- a/src/soc/rockchip/rk3288/Kconfig ++++ b/src/soc/rockchip/rk3288/Kconfig +@@ -31,7 +31,7 @@ config SOC_ROCKCHIP_RK3288 + + if SOC_ROCKCHIP_RK3288 + +-config CHROMEOS ++config VBOOT_VERIFY_FIRMWARE + select VBOOT_STARTS_IN_BOOTBLOCK + select SEPARATE_VERSTAGE + select RETURN_FROM_VERSTAGE +diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig +index d2a42a1..4068419 100644 +--- a/src/vendorcode/google/chromeos/Kconfig ++++ b/src/vendorcode/google/chromeos/Kconfig +@@ -27,7 +27,6 @@ config CHROMEOS + select BOOTMODE_STRAPS + select ELOG if SPI_FLASH + select COLLECT_TIMESTAMPS +- select VBOOT_VERIFY_FIRMWARE + select MULTIPLE_CBFS_INSTANCES + help + Enable ChromeOS specific features like the GPIO sub table in +@@ -96,7 +95,6 @@ config CHROMEOS_RAMOOPS_RAM_SIZE + config EC_SOFTWARE_SYNC + bool "Enable EC software sync" + default n +- depends on VBOOT_VERIFY_FIRMWARE + help + EC software sync is a mechanism where the AP helps the EC verify its + firmware similar to how vboot verifies the main system firmware. This +@@ -120,12 +118,12 @@ config VBOOT_OPROM_MATTERS + config VIRTUAL_DEV_SWITCH + bool "Virtual developer switch support" + default n +- depends on VBOOT_VERIFY_FIRMWARE + help + Whether this platform has a virtual developer switch. + + config VBOOT_VERIFY_FIRMWARE + bool "Verify firmware with vboot." ++ default y if CHROMEOS + default n + depends on HAVE_HARD_RESET + help +diff --git a/src/vendorcode/google/chromeos/vboot2/Kconfig b/src/vendorcode/google/chromeos/vboot2/Kconfig +index 7580d8d..141b636 100644 +--- a/src/vendorcode/google/chromeos/vboot2/Kconfig ++++ b/src/vendorcode/google/chromeos/vboot2/Kconfig +@@ -12,6 +12,8 @@ + ## GNU General Public License for more details. + ## + ++if VBOOT_VERIFY_FIRMWARE ++ + config VBOOT_STARTS_IN_BOOTBLOCK + bool "Vboot starts verifying in bootblock" + default n +@@ -78,3 +80,5 @@ config VBOOT_DYNAMIC_WORK_BUFFER + ram to allocate the vboot work buffer. That means vboot verification + is after memory init and requires main memory to back the work + buffer. ++ ++endif # VBOOT_VERIFY_FIRMWARE +-- +2.8.0 + diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/depthcharge/veyron_speedy/0001-chromeos-Allow-disabling-vboot-firmware-verification.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/depthcharge/veyron_speedy/0001-chromeos-Allow-disabling-vboot-firmware-verification.patch @@ -1,98 +0,0 @@ -From 2178bea1fbef28afbb9ffa2d95673407fac1907e Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Sun, 9 Aug 2015 10:23:38 +0200 -Subject: [PATCH] chromeos: Allow disabling vboot firmware verification when - ChromeOS is enabled - -Some ChromeOS bindings might be wanted without using vboot verification, for -instance to boot up depthcharge from the version of Coreboot installed in the -write-protected part of the SPI flash (without jumping to a RW firmware). - -Vboot firmware verification is still selected by default when ChromeOS is -enabled, but this allows more flexibility since vboot firmware verification is -no longer a hard requirement for ChromeOS (that this particular use case still -allows booting ChromeOS). - -In the future, it would make sense to have all the separate components that -CONFIG_CHROMEOS enables have their own config options, so that they can be -enabled separately. - -Change-Id: Ia4057a56838aa05dcf3cb250ae1a27fd91402ddb -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - src/lib/bootmode.c | 2 ++ - src/soc/rockchip/rk3288/Kconfig | 2 +- - src/vendorcode/google/chromeos/Kconfig | 2 +- - src/vendorcode/google/chromeos/vboot2/Kconfig | 4 ++++ - 4 files changed, 8 insertions(+), 2 deletions(-) - -diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c -index f2ff72a..13c0130 100644 ---- a/src/lib/bootmode.c -+++ b/src/lib/bootmode.c -@@ -80,8 +80,10 @@ void gfx_set_init_done(int done) - int display_init_required(void) - { - /* For Chrome OS always honor vboot_skip_display_init(). */ -+#if CONFIG_VBOOT_VERIFY_FIRMWARE - if (IS_ENABLED(CONFIG_CHROMEOS)) - return !vboot_skip_display_init(); -+#endif - - /* By default always initialize display. */ - return 1; -diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig -index bc484e3..74a63e7 100644 ---- a/src/soc/rockchip/rk3288/Kconfig -+++ b/src/soc/rockchip/rk3288/Kconfig -@@ -35,7 +35,7 @@ config SOC_ROCKCHIP_RK3288 - - if SOC_ROCKCHIP_RK3288 - --config CHROMEOS -+config VBOOT_VERIFY_FIRMWARE - select VBOOT_STARTS_IN_BOOTBLOCK - select SEPARATE_VERSTAGE - select RETURN_FROM_VERSTAGE -diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig -index 8309d19..694e0d7 100644 ---- a/src/vendorcode/google/chromeos/Kconfig -+++ b/src/vendorcode/google/chromeos/Kconfig -@@ -31,7 +31,6 @@ config CHROMEOS - select BOOTMODE_STRAPS - select ELOG - select COLLECT_TIMESTAMPS -- select VBOOT_VERIFY_FIRMWARE - help - Enable ChromeOS specific features like the GPIO sub table in - the coreboot table. NOTE: Enabling this option on an unsupported -@@ -129,6 +128,7 @@ config VIRTUAL_DEV_SWITCH - - config VBOOT_VERIFY_FIRMWARE - bool "Verify firmware with vboot." -+ default y if CHROMEOS - default n - depends on HAVE_HARD_RESET - help -diff --git a/src/vendorcode/google/chromeos/vboot2/Kconfig b/src/vendorcode/google/chromeos/vboot2/Kconfig -index 930b009..610a847 100644 ---- a/src/vendorcode/google/chromeos/vboot2/Kconfig -+++ b/src/vendorcode/google/chromeos/vboot2/Kconfig -@@ -16,6 +16,8 @@ - ## Foundation, Inc. - ## - -+if VBOOT_VERIFY_FIRMWARE -+ - config VBOOT_STARTS_IN_BOOTBLOCK - bool "Vboot starts verifying in bootblock" - default n -@@ -133,3 +135,5 @@ config VBOOT_DYNAMIC_WORK_BUFFER - ram to allocate the vboot work buffer. That means vboot verification - is after memory init and requires main memory to back the work - buffer. -+ -+endif # VBOOT_VERIFY_FIRMWARE --- -1.9.1 - diff --git a/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch b/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch @@ -0,0 +1,33 @@ +From fe4c243dac0d308746c0103aa22b5e6f29dd494c Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 20:33:23 +0200 +Subject: [PATCH 1/7] firmware: Developer mode timeout delay shortening (down + to 3 seconds) + +A timeout delay of 3 seconds, with no bip, is much more appreciable for users. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + firmware/lib/vboot_audio.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/firmware/lib/vboot_audio.c b/firmware/lib/vboot_audio.c +index 6071b0d..fd03bfd 100644 +--- a/firmware/lib/vboot_audio.c ++++ b/firmware/lib/vboot_audio.c +@@ -30,11 +30,7 @@ + #define MAX_CUSTOM_DELAY 300000 + + /* These are visible externally only to make testing easier */ +-VbDevMusicNote default_notes_[] = { {20000, 0}, /* 20 seconds */ +- {250, 400}, /* two beeps */ +- {250, 0}, +- {250, 400}, +- {9250, 0} }; /* total 30 seconds */ ++VbDevMusicNote default_notes_[] = { {3000, 0} }; /* three seconds */ + uint32_t default_count_ = sizeof(default_notes_) / sizeof(VbDevMusicNote); + + VbDevMusicNote short_notes_[] = { {2000, 0} }; /* two seconds */ +-- +2.8.0 + diff --git a/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0002-firmware-Text-based-screen-display-in-priority.patch b/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0002-firmware-Text-based-screen-display-in-priority.patch @@ -0,0 +1,39 @@ +From b3b529bec8f07557632510663a350f6d2abbe742 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 22:44:50 +0200 +Subject: [PATCH 2/7] firmware: Text-based screen display in priority + +This allows showing text-based screen displays before looking at the GBB bitmaps +since those encourage the use of non-free software (Chrome OS) and don't display +enough information to the user. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + firmware/lib/vboot_display.c | 9 ++++----- + 1 file changed, 4 insertions(+), 5 deletions(-) + +diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c +index f2978fb..b95a1eb 100644 +--- a/firmware/lib/vboot_display.c ++++ b/firmware/lib/vboot_display.c +@@ -339,13 +339,12 @@ static VbError_t VbDisplayScreenLegacy(VbCommonParams *cparams, uint32_t screen, + /* Request the screen */ + disp_current_screen = screen; + +- /* Look in the GBB first */ +- if (VBERROR_SUCCESS == VbDisplayScreenFromGBB(cparams, screen, +- vncptr, locale)) ++ /* Display default first */ ++ if (VBERROR_SUCCESS == VbExDisplayScreen(screen, locale)) + return VBERROR_SUCCESS; + +- /* If screen wasn't in the GBB bitmaps, fall back to a default */ +- return VbExDisplayScreen(screen, locale); ++ /* If default doesn't have anything to show, fall back to GBB bitmaps */ ++ return VbDisplayScreenFromGBB(cparams, screen, vncptr, locale); + } + + VbError_t VbDisplayScreen(VbCommonParams *cparams, uint32_t screen, +-- +2.8.0 + diff --git a/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch b/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch @@ -0,0 +1,91 @@ +From 948b65615a4e84baa5862633e13705d1f283f0db Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 22:46:43 +0200 +Subject: [PATCH 3/7] firmware: NV context pointer handoff to VbExDisplayScreen + +VbExDisplayScreen might need to display some information based on the NV context +so it makes sense to pass that pointer along. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + firmware/include/vboot_api.h | 4 +++- + firmware/lib/vboot_display.c | 4 ++-- + firmware/stub/vboot_api_stub.c | 3 ++- + tests/vboot_api_devmode_tests.c | 3 ++- + 4 files changed, 9 insertions(+), 5 deletions(-) + +diff --git a/firmware/include/vboot_api.h b/firmware/include/vboot_api.h +index ddc8cc6..c98fca4 100644 +--- a/firmware/include/vboot_api.h ++++ b/firmware/include/vboot_api.h +@@ -24,6 +24,7 @@ + #include <stdint.h> + #include <stdlib.h> + ++#include "vboot_nvstorage.h" + #include "gpt.h" + + /*****************************************************************************/ +@@ -771,7 +772,8 @@ VbError_t VbExDisplaySetDimension(uint32_t width, uint32_t height); + * to be simple ASCII text such as "NO GOOD" or "INSERT"; these screens should + * only be seen during development. + */ +-VbError_t VbExDisplayScreen(uint32_t screen_type, uint32_t locale); ++VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc, ++ uint32_t locale); + + /** + * Write an image to the display, with the upper left corner at the specified +diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c +index b95a1eb..472ca91 100644 +--- a/firmware/lib/vboot_display.c ++++ b/firmware/lib/vboot_display.c +@@ -340,7 +340,7 @@ static VbError_t VbDisplayScreenLegacy(VbCommonParams *cparams, uint32_t screen, + disp_current_screen = screen; + + /* Display default first */ +- if (VBERROR_SUCCESS == VbExDisplayScreen(screen, locale)) ++ if (VBERROR_SUCCESS == VbExDisplayScreen(screen, vncptr, locale)) + return VBERROR_SUCCESS; + + /* If default doesn't have anything to show, fall back to GBB bitmaps */ +@@ -357,7 +357,7 @@ VbError_t VbDisplayScreen(VbCommonParams *cparams, uint32_t screen, + VbNvGet(vncptr, VBNV_LOCALIZATION_INDEX, &locale); + + if (gbb->bmpfv_size == 0) { +- VbError_t ret = VbExDisplayScreen(screen, locale); ++ VbError_t ret = VbExDisplayScreen(screen, vncptr, locale); + + /* Keep track of the currently displayed screen */ + if (ret == VBERROR_SUCCESS) +diff --git a/firmware/stub/vboot_api_stub.c b/firmware/stub/vboot_api_stub.c +index 2299a03..9c86fc7 100644 +--- a/firmware/stub/vboot_api_stub.c ++++ b/firmware/stub/vboot_api_stub.c +@@ -43,7 +43,8 @@ VbError_t VbExDisplaySetDimension(uint32_t width, uint32_t height) + return VBERROR_SUCCESS; + } + +-VbError_t VbExDisplayScreen(uint32_t screen_type, uint32_t locale) ++VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc, ++ uint32_t locale) + { + return VBERROR_SUCCESS; + } +diff --git a/tests/vboot_api_devmode_tests.c b/tests/vboot_api_devmode_tests.c +index cd927a8..16abc6e 100644 +--- a/tests/vboot_api_devmode_tests.c ++++ b/tests/vboot_api_devmode_tests.c +@@ -265,7 +265,8 @@ VbError_t VbExBeep(uint32_t msec, uint32_t frequency) { + return beep_return; + } + +-VbError_t VbExDisplayScreen(uint32_t screen_type, uint32_t locale) { ++VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc, ++ uint32_t locale) { + switch(screen_type) { + case VB_SCREEN_BLANK: + VBDEBUG(("VbExDisplayScreen(BLANK)\n")); +-- +2.8.0 + diff --git a/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0004-firmware-Hold-key-combination-in-developer-mode.patch b/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0004-firmware-Hold-key-combination-in-developer-mode.patch @@ -0,0 +1,49 @@ +From 1c60b7224562b50a9aef90d533cdfd918dced867 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 22:59:50 +0200 +Subject: [PATCH 4/7] firmware: Hold key combination in developer mode + +This binds the Ctrl + H key combination to hold the developer mode screen. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + firmware/lib/vboot_api_kernel.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c +index fff3056..5e784eb 100644 +--- a/firmware/lib/vboot_api_kernel.c ++++ b/firmware/lib/vboot_api_kernel.c +@@ -292,6 +292,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) + uint32_t use_legacy = 0; + uint32_t default_boot = 0; + uint32_t ctrl_d_pressed = 0; ++ uint32_t hold = 0; + + VbAudioContext *audio = 0; + +@@ -417,6 +418,12 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) + ctrl_d_pressed = 1; + goto fallout; + break; ++ case 0x08: ++ /* Ctrl+H = hold */ ++ VBDEBUG(("VbBootDeveloper() - " ++ "hold developer mode screen\n")); ++ hold = 1; ++ break; + case 0x0c: + VBDEBUG(("VbBootDeveloper() - " + "user pressed Ctrl+L; Try legacy boot\n")); +@@ -467,7 +474,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) + VbCheckDisplayKey(cparams, key, &vnc); + break; + } +- } while(VbAudioLooping(audio)); ++ } while(hold || VbAudioLooping(audio)); + + fallout: + +-- +2.8.0 + diff --git a/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch b/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch @@ -0,0 +1,55 @@ +From 5f41175ef44c71f2aa3e3bebd33a079c93f60a5f Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 23:13:49 +0200 +Subject: [PATCH 5/7] firmware: Screen blank and wait at disabled USB boot + warning + +This blanks the screen before showing the disabled USB boot warning. +It also waits for the user to press any key to come back to the developer mode +screen. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + firmware/lib/vboot_api_kernel.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c +index 5e784eb..7d22c93 100644 +--- a/firmware/lib/vboot_api_kernel.c ++++ b/firmware/lib/vboot_api_kernel.c +@@ -320,6 +320,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) + use_usb = 0; + } + ++developer_mode_screen: + /* Show the dev mode warning screen */ + VbDisplayScreen(cparams, VB_SCREEN_DEVELOPER_WARNING, 0, &vnc); + +@@ -442,14 +443,23 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) + if (!allow_usb) { + VBDEBUG(("VbBootDeveloper() - " + "USB booting is disabled\n")); ++ ++ VbDisplayScreen(cparams, VB_SCREEN_BLANK, 1, ++ &vnc); ++ + VbExDisplayDebugInfo( + "WARNING: Booting from external media " + "(USB/SD) has not been enabled. Refer " + "to the developer-mode documentation " +- "for details.\n"); ++ "for details.\n\n" ++ "Press any key to continue.\n\n"); + VbExBeep(120, 400); + VbExSleepMs(120); + VbExBeep(120, 400); ++ ++ while (!VbExKeyboardRead()) ; ++ ++ goto developer_mode_screen; + } else { + /* + * Clear the screen to show we get the Ctrl+U +-- +2.8.0 + diff --git a/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0006-firmware-Separate-screen-and-wait-at-device-informat.patch b/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0006-firmware-Separate-screen-and-wait-at-device-informat.patch @@ -0,0 +1,79 @@ +From 4be2a60b0ebb845c8f5043ef3f27b691a51df7c2 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Mon, 10 Aug 2015 23:53:48 +0200 +Subject: [PATCH 6/7] firmware: Separate screen and wait at device information + screen + +This blanks the screen (instead of redrawing it) at device information and +waits for the user to press any key to come back to the developer mode screen. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + firmware/lib/vboot_api_kernel.c | 12 ++++++++++++ + firmware/lib/vboot_display.c | 13 ++++++++----- + 2 files changed, 20 insertions(+), 5 deletions(-) + +diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c +index 7d22c93..4e6de18 100644 +--- a/firmware/lib/vboot_api_kernel.c ++++ b/firmware/lib/vboot_api_kernel.c +@@ -425,6 +425,18 @@ developer_mode_screen: + "hold developer mode screen\n")); + hold = 1; + break; ++ case 0x09: ++ /* Ctrl+I = device information */ ++ VBDEBUG(("VbBootDeveloper() - " ++ "device info\n")); ++ ++ hold = 1; ++ VbDisplayDebugInfo(cparams, &vnc); ++ ++ while (!VbExKeyboardRead()) ; ++ ++ goto developer_mode_screen; ++ break; + case 0x0c: + VBDEBUG(("VbBootDeveloper() - " + "user pressed Ctrl+L; Try legacy boot\n")); +diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c +index 472ca91..e092189 100644 +--- a/firmware/lib/vboot_display.c ++++ b/firmware/lib/vboot_display.c +@@ -541,7 +541,7 @@ const char *RecoveryReasonString(uint8_t code) + return "We have no idea what this means"; + } + +-#define DEBUG_INFO_SIZE 512 ++#define DEBUG_INFO_SIZE 768 + + VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr) + { +@@ -556,8 +556,8 @@ VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr) + VbError_t ret; + uint32_t i; + +- /* Redisplay current screen to overwrite any previous debug output */ +- VbDisplayScreen(cparams, disp_current_screen, 1, vncptr); ++ /* Blank screen */ ++ VbDisplayScreen(cparams, VB_SCREEN_BLANK, 1, vncptr); + + /* Add hardware ID */ + VbRegionReadHWID(cparams, hwid, sizeof(hwid)); +@@ -666,8 +666,11 @@ VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr) + used += StrnAppend(buf + used, sha1sum, DEBUG_INFO_SIZE - used); + } + +- /* Make sure we finish with a newline */ +- used += StrnAppend(buf + used, "\n", DEBUG_INFO_SIZE - used); ++ /* Make sure we finish with newlines */ ++ used += StrnAppend(buf + used, "\n\n", DEBUG_INFO_SIZE - used); ++ ++ used += StrnAppend(buf + used, "Press any key to continue\n\n", ++ DEBUG_INFO_SIZE - used); + + /* TODO: add more interesting data: + * - Information on current disks */ +-- +2.8.0 + diff --git a/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0007-firmware-Localization-keys-removal.patch b/resources/libreboot/patch/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/depthcharge/veyron_speedy/0007-firmware-Localization-keys-removal.patch @@ -0,0 +1,53 @@ +From ed1da3f76c1c19f9e078d0a19bac06151d5988d6 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <contact@paulk.fr> +Date: Tue, 11 Aug 2015 00:07:18 +0200 +Subject: [PATCH 7/7] firmware: Localization keys removal + +Since we're using a text-based interface, binding the arrow keys to localization +changes has no effect and only makes the screen flicker. + +Signed-off-by: Paul Kocialkowski <contact@paulk.fr> +--- + firmware/lib/vboot_api_kernel.c | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c +index 4e6de18..62efd0f 100644 +--- a/firmware/lib/vboot_api_kernel.c ++++ b/firmware/lib/vboot_api_kernel.c +@@ -263,7 +263,6 @@ int VbUserConfirms(VbCommonParams *cparams, uint32_t confirm_flags) + return 1; + } + } +- VbCheckDisplayKey(cparams, key, &vnc); + } + VbExSleepMs(CONFIRM_KEY_DELAY); + } +@@ -493,7 +492,6 @@ developer_mode_screen: + break; + default: + VBDEBUG(("VbBootDeveloper() - pressed key %d\n", key)); +- VbCheckDisplayKey(cparams, key, &vnc); + break; + } + } while(hold || VbAudioLooping(audio)); +@@ -557,7 +555,6 @@ VbError_t VbBootRecovery(VbCommonParams *cparams, LoadKernelParams *p) + VbDisplayScreen(cparams, VB_SCREEN_OS_BROKEN, 0, &vnc); + VBDEBUG(("VbBootRecovery() waiting for manual recovery\n")); + while (1) { +- VbCheckDisplayKey(cparams, VbExKeyboardRead(), &vnc); + if (VbWantShutdown(cparams->gbb->flags)) + return VBERROR_SHUTDOWN_REQUESTED; + VbExSleepMs(REC_KEY_DELAY); +@@ -655,8 +652,6 @@ VbError_t VbBootRecovery(VbCommonParams *cparams, LoadKernelParams *p) + i = 4; + break; + } +- } else { +- VbCheckDisplayKey(cparams, key, &vnc); + } + if (VbWantShutdown(cparams->gbb->flags)) + return VBERROR_SHUTDOWN_REQUESTED; +-- +2.8.0 + diff --git a/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch b/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch @@ -1,33 +0,0 @@ -From eaf081085930dd7614e2f77bbc1f80d6b1e003eb Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 20:33:23 +0200 -Subject: [PATCH 1/7] firmware: Developer mode timeout delay shortening (down - to 3 seconds) - -A timeout delay of 3 seconds, with no bip, is much more appreciable for users. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - firmware/lib/vboot_audio.c | 6 +----- - 1 file changed, 1 insertion(+), 5 deletions(-) - -diff --git a/firmware/lib/vboot_audio.c b/firmware/lib/vboot_audio.c -index e24a039..f96d5f4 100644 ---- a/firmware/lib/vboot_audio.c -+++ b/firmware/lib/vboot_audio.c -@@ -30,11 +30,7 @@ - #define MAX_CUSTOM_DELAY 60000 - - /* These are visible externally only to make testing easier */ --VbDevMusicNote default_notes_[] = { {20000, 0}, /* 20 seconds */ -- {250, 400}, /* two beeps */ -- {250, 0}, -- {250, 400}, -- {9250, 0} }; /* total 30 seconds */ -+VbDevMusicNote default_notes_[] = { {3000, 0} }; /* three seconds */ - uint32_t default_count_ = sizeof(default_notes_) / sizeof(VbDevMusicNote); - - VbDevMusicNote short_notes_[] = { {2000, 0} }; /* two seconds */ --- -1.9.1 - diff --git a/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0002-firmware-Text-based-screen-display-in-priority.patch b/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0002-firmware-Text-based-screen-display-in-priority.patch @@ -1,39 +0,0 @@ -From ceb9ba56a8ef48e18712c38d97b8541a324c7edd Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 22:44:50 +0200 -Subject: [PATCH 2/7] firmware: Text-based screen display in priority - -This allows showing text-based screen displays before looking at the GBB bitmaps -since those encourage the use of non-free software (Chrome OS) and don't display -enough information to the user. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - firmware/lib/vboot_display.c | 9 ++++----- - 1 file changed, 4 insertions(+), 5 deletions(-) - -diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c -index c3cc636..542aaed 100644 ---- a/firmware/lib/vboot_display.c -+++ b/firmware/lib/vboot_display.c -@@ -324,13 +324,12 @@ VbError_t VbDisplayScreen(VbCommonParams *cparams, uint32_t screen, - /* Request the screen */ - disp_current_screen = screen; - -- /* Look in the GBB first */ -- if (VBERROR_SUCCESS == VbDisplayScreenFromGBB(cparams, screen, -- vncptr)) -+ /* Display default first */ -+ if (VBERROR_SUCCESS == VbExDisplayScreen(screen)) - return VBERROR_SUCCESS; - -- /* If screen wasn't in the GBB bitmaps, fall back to a default */ -- return VbExDisplayScreen(screen); -+ /* If default doesn't have anything to show, fall back to GBB bitmaps */ -+ return VbDisplayScreenFromGBB(cparams, screen, vncptr); - } - - static void Uint8ToString(char *buf, uint8_t val) --- -1.9.1 - diff --git a/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch b/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch @@ -1,79 +0,0 @@ -From 5bd1373a9313bc31bacb2d765ede2c19242a7e9b Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 22:46:43 +0200 -Subject: [PATCH 3/7] firmware: NV context pointer handoff to VbExDisplayScreen - -VbExDisplayScreen might need to display some information based on the NV context -so it makes sense to pass that pointer along. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - firmware/include/vboot_api.h | 3 ++- - firmware/lib/vboot_display.c | 2 +- - firmware/stub/vboot_api_stub.c | 2 +- - tests/vboot_api_devmode_tests.c | 2 +- - 4 files changed, 5 insertions(+), 4 deletions(-) - -diff --git a/firmware/include/vboot_api.h b/firmware/include/vboot_api.h -index 7e94773..66d1ee4 100644 ---- a/firmware/include/vboot_api.h -+++ b/firmware/include/vboot_api.h -@@ -24,6 +24,7 @@ - #include <stdint.h> - #include <stdlib.h> - -+#include "vboot_nvstorage.h" - #include "gpt.h" - - /*****************************************************************************/ -@@ -765,7 +766,7 @@ VbError_t VbExDisplaySetDimension(uint32_t width, uint32_t height); - * to be simple ASCII text such as "NO GOOD" or "INSERT"; these screens should - * only be seen during development. - */ --VbError_t VbExDisplayScreen(uint32_t screen_type); -+VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc); - - /** - * Write an image to the display, with the upper left corner at the specified -diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c -index 542aaed..0158cc2 100644 ---- a/firmware/lib/vboot_display.c -+++ b/firmware/lib/vboot_display.c -@@ -325,7 +325,7 @@ VbError_t VbDisplayScreen(VbCommonParams *cparams, uint32_t screen, - disp_current_screen = screen; - - /* Display default first */ -- if (VBERROR_SUCCESS == VbExDisplayScreen(screen)) -+ if (VBERROR_SUCCESS == VbExDisplayScreen(screen, vncptr)) - return VBERROR_SUCCESS; - - /* If default doesn't have anything to show, fall back to GBB bitmaps */ -diff --git a/firmware/stub/vboot_api_stub.c b/firmware/stub/vboot_api_stub.c -index 7320b6c..f773b6e 100644 ---- a/firmware/stub/vboot_api_stub.c -+++ b/firmware/stub/vboot_api_stub.c -@@ -43,7 +43,7 @@ VbError_t VbExDisplaySetDimension(uint32_t width, uint32_t height) - return VBERROR_SUCCESS; - } - --VbError_t VbExDisplayScreen(uint32_t screen_type) -+VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc) - { - return VBERROR_SUCCESS; - } -diff --git a/tests/vboot_api_devmode_tests.c b/tests/vboot_api_devmode_tests.c -index 925a146..af90f7f 100644 ---- a/tests/vboot_api_devmode_tests.c -+++ b/tests/vboot_api_devmode_tests.c -@@ -265,7 +265,7 @@ VbError_t VbExBeep(uint32_t msec, uint32_t frequency) { - return beep_return; - } - --VbError_t VbExDisplayScreen(uint32_t screen_type) { -+VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc) { - switch(screen_type) { - case VB_SCREEN_BLANK: - VBDEBUG(("VbExDisplayScreen(BLANK)\n")); --- -1.9.1 - diff --git a/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0004-firmware-Hold-key-combination-in-developer-mode.patch b/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0004-firmware-Hold-key-combination-in-developer-mode.patch @@ -1,50 +0,0 @@ -From 741adbf4fdb4ef72245f9373a2980ecade41f3f5 Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 22:59:50 +0200 -Subject: [PATCH 4/7] firmware: Hold key combination in developer mode - -This binds the Ctrl + H key combination to hold the developer mode screen. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - firmware/lib/vboot_api_kernel.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - -diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c -index 312014b..e191137 100644 ---- a/firmware/lib/vboot_api_kernel.c -+++ b/firmware/lib/vboot_api_kernel.c -@@ -251,7 +251,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) - GoogleBinaryBlockHeader *gbb = cparams->gbb; - VbSharedDataHeader *shared = - (VbSharedDataHeader *)cparams->shared_data_blob; -- uint32_t allow_usb = 0, allow_legacy = 0, ctrl_d_pressed = 0; -+ uint32_t allow_usb = 0, allow_legacy = 0, ctrl_d_pressed = 0, hold = 0; - VbAudioContext *audio = 0; - - VBDEBUG(("Entering %s()\n", __func__)); -@@ -364,6 +364,12 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) - ctrl_d_pressed = 1; - goto fallout; - break; -+ case 0x08: -+ /* Ctrl+H = hold */ -+ VBDEBUG(("VbBootDeveloper() - " -+ "hold developer mode screen\n")); -+ hold = 1; -+ break; - case 0x0c: - VBDEBUG(("VbBootDeveloper() - " - "user pressed Ctrl+L; Try legacy boot\n")); -@@ -430,7 +436,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) - VbCheckDisplayKey(cparams, key, &vnc); - break; - } -- } while(VbAudioLooping(audio)); -+ } while(hold || VbAudioLooping(audio)); - - fallout: - --- -1.9.1 - diff --git a/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch b/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch @@ -1,55 +0,0 @@ -From 05a34ae55a702d0e415811fedb959f71bbd782d5 Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 23:13:49 +0200 -Subject: [PATCH 5/7] firmware: Screen blank and wait at disabled USB boot - warning - -This blanks the screen before showing the disabled USB boot warning. -It also waits for the user to press any key to come back to the developer mode -screen. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - firmware/lib/vboot_api_kernel.c | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) - -diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c -index e191137..6463571 100644 ---- a/firmware/lib/vboot_api_kernel.c -+++ b/firmware/lib/vboot_api_kernel.c -@@ -266,6 +266,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) - if (gbb->flags & GBB_FLAG_FORCE_DEV_BOOT_LEGACY) - allow_legacy = 1; - -+developer_mode_screen: - /* Show the dev mode warning screen */ - VbDisplayScreen(cparams, VB_SCREEN_DEVELOPER_WARNING, 0, &vnc); - -@@ -388,14 +389,23 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p) - if (!allow_usb) { - VBDEBUG(("VbBootDeveloper() - " - "USB booting is disabled\n")); -+ -+ VbDisplayScreen(cparams, VB_SCREEN_BLANK, 1, -+ &vnc); -+ - VbExDisplayDebugInfo( - "WARNING: Booting from external media " - "(USB/SD) has not been enabled. Refer " - "to the developer-mode documentation " -- "for details.\n"); -+ "for details.\n\n" -+ "Press any key to continue.\n\n"); - VbExBeep(120, 400); - VbExSleepMs(120); - VbExBeep(120, 400); -+ -+ while (!VbExKeyboardRead()) ; -+ -+ goto developer_mode_screen; - } else { - /* - * Clear the screen to show we get the Ctrl+U --- -1.9.1 - diff --git a/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0006-firmware-Separate-screen-and-wait-at-device-informat.patch b/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0006-firmware-Separate-screen-and-wait-at-device-informat.patch @@ -1,79 +0,0 @@ -From b724719ae34c3fd7c25502339f9029ee9e0bbb1e Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Mon, 10 Aug 2015 23:53:48 +0200 -Subject: [PATCH 6/7] firmware: Separate screen and wait at device information - screen - -This blanks the screen (instead of redrawing it) at device information and -waits for the user to press any key to come back to the developer mode screen. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - firmware/lib/vboot_api_kernel.c | 12 ++++++++++++ - firmware/lib/vboot_display.c | 13 ++++++++----- - 2 files changed, 20 insertions(+), 5 deletions(-) - -diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c -index 6463571..2f33258 100644 ---- a/firmware/lib/vboot_api_kernel.c -+++ b/firmware/lib/vboot_api_kernel.c -@@ -371,6 +371,18 @@ developer_mode_screen: - "hold developer mode screen\n")); - hold = 1; - break; -+ case 0x09: -+ /* Ctrl+I = device information */ -+ VBDEBUG(("VbBootDeveloper() - " -+ "device info\n")); -+ -+ hold = 1; -+ VbDisplayDebugInfo(cparams, &vnc); -+ -+ while (!VbExKeyboardRead()) ; -+ -+ goto developer_mode_screen; -+ break; - case 0x0c: - VBDEBUG(("VbBootDeveloper() - " - "user pressed Ctrl+L; Try legacy boot\n")); -diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c -index 0158cc2..c3d504d 100644 ---- a/firmware/lib/vboot_display.c -+++ b/firmware/lib/vboot_display.c -@@ -503,7 +503,7 @@ const char *RecoveryReasonString(uint8_t code) - return "We have no idea what this means"; - } - --#define DEBUG_INFO_SIZE 512 -+#define DEBUG_INFO_SIZE 768 - - VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr) - { -@@ -518,8 +518,8 @@ VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr) - VbError_t ret; - uint32_t i; - -- /* Redisplay current screen to overwrite any previous debug output */ -- VbDisplayScreen(cparams, disp_current_screen, 1, vncptr); -+ /* Blank screen */ -+ VbDisplayScreen(cparams, VB_SCREEN_BLANK, 1, vncptr); - - /* Add hardware ID */ - VbRegionReadHWID(cparams, hwid, sizeof(hwid)); -@@ -622,8 +622,11 @@ VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr) - used += StrnAppend(buf + used, sha1sum, DEBUG_INFO_SIZE - used); - } - -- /* Make sure we finish with a newline */ -- used += StrnAppend(buf + used, "\n", DEBUG_INFO_SIZE - used); -+ /* Make sure we finish with newlines */ -+ used += StrnAppend(buf + used, "\n\n", DEBUG_INFO_SIZE - used); -+ -+ used += StrnAppend(buf + used, "Press any key to continue\n\n", -+ DEBUG_INFO_SIZE - used); - - /* TODO: add more interesting data: - * - Information on current disks */ --- -1.9.1 - diff --git a/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0007-firmware-Localization-keys-removal.patch b/resources/libreboot/patch/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/depthcharge/veyron_speedy/0007-firmware-Localization-keys-removal.patch @@ -1,54 +0,0 @@ -From 982044d150604b74e2bb619ca00042430dd0b73d Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski <contact@paulk.fr> -Date: Tue, 11 Aug 2015 00:07:18 +0200 -Subject: [PATCH 7/7] firmware: Localization keys removal - -Since we're using a text-based interface, binding the arrow keys to localization -changes has no effect and only makes the screen flicker. - -Signed-off-by: Paul Kocialkowski <contact@paulk.fr> ---- - firmware/lib/vboot_api_kernel.c | 6 ------ - 1 file changed, 6 deletions(-) - -diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c -index 2f33258..a5d2f03 100644 ---- a/firmware/lib/vboot_api_kernel.c -+++ b/firmware/lib/vboot_api_kernel.c -@@ -229,7 +229,6 @@ int VbUserConfirms(VbCommonParams *cparams, uint32_t confirm_flags) - return 1; - } - } -- VbCheckDisplayKey(cparams, key, &vnc); - } - VbExSleepMs(CONFIRM_KEY_DELAY); - } -@@ -455,7 +454,6 @@ developer_mode_screen: - break; - default: - VBDEBUG(("VbBootDeveloper() - pressed key %d\n", key)); -- VbCheckDisplayKey(cparams, key, &vnc); - break; - } - } while(hold || VbAudioLooping(audio)); -@@ -539,8 +537,6 @@ VbError_t VbBootRecovery(VbCommonParams *cparams, LoadKernelParams *p) - * platforms don't like to scan USB too rapidly. - */ - for (i = 0; i < REC_DISK_DELAY; i += REC_KEY_DELAY) { -- VbCheckDisplayKey(cparams, VbExKeyboardRead(), -- &vnc); - if (VbWantShutdown(cparams->gbb->flags)) - return VBERROR_SHUTDOWN_REQUESTED; - VbExSleepMs(REC_KEY_DELAY); -@@ -638,8 +634,6 @@ VbError_t VbBootRecovery(VbCommonParams *cparams, LoadKernelParams *p) - i = 4; - break; - } -- } else { -- VbCheckDisplayKey(cparams, key, &vnc); - } - if (VbWantShutdown(cparams->gbb->flags)) - return VBERROR_SHUTDOWN_REQUESTED; --- -1.9.1 - diff --git a/resources/scripts/helpers/download/depthcharge b/resources/scripts/helpers/download/depthcharge @@ -40,7 +40,7 @@ git clone https://chromium.googlesource.com/chromiumos/platform/depthcharge cd "depthcharge/" # reset to the latest previously tested revision -git reset --hard 3a5d54e31267578f48fb283fae56a405108f1498 +git reset --hard 065ba14bc56c9044247fef6337d8f9e9a3055820 # Patch depthcharge # ------------------------------------------------------------------------------ @@ -57,14 +57,17 @@ git am "../resources/depthcharge/patch/0003-DOTCONFIG-location-correction.patch" printf "Adaptation for a read-only boot path when no vboot handoff data is found\n" git am "../resources/depthcharge/patch/0004-Adaptation-for-a-read-only-boot-path-when-no-vboot-h.patch" +printf "vboot: Only initialize cparams once\n" +git am "../resources/depthcharge/patch/0005-vboot-Only-initialize-cparams-once.patch" + printf "Proper firmware index report for read-only boot path\n" -git am "../resources/depthcharge/patch/0005-Proper-firmware-index-report-for-read-only-boot-path.patch" +git am "../resources/depthcharge/patch/0006-Proper-firmware-index-report-for-read-only-boot-path.patch" printf "fdt: nonvolatile-context-storage report to mkbp for EC NV storage\n" -git am "../resources/depthcharge/patch/0006-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch" +git am "../resources/depthcharge/patch/0007-fdt-nonvolatile-context-storage-report-to-mkbp-for-E.patch" printf "vboot: Display callbacks for developer and recovery mode screens\n" -git am "../resources/depthcharge/patch/0007-vboot-Display-callbacks-for-developer-and-recovery-m.patch" +git am "../resources/depthcharge/patch/0008-vboot-Display-callbacks-for-developer-and-recovery-m.patch" # leave the tree cd "../" diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/blobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/blobs.list @@ -0,0 +1,52 @@ +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c +src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c +src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h +src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h +src/vendorcode/amd/cimx/rd890/HotplugFirmware.h +src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc +src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h +src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/nonblobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/nonblobs.list @@ -0,0 +1,335 @@ +payloads/libpayload/curses/PDCurses-3.4/demos/worm.c +payloads/libpayload/curses/PDCurses-3.4/sdl1/deffont.h +payloads/libpayload/curses/PDCurses-3.4/sdl1/deficon.h +payloads/libpayload/curses/PDCurses-3.4/win32/pdckbd.c +payloads/libpayload/curses/PDCurses-3.4/x11/big_icon.xbm +payloads/libpayload/curses/PDCurses-3.4/x11/little_icon.xbm +payloads/libpayload/curses/pdcurses-backend/pdcdisp.c +payloads/libpayload/curses/tinycurses.c +payloads/libpayload/drivers/keyboard.c +payloads/libpayload/drivers/usb/usbmsc.c +payloads/libpayload/tests/cbfs-x86-test.c +payloads/nvramcui/payload.sh +src/cpu/allwinner/a10/raminit.c +src/cpu/amd/geode_gx2/Kconfig +src/cpu/amd/geode_lx/cpureginit.c +src/cpu/amd/geode_lx/Kconfig +src/cpu/amd/model_10xxx/init_cpus.c +src/cpu/amd/model_10xxx/processor_name.c +src/cpu/amd/model_fxx/model_fxx_update_microcode.c +src/cpu/amd/model_fxx/powernow_acpi.c +src/cpu/intel/haswell/acpi.c +src/cpu/intel/microcode/microcode.c +src/cpu/intel/model_2065x/acpi.c +src/cpu/intel/model_206ax/acpi.c +src/cpu/Kconfig +src/cpu/samsung/exynos5250/update-bl1.sh +src/cpu/via/nano/update_ucode.c +src/device/dram/spd_cache.c +src/device/Kconfig +src/device/oprom/yabel/interrupt.c +src/drivers/pc80/mc146818rtc.c +src/drivers/pc80/vga/vga_palette.c +src/Kconfig +src/lib/coreboot_table.c +src/lib/jpeg.c +src/mainboard/advansus/a785e-i/mptable.c +src/mainboard/amd/bimini_fam10/mptable.c +src/mainboard/amd/dinar/buildOpts.c +src/mainboard/amd/dinar/Kconfig +src/mainboard/amd/inagua/Kconfig +src/mainboard/amd/olivehill/mptable.c +src/mainboard/amd/olivehillplus/mptable.c +src/mainboard/amd/parmer/mptable.c +src/mainboard/amd/persimmon/Kconfig +src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c +src/mainboard/amd/south_station/Kconfig +src/mainboard/amd/south_station/mptable.c +src/mainboard/amd/thatcher/mptable.c +src/mainboard/amd/torpedo/Kconfig +src/mainboard/amd/torpedo/mptable.c +src/mainboard/amd/union_station/Kconfig +src/mainboard/amd/union_station/mptable.c +src/mainboard/asrock/e350m1/mptable.c +src/mainboard/asrock/imb-a180/mptable.c +src/mainboard/asus/f2a85-m/mptable.c +src/mainboard/asus/m5a88-v/mptable.c +src/mainboard/avalue/eax-785e/mptable.c +src/mainboard/digitallogic/adl855pc/irq_tables.c +src/mainboard/gigabyte/ga-b75m-d3h/romstage.c +src/mainboard/gizmosphere/gizmo2/Micron_MT41J128M16JT.spd.hex +src/mainboard/gizmosphere/gizmo/mptable.c +src/mainboard/google/bolt/romstage.c +src/mainboard/google/butterfly/hda_verb.c +src/mainboard/google/butterfly/mainboard.c +src/mainboard/google/falco/romstage.c +src/mainboard/google/link/hda_verb.c +src/mainboard/google/link/i915.c +src/mainboard/google/link/romstage.c +src/mainboard/google/panther/lan.c +src/mainboard/google/peach_pit/mainboard.c +src/mainboard/google/peppy/romstage.c +src/mainboard/google/rambi/romstage.c +src/mainboard/google/samus/romstage.c +src/mainboard/google/slippy/romstage.c +src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c +src/mainboard/hp/pavilion_m6_1035dx/mptable.c +src/mainboard/ibase/mb899/cmos.layout +src/mainboard/ibase/mb899/superio_hwm.c +src/mainboard/intel/minnowmax/Kconfig +src/mainboard/intel/wtm2/i915.c +src/mainboard/jetway/nf81-t56n-lf/Kconfig +src/mainboard/kontron/986lcd-m/cmos.layout +src/mainboard/kontron/986lcd-m/mainboard.c +src/mainboard/lenovo/g505s/mptable.c +src/mainboard/lippert/frontrunner-af/Kconfig +src/mainboard/lippert/frontrunner-af/mptable.c +src/mainboard/lippert/toucan-af/Kconfig +src/mainboard/lippert/toucan-af/mptable.c +src/mainboard/msi/ms9652_fam10/get_bus_conf.c +src/mainboard/packardbell/ms2290/mainboard.c +src/mainboard/samsung/lumpy/romstage.c +src/mainboard/siemens/sitemp_g1p1/cmos.layout +src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c +src/mainboard/supermicro/h8qgi/buildOpts.c +src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c +src/mainboard/supermicro/h8scm/buildOpts.c +src/mainboard/tyan/s2912_fam10/get_bus_conf.c +src/mainboard/tyan/s4880/irq_tables.c +src/mainboard/tyan/s4882/irq_tables.c +src/mainboard/tyan/s8226/buildOpts.c +src/northbridge/amd/agesa/common/common.c +src/northbridge/amd/amdk8/acpi.c +src/northbridge/amd/amdk8/coherent_ht.c +src/northbridge/amd/amdk8/raminit_test.c +src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c +src/northbridge/amd/amdmct/mct/mctardk3.c +src/northbridge/amd/amdmct/mct/mctardk4.c +src/northbridge/amd/amdmct/mct/mcttmrl.c +src/northbridge/amd/gx2/pll_reset.c +src/northbridge/amd/pi/00730F01/Kconfig +src/northbridge/intel/gm45/raminit_rcomp_calibration.c +src/northbridge/intel/gm45/raminit_read_write_training.c +src/northbridge/intel/haswell/Kconfig +src/northbridge/intel/haswell/raminit.c +src/northbridge/intel/i82830/vga.c +src/northbridge/intel/i945/raminit.c +src/northbridge/intel/nehalem/gma.c +src/northbridge/intel/nehalem/raminit.c +src/northbridge/intel/sandybridge/gma.c +src/northbridge/intel/sandybridge/Kconfig +src/northbridge/intel/sandybridge/raminit.c +src/northbridge/via/cx700/raminit.c +src/northbridge/via/vx800/ide.c +src/northbridge/via/vx800/uma_ram_setting.c +src/northbridge/via/vx900/sata.c +src/soc/intel/baytrail/acpi.c +src/soc/intel/baytrail/Kconfig +src/soc/intel/baytrail/romstage/raminit.c +src/soc/intel/broadwell/acpi.c +src/soc/intel/broadwell/Kconfig +src/soc/intel/broadwell/romstage/raminit.c +src/soc/intel/fsp_baytrail/acpi.c +src/soc/intel/fsp_baytrail/fsp/Kconfig +src/soc/intel/fsp_baytrail/Kconfig +src/soc/qualcomm/ipq806x/Kconfig +src/soc/samsung/exynos5250/clock.c +src/soc/samsung/exynos5420/clock.c +src/southbridge/amd/agesa/hudson/Kconfig +src/southbridge/amd/cimx/sb800/Kconfig +src/southbridge/intel/bd82x6x/Kconfig +src/southbridge/intel/i82801ix/dmi_setup.c +src/southbridge/intel/ibexpeak/Kconfig +src/southbridge/intel/lynxpoint/Kconfig +src/southbridge/intel/sch/Kconfig +src/southbridge/sis/sis966/early_smbus.c +src/southbridge/sis/sis966/ide.c +src/southbridge/sis/sis966/sata.c +src/southbridge/sis/sis966/usb2.c +src/southbridge/sis/sis966/usb.c +src/superio/via/vt1211/vt1211.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c +src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c +src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c +src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c +src/vendorcode/amd/agesa/f15/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f15/Proc/Mem/Ps/OR/mpor3.c +src/vendorcode/amd/agesa/f15/Proc/Mem/Tech/DDR3/mtlrdimm3.c +src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c +src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c +src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c +src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16WheaInitDataTables.c +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.c +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c +src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpkb3.c +src/vendorcode/amd/cimx/sb800/SATA.c +src/vendorcode/google/chromeos/build-snow +util/amdtools/example_input/lspci-cb-48G-667MHz-18.2-20090909e +util/amdtools/example_input/lspci-prop-48G-667MHz-18.2 +util/cbfstool/linux_trampoline.c +util/ifdtool/ifdtool.c +util/kconfig/zconf.hash.c_shipped +util/kconfig/zconf.lex.c_shipped +util/kconfig/zconf.tab.c_shipped +util/nvramtool/accessors/layout-bin.c +util/romcc/do_tests.sh +util/romcc/tests/include/linux_console.h +util/romcc/tests/linux_console.h +util/romcc/tests/linux_test5.c +util/romcc/tests/raminit_test6.c +util/romcc/tests/raminit_test7.c +util/romcc/tests/simple_test14.c +util/romcc/tests/simple_test30.c +util/romcc/tests/simple_test38.c +util/romcc/tests/simple_test39.c +util/romcc/tests/simple_test54.c +util/romcc/tests/simple_test59.c +util/romcc/tests/simple_test72.c +util/romcc/tests/simple_test73.c +util/sconfig/lex.yy.c_shipped +util/sconfig/sconfig.tab.c_shipped +util/superiotool/fintek.c +util/superiotool/ite.c +util/superiotool/smsc.c +util/superiotool/winbond.c +src/mainboard/google/slippy/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/falco/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/peppy/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/link/micron_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/rambi/spd/micron_1GiB_dimm_MT41K128M16JT-125.spd.hex +src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex +src/mainboard/google/bolt/micron_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/link/samsung_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/link/elpida_4Gb_1600_x16.spd.hex +src/mainboard/google/slippy/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/falco/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/falco/Elpida_EDJ4216EFBG.spd.hex +src/mainboard/google/rambi/spd/hynix_1GiB_dimm_H5TC2G63FFR-PBA.spd.hex +src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex +src/mainboard/google/bolt/samsung_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/bolt/elpida_4Gb_1600_x16.spd.hex +src/mainboard/google/peppy/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/peppy/Elpida_EDJ4216EFBG.spd.hex +src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex +src/mainboard/google/samus/spd/empty.spd.hex +src/mainboard/google/samus/spd/elpida_4.spd.hex +src/mainboard/google/samus/spd/hynix_4.spd.hex +src/mainboard/google/samus/spd/elpida_16.spd.hex +src/mainboard/google/samus/spd/hynix_8.spd.hex +src/mainboard/google/samus/spd/hynix_16.spd.hex +src/mainboard/google/samus/spd/samsung_8.spd.hex +src/mainboard/google/samus/spd/elpida_8.spd.hex +src/mainboard/google/samus/spd/samsung_4.spd.hex +src/mainboard/google/auron/spd/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/auron/spd/Elpida_EDJ4216EFBG.spd.hex +src/mainboard/google/auron/spd/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex +src/mainboard/google/auron/spd/empty.spd.hex +src/mainboard/google/cyan/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex +src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex +src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex +src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTALAR.spd.hex +src/mainboard/google/glados/spd/empty.spd.hex +src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR.spd.hex +src/mainboard/intel/sklrvp/spd/empty.spd.hex +src/mainboard/intel/sklrvp/spd/rvp3.spd.hex +src/mainboard/intel/kunimitsu/spd/empty.spd.hex +src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex +src/mainboard/intel/strago/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex +src/mainboard/intel/strago/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex +src/mainboard/intel/strago/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex +src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex +src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex +src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex +src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex +src/mainboard/bap/ode_e20XX/BAP_Q7.spd.hex +src/northbridge/intel/nehalem/raminit_tables.c +src/northbridge/intel/sandybridge/raminit_patterns.h +src/southbridge/nvidia/mcp55/early_setup_ss.h +src/southbridge/nvidia/ck804/early_setup_ss.h +src/southbridge/sis/sis966/early_setup_ss.h +util/crossgcc/patches/binutils-2.25_riscv.patch +src/southbridge/amd/pi/hudson/Kconfig +src/drivers/xgi/common/vb_setmode.c +src/drivers/xgi/common/vb_table.h +src/drivers/xgi/common/XGI_main.h +src/mainboard/siemens/mc_tcu3/romstage.c +src/mainboard/siemens/mc_tcu3/lcd_panel.c +src/mainboard/siemens/mc_tcu3/modhwinfo.c +src/mainboard/pcengines/apu1/Kconfig +src/mainboard/asus/kfsn4-dre/get_bus_conf.c +src/mainboard/google/samus/spd/spd.c +src/mainboard/hp/abm/mptable.c +src/northbridge/amd/pi/00630F01/Kconfig +src/cpu/amd/microcode/microcode.c +src/lib/tlcl_structures.h +util/rockchip/make_idb.py +util/autoport/readme.md +util/bimgtool/bimgtool.c +util/cbfstool/fmd_parser.c_shipped +util/cbfstool/fmd_scanner.c_shipped +Documentation/CorebootBuildingGuide.tex +Documentation/hypertransport.svg +Documentation/codeflow.svg +src/soc/broadcom/cygnus/ddr_init.c +src/soc/broadcom/cygnus/ddr_init_table.c +src/soc/qualcomm/ipq806x/lcc.c +src/soc/intel/braswell/acpi.c +src/soc/intel/braswell/Kconfig +src/vendorcode/amd/pi/Kconfig +src/drivers/intel/fsp1_1/Kconfig +src/drivers/intel/fsp1_1/fsp_gop.c +src/drivers/i2c/ww_ring/ww_ring_programs.c +src/mainboard/google/auron/spd/spd.c +src/mainboard/google/jecht/lan.c +src/mainboard/gigabyte/ga-b75m-d3v/romstage.c +src/mainboard/amd/lamar/Kconfig +payloads/external/GRUB2/Kconfig +payloads/external/FILO/Kconfig +payloads/external/SeaBIOS/Kconfig +src/soc/intel/common/fsp_ramstage.c +src/soc/intel/skylake/Kconfig +src/soc/intel/braswell/gpio.c +src/soc/nvidia/tegra210/Kconfig +src/soc/nvidia/tegra210/mtc.c +src/southbridge/intel/common/firmware/Kconfig +src/mainboard/google/cyan/spd/spd.c +src/mainboard/google/cyan/Kconfig +src/mainboard/google/glados/spd/spd.c +src/mainboard/intel/sklrvp/spd/spd.c +src/mainboard/intel/kunimitsu/spd/spd.c +src/mainboard/intel/strago/spd/spd.c +src/mainboard/intel/strago/Kconfig +src/mainboard/amd/bettong/mptable.c +src/northbridge/amd/pi/00660F01/Kconfig +util/crossgcc/patches/gcc-5.2.0_riscv.patch +util/xcompile/xcompile +src/northbridge/intel/sandybridge/raminit_mrc.c +src/northbridge/intel/fsp_rangeley/fsp/Kconfig +src/drivers/intel/fsp1_1/car.c +src/mainboard/intel/mohonpeak/Kconfig +src/mainboard/apple/macbookair4_2/early_southbridge.c +src/cpu/intel/fsp_model_406dx/acpi.c +src/northbridge/intel/fsp_sandybridge/fsp/Kconfig +src/drivers/aspeed/common/ast_dram_tables.h +src/drivers/aspeed/common/ast_tables.h +src/mainboard/intel/cougar_canyon2/Kconfig +src/cpu/amd/family_10h-family_15h/processor_name.c +src/cpu/amd/family_10h-family_15h/init_cpus.c +src/cpu/intel/fsp_model_206ax/acpi.c diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/coreboot/1bf5e6409678d04fd15f9625460078853118521c/nonblobs_notes @@ -0,0 +1,15 @@ +.spd.hex files - serial presence detect. These are not blobs +see JEDEC standard or https://en.wikipedia.org/wiki/Serial_presence_detect +These are added to the nonblobs file + +src/northbridge/intel/nehalem/raminit_tables.c" +src/northbridge/intel/sandybridge/raminit_patterns.h +These are used by native raminit for the relevant platforms, and are not blobs + +"src/southbridge/nvidia/mcp55/early_setup_ss.h" \ +"src/southbridge/nvidia/ck804/early_setup_ss.h" \ +"src/southbridge/sis/sis966/early_setup_ss.h" +not blobs + +The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must +be made under the same license. diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/blobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/blobs.list @@ -1,52 +0,0 @@ -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c -src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c -src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h -src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h -src/vendorcode/amd/cimx/rd890/HotplugFirmware.h -src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc -src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h -src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/nonblobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/nonblobs.list @@ -1,335 +0,0 @@ -payloads/libpayload/curses/PDCurses-3.4/demos/worm.c -payloads/libpayload/curses/PDCurses-3.4/sdl1/deffont.h -payloads/libpayload/curses/PDCurses-3.4/sdl1/deficon.h -payloads/libpayload/curses/PDCurses-3.4/win32/pdckbd.c -payloads/libpayload/curses/PDCurses-3.4/x11/big_icon.xbm -payloads/libpayload/curses/PDCurses-3.4/x11/little_icon.xbm -payloads/libpayload/curses/pdcurses-backend/pdcdisp.c -payloads/libpayload/curses/tinycurses.c -payloads/libpayload/drivers/keyboard.c -payloads/libpayload/drivers/usb/usbmsc.c -payloads/libpayload/tests/cbfs-x86-test.c -payloads/nvramcui/payload.sh -src/cpu/allwinner/a10/raminit.c -src/cpu/amd/geode_gx2/Kconfig -src/cpu/amd/geode_lx/cpureginit.c -src/cpu/amd/geode_lx/Kconfig -src/cpu/amd/model_10xxx/init_cpus.c -src/cpu/amd/model_10xxx/processor_name.c -src/cpu/amd/model_fxx/model_fxx_update_microcode.c -src/cpu/amd/model_fxx/powernow_acpi.c -src/cpu/intel/haswell/acpi.c -src/cpu/intel/microcode/microcode.c -src/cpu/intel/model_2065x/acpi.c -src/cpu/intel/model_206ax/acpi.c -src/cpu/Kconfig -src/cpu/samsung/exynos5250/update-bl1.sh -src/cpu/via/nano/update_ucode.c -src/device/dram/spd_cache.c -src/device/Kconfig -src/device/oprom/yabel/interrupt.c -src/drivers/pc80/mc146818rtc.c -src/drivers/pc80/vga/vga_palette.c -src/Kconfig -src/lib/coreboot_table.c -src/lib/jpeg.c -src/mainboard/advansus/a785e-i/mptable.c -src/mainboard/amd/bimini_fam10/mptable.c -src/mainboard/amd/dinar/buildOpts.c -src/mainboard/amd/dinar/Kconfig -src/mainboard/amd/inagua/Kconfig -src/mainboard/amd/olivehill/mptable.c -src/mainboard/amd/olivehillplus/mptable.c -src/mainboard/amd/parmer/mptable.c -src/mainboard/amd/persimmon/Kconfig -src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c -src/mainboard/amd/south_station/Kconfig -src/mainboard/amd/south_station/mptable.c -src/mainboard/amd/thatcher/mptable.c -src/mainboard/amd/torpedo/Kconfig -src/mainboard/amd/torpedo/mptable.c -src/mainboard/amd/union_station/Kconfig -src/mainboard/amd/union_station/mptable.c -src/mainboard/asrock/e350m1/mptable.c -src/mainboard/asrock/imb-a180/mptable.c -src/mainboard/asus/f2a85-m/mptable.c -src/mainboard/asus/m5a88-v/mptable.c -src/mainboard/avalue/eax-785e/mptable.c -src/mainboard/digitallogic/adl855pc/irq_tables.c -src/mainboard/gigabyte/ga-b75m-d3h/romstage.c -src/mainboard/gizmosphere/gizmo2/Micron_MT41J128M16JT.spd.hex -src/mainboard/gizmosphere/gizmo/mptable.c -src/mainboard/google/bolt/romstage.c -src/mainboard/google/butterfly/hda_verb.c -src/mainboard/google/butterfly/mainboard.c -src/mainboard/google/falco/romstage.c -src/mainboard/google/link/hda_verb.c -src/mainboard/google/link/i915.c -src/mainboard/google/link/romstage.c -src/mainboard/google/panther/lan.c -src/mainboard/google/peach_pit/mainboard.c -src/mainboard/google/peppy/romstage.c -src/mainboard/google/rambi/romstage.c -src/mainboard/google/samus/romstage.c -src/mainboard/google/slippy/romstage.c -src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c -src/mainboard/hp/pavilion_m6_1035dx/mptable.c -src/mainboard/ibase/mb899/cmos.layout -src/mainboard/ibase/mb899/superio_hwm.c -src/mainboard/intel/minnowmax/Kconfig -src/mainboard/intel/wtm2/i915.c -src/mainboard/jetway/nf81-t56n-lf/Kconfig -src/mainboard/kontron/986lcd-m/cmos.layout -src/mainboard/kontron/986lcd-m/mainboard.c -src/mainboard/lenovo/g505s/mptable.c -src/mainboard/lippert/frontrunner-af/Kconfig -src/mainboard/lippert/frontrunner-af/mptable.c -src/mainboard/lippert/toucan-af/Kconfig -src/mainboard/lippert/toucan-af/mptable.c -src/mainboard/msi/ms9652_fam10/get_bus_conf.c -src/mainboard/packardbell/ms2290/mainboard.c -src/mainboard/samsung/lumpy/romstage.c -src/mainboard/siemens/sitemp_g1p1/cmos.layout -src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c -src/mainboard/supermicro/h8qgi/buildOpts.c -src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c -src/mainboard/supermicro/h8scm/buildOpts.c -src/mainboard/tyan/s2912_fam10/get_bus_conf.c -src/mainboard/tyan/s4880/irq_tables.c -src/mainboard/tyan/s4882/irq_tables.c -src/mainboard/tyan/s8226/buildOpts.c -src/northbridge/amd/agesa/common/common.c -src/northbridge/amd/amdk8/acpi.c -src/northbridge/amd/amdk8/coherent_ht.c -src/northbridge/amd/amdk8/raminit_test.c -src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c -src/northbridge/amd/amdmct/mct/mctardk3.c -src/northbridge/amd/amdmct/mct/mctardk4.c -src/northbridge/amd/amdmct/mct/mcttmrl.c -src/northbridge/amd/gx2/pll_reset.c -src/northbridge/amd/pi/00730F01/Kconfig -src/northbridge/intel/gm45/raminit_rcomp_calibration.c -src/northbridge/intel/gm45/raminit_read_write_training.c -src/northbridge/intel/haswell/Kconfig -src/northbridge/intel/haswell/raminit.c -src/northbridge/intel/i82830/vga.c -src/northbridge/intel/i945/raminit.c -src/northbridge/intel/nehalem/gma.c -src/northbridge/intel/nehalem/raminit.c -src/northbridge/intel/sandybridge/gma.c -src/northbridge/intel/sandybridge/Kconfig -src/northbridge/intel/sandybridge/raminit.c -src/northbridge/via/cx700/raminit.c -src/northbridge/via/vx800/ide.c -src/northbridge/via/vx800/uma_ram_setting.c -src/northbridge/via/vx900/sata.c -src/soc/intel/baytrail/acpi.c -src/soc/intel/baytrail/Kconfig -src/soc/intel/baytrail/romstage/raminit.c -src/soc/intel/broadwell/acpi.c -src/soc/intel/broadwell/Kconfig -src/soc/intel/broadwell/romstage/raminit.c -src/soc/intel/fsp_baytrail/acpi.c -src/soc/intel/fsp_baytrail/fsp/Kconfig -src/soc/intel/fsp_baytrail/Kconfig -src/soc/qualcomm/ipq806x/Kconfig -src/soc/samsung/exynos5250/clock.c -src/soc/samsung/exynos5420/clock.c -src/southbridge/amd/agesa/hudson/Kconfig -src/southbridge/amd/cimx/sb800/Kconfig -src/southbridge/intel/bd82x6x/Kconfig -src/southbridge/intel/i82801ix/dmi_setup.c -src/southbridge/intel/ibexpeak/Kconfig -src/southbridge/intel/lynxpoint/Kconfig -src/southbridge/intel/sch/Kconfig -src/southbridge/sis/sis966/early_smbus.c -src/southbridge/sis/sis966/ide.c -src/southbridge/sis/sis966/sata.c -src/southbridge/sis/sis966/usb2.c -src/southbridge/sis/sis966/usb.c -src/superio/via/vt1211/vt1211.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c -src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c -src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c -src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c -src/vendorcode/amd/agesa/f15/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f15/Proc/Mem/Ps/OR/mpor3.c -src/vendorcode/amd/agesa/f15/Proc/Mem/Tech/DDR3/mtlrdimm3.c -src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c -src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c -src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c -src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16WheaInitDataTables.c -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.c -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c -src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpkb3.c -src/vendorcode/amd/cimx/sb800/SATA.c -src/vendorcode/google/chromeos/build-snow -util/amdtools/example_input/lspci-cb-48G-667MHz-18.2-20090909e -util/amdtools/example_input/lspci-prop-48G-667MHz-18.2 -util/cbfstool/linux_trampoline.c -util/ifdtool/ifdtool.c -util/kconfig/zconf.hash.c_shipped -util/kconfig/zconf.lex.c_shipped -util/kconfig/zconf.tab.c_shipped -util/nvramtool/accessors/layout-bin.c -util/romcc/do_tests.sh -util/romcc/tests/include/linux_console.h -util/romcc/tests/linux_console.h -util/romcc/tests/linux_test5.c -util/romcc/tests/raminit_test6.c -util/romcc/tests/raminit_test7.c -util/romcc/tests/simple_test14.c -util/romcc/tests/simple_test30.c -util/romcc/tests/simple_test38.c -util/romcc/tests/simple_test39.c -util/romcc/tests/simple_test54.c -util/romcc/tests/simple_test59.c -util/romcc/tests/simple_test72.c -util/romcc/tests/simple_test73.c -util/sconfig/lex.yy.c_shipped -util/sconfig/sconfig.tab.c_shipped -util/superiotool/fintek.c -util/superiotool/ite.c -util/superiotool/smsc.c -util/superiotool/winbond.c -src/mainboard/google/slippy/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/falco/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/peppy/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/link/micron_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/rambi/spd/micron_1GiB_dimm_MT41K128M16JT-125.spd.hex -src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex -src/mainboard/google/bolt/micron_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/link/samsung_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/link/elpida_4Gb_1600_x16.spd.hex -src/mainboard/google/slippy/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/falco/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/falco/Elpida_EDJ4216EFBG.spd.hex -src/mainboard/google/rambi/spd/hynix_1GiB_dimm_H5TC2G63FFR-PBA.spd.hex -src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex -src/mainboard/google/bolt/samsung_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/bolt/elpida_4Gb_1600_x16.spd.hex -src/mainboard/google/peppy/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/peppy/Elpida_EDJ4216EFBG.spd.hex -src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex -src/mainboard/google/samus/spd/empty.spd.hex -src/mainboard/google/samus/spd/elpida_4.spd.hex -src/mainboard/google/samus/spd/hynix_4.spd.hex -src/mainboard/google/samus/spd/elpida_16.spd.hex -src/mainboard/google/samus/spd/hynix_8.spd.hex -src/mainboard/google/samus/spd/hynix_16.spd.hex -src/mainboard/google/samus/spd/samsung_8.spd.hex -src/mainboard/google/samus/spd/elpida_8.spd.hex -src/mainboard/google/samus/spd/samsung_4.spd.hex -src/mainboard/google/auron/spd/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/auron/spd/Elpida_EDJ4216EFBG.spd.hex -src/mainboard/google/auron/spd/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex -src/mainboard/google/auron/spd/empty.spd.hex -src/mainboard/google/cyan/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex -src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex -src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex -src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTALAR.spd.hex -src/mainboard/google/glados/spd/empty.spd.hex -src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR.spd.hex -src/mainboard/intel/sklrvp/spd/empty.spd.hex -src/mainboard/intel/sklrvp/spd/rvp3.spd.hex -src/mainboard/intel/kunimitsu/spd/empty.spd.hex -src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex -src/mainboard/intel/strago/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex -src/mainboard/intel/strago/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex -src/mainboard/intel/strago/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex -src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex -src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex -src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex -src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex -src/mainboard/bap/ode_e20XX/BAP_Q7.spd.hex -src/northbridge/intel/nehalem/raminit_tables.c -src/northbridge/intel/sandybridge/raminit_patterns.h -src/southbridge/nvidia/mcp55/early_setup_ss.h -src/southbridge/nvidia/ck804/early_setup_ss.h -src/southbridge/sis/sis966/early_setup_ss.h -util/crossgcc/patches/binutils-2.25_riscv.patch -src/southbridge/amd/pi/hudson/Kconfig -src/drivers/xgi/common/vb_setmode.c -src/drivers/xgi/common/vb_table.h -src/drivers/xgi/common/XGI_main.h -src/mainboard/siemens/mc_tcu3/romstage.c -src/mainboard/siemens/mc_tcu3/lcd_panel.c -src/mainboard/siemens/mc_tcu3/modhwinfo.c -src/mainboard/pcengines/apu1/Kconfig -src/mainboard/asus/kfsn4-dre/get_bus_conf.c -src/mainboard/google/samus/spd/spd.c -src/mainboard/hp/abm/mptable.c -src/northbridge/amd/pi/00630F01/Kconfig -src/cpu/amd/microcode/microcode.c -src/lib/tlcl_structures.h -util/rockchip/make_idb.py -util/autoport/readme.md -util/bimgtool/bimgtool.c -util/cbfstool/fmd_parser.c_shipped -util/cbfstool/fmd_scanner.c_shipped -Documentation/CorebootBuildingGuide.tex -Documentation/hypertransport.svg -Documentation/codeflow.svg -src/soc/broadcom/cygnus/ddr_init.c -src/soc/broadcom/cygnus/ddr_init_table.c -src/soc/qualcomm/ipq806x/lcc.c -src/soc/intel/braswell/acpi.c -src/soc/intel/braswell/Kconfig -src/vendorcode/amd/pi/Kconfig -src/drivers/intel/fsp1_1/Kconfig -src/drivers/intel/fsp1_1/fsp_gop.c -src/drivers/i2c/ww_ring/ww_ring_programs.c -src/mainboard/google/auron/spd/spd.c -src/mainboard/google/jecht/lan.c -src/mainboard/gigabyte/ga-b75m-d3v/romstage.c -src/mainboard/amd/lamar/Kconfig -payloads/external/GRUB2/Kconfig -payloads/external/FILO/Kconfig -payloads/external/SeaBIOS/Kconfig -src/soc/intel/common/fsp_ramstage.c -src/soc/intel/skylake/Kconfig -src/soc/intel/braswell/gpio.c -src/soc/nvidia/tegra210/Kconfig -src/soc/nvidia/tegra210/mtc.c -src/southbridge/intel/common/firmware/Kconfig -src/mainboard/google/cyan/spd/spd.c -src/mainboard/google/cyan/Kconfig -src/mainboard/google/glados/spd/spd.c -src/mainboard/intel/sklrvp/spd/spd.c -src/mainboard/intel/kunimitsu/spd/spd.c -src/mainboard/intel/strago/spd/spd.c -src/mainboard/intel/strago/Kconfig -src/mainboard/amd/bettong/mptable.c -src/northbridge/amd/pi/00660F01/Kconfig -util/crossgcc/patches/gcc-5.2.0_riscv.patch -util/xcompile/xcompile -src/northbridge/intel/sandybridge/raminit_mrc.c -src/northbridge/intel/fsp_rangeley/fsp/Kconfig -src/drivers/intel/fsp1_1/car.c -src/mainboard/intel/mohonpeak/Kconfig -src/mainboard/apple/macbookair4_2/early_southbridge.c -src/cpu/intel/fsp_model_406dx/acpi.c -src/northbridge/intel/fsp_sandybridge/fsp/Kconfig -src/drivers/aspeed/common/ast_dram_tables.h -src/drivers/aspeed/common/ast_tables.h -src/mainboard/intel/cougar_canyon2/Kconfig -src/cpu/amd/family_10h-family_15h/processor_name.c -src/cpu/amd/family_10h-family_15h/init_cpus.c -src/cpu/intel/fsp_model_206ax/acpi.c diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/nonblobs_notes @@ -1,15 +0,0 @@ -.spd.hex files - serial presence detect. These are not blobs -see JEDEC standard or https://en.wikipedia.org/wiki/Serial_presence_detect -These are added to the nonblobs file - -src/northbridge/intel/nehalem/raminit_tables.c" -src/northbridge/intel/sandybridge/raminit_patterns.h -These are used by native raminit for the relevant platforms, and are not blobs - -"src/southbridge/nvidia/mcp55/early_setup_ss.h" \ -"src/southbridge/nvidia/ck804/early_setup_ss.h" \ -"src/southbridge/sis/sis966/early_setup_ss.h" -not blobs - -The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must -be made under the same license. diff --git a/resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/blobs.list b/resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/blobs.list @@ -0,0 +1,19 @@ +3rdparty/vboot/tests/futility/data/bios_link_mp.bin +3rdparty/vboot/tests/futility/data/bios_mario_mp.bin +3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin +3rdparty/vboot/tests/futility/data/bios_zgb_mp.bin +3rdparty/vboot/tests/futility/data/dingdong.signed +3rdparty/vboot/tests/futility/data/dingdong.unsigned +3rdparty/vboot/tests/futility/data/fw_gbb.bin +3rdparty/vboot/tests/futility/data/fw_vblock.bin +3rdparty/vboot/tests/futility/data/hoho.signed +3rdparty/vboot/tests/futility/data/hoho.unsigned +3rdparty/vboot/tests/futility/data/kern_preamble.bin +3rdparty/vboot/tests/futility/data/minimuffin.signed +3rdparty/vboot/tests/futility/data/minimuffin.unsigned +3rdparty/vboot/tests/futility/data/rec_kernel_part.bin +3rdparty/vboot/tests/futility/data/vmlinuz-amd64.bin +3rdparty/vboot/tests/futility/data/vmlinuz-arm.bin +3rdparty/vboot/tests/futility/data/zinger_mp_image.bin +3rdparty/vboot/tests/futility/data/zinger.signed +3rdparty/vboot/tests/futility/data/zinger.unsigned diff --git a/resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/nonblobs.list b/resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/nonblobs.list @@ -0,0 +1,29 @@ +3rdparty/vboot/scripts/image_signing/tofactory.sh +3rdparty/vboot/scripts/image_signing/sign_official_build.sh +3rdparty/vboot/scripts/image_signing/tag_image.sh +3rdparty/vboot/scripts/image_signing/make_dev_ssd.sh +3rdparty/vboot/scripts/image_signing/strip_boot_from_image.sh +3rdparty/vboot/tests/crc32_test.c +3rdparty/vboot/tests/vb2_api_tests.c +3rdparty/vboot/tests/run_vbutil_kernel_arg_tests.sh +3rdparty/vboot/tests/sha_test_vectors.h +3rdparty/vboot/tests/vb21_host_misc_tests.c +3rdparty/vboot/tests/rsa_padding_test.h +3rdparty/vboot/tests/gen_preamble_testdata.sh +3rdparty/vboot/tests/load_kernel_tests.sh +3rdparty/vboot/tests/cgptlib_test.c +3rdparty/vboot/tests/futility/test_file_types.sh +3rdparty/vboot/tests/futility/test_file_types.c +3rdparty/vboot/tests/futility/test_dump_fmap.sh +3rdparty/vboot/firmware/2lib/2sha512.c +3rdparty/vboot/firmware/2lib/2sha256.c +3rdparty/vboot/firmware/lib/cryptolib/sha512.c +3rdparty/vboot/firmware/lib/cryptolib/sha256.c +3rdparty/vboot/firmware/lib/tpm_lite/include/tlcl_structures.h +3rdparty/vboot/utility/bmpblk_font.c +3rdparty/vboot/utility/vbutil_what_keys +3rdparty/vboot/cgpt/cgpt_wrapper.c +3rdparty/vboot/futility/cmd_gbb_utility.c +3rdparty/vboot/firmware/lib/cgptlib/crc32.c +3rdparty/vboot/firmware/lib/cryptolib/padding.c +3rdparty/vboot/tests/testcases/padding_test_vectors.inc diff --git a/resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/vboot/933c4e7aa4b873f0ad9cd4c348a1ea4f37f66aa7/nonblobs_notes @@ -0,0 +1,5 @@ +./3rdparty/vboot/tests/testcases/padding_test_vectors.inc +It's not a blob, see tests/rsa_padding_test.h for explanation. + +The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must +be made under the same license. diff --git a/resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/blobs.list b/resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/blobs.list @@ -1,19 +0,0 @@ -3rdparty/vboot/tests/futility/data/bios_link_mp.bin -3rdparty/vboot/tests/futility/data/bios_mario_mp.bin -3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin -3rdparty/vboot/tests/futility/data/bios_zgb_mp.bin -3rdparty/vboot/tests/futility/data/dingdong.signed -3rdparty/vboot/tests/futility/data/dingdong.unsigned -3rdparty/vboot/tests/futility/data/fw_gbb.bin -3rdparty/vboot/tests/futility/data/fw_vblock.bin -3rdparty/vboot/tests/futility/data/hoho.signed -3rdparty/vboot/tests/futility/data/hoho.unsigned -3rdparty/vboot/tests/futility/data/kern_preamble.bin -3rdparty/vboot/tests/futility/data/minimuffin.signed -3rdparty/vboot/tests/futility/data/minimuffin.unsigned -3rdparty/vboot/tests/futility/data/rec_kernel_part.bin -3rdparty/vboot/tests/futility/data/vmlinuz-amd64.bin -3rdparty/vboot/tests/futility/data/vmlinuz-arm.bin -3rdparty/vboot/tests/futility/data/zinger_mp_image.bin -3rdparty/vboot/tests/futility/data/zinger.signed -3rdparty/vboot/tests/futility/data/zinger.unsigned diff --git a/resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/nonblobs.list b/resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/nonblobs.list @@ -1,29 +0,0 @@ -3rdparty/vboot/scripts/image_signing/tofactory.sh -3rdparty/vboot/scripts/image_signing/sign_official_build.sh -3rdparty/vboot/scripts/image_signing/tag_image.sh -3rdparty/vboot/scripts/image_signing/make_dev_ssd.sh -3rdparty/vboot/scripts/image_signing/strip_boot_from_image.sh -3rdparty/vboot/tests/crc32_test.c -3rdparty/vboot/tests/vb2_api_tests.c -3rdparty/vboot/tests/run_vbutil_kernel_arg_tests.sh -3rdparty/vboot/tests/sha_test_vectors.h -3rdparty/vboot/tests/vb21_host_misc_tests.c -3rdparty/vboot/tests/rsa_padding_test.h -3rdparty/vboot/tests/gen_preamble_testdata.sh -3rdparty/vboot/tests/load_kernel_tests.sh -3rdparty/vboot/tests/cgptlib_test.c -3rdparty/vboot/tests/futility/test_file_types.sh -3rdparty/vboot/tests/futility/test_file_types.c -3rdparty/vboot/tests/futility/test_dump_fmap.sh -3rdparty/vboot/firmware/2lib/2sha512.c -3rdparty/vboot/firmware/2lib/2sha256.c -3rdparty/vboot/firmware/lib/cryptolib/sha512.c -3rdparty/vboot/firmware/lib/cryptolib/sha256.c -3rdparty/vboot/firmware/lib/tpm_lite/include/tlcl_structures.h -3rdparty/vboot/utility/bmpblk_font.c -3rdparty/vboot/utility/vbutil_what_keys -3rdparty/vboot/cgpt/cgpt_wrapper.c -3rdparty/vboot/futility/cmd_gbb_utility.c -3rdparty/vboot/firmware/lib/cgptlib/crc32.c -3rdparty/vboot/firmware/lib/cryptolib/padding.c -3rdparty/vboot/tests/testcases/padding_test_vectors.inc diff --git a/resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/vboot/fbf631c845c08299f0bcbae3f311c5807d34c0d6/nonblobs_notes @@ -1,5 +0,0 @@ -./3rdparty/vboot/tests/testcases/padding_test_vectors.inc -It's not a blob, see tests/rsa_padding_test.h for explanation. - -The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must -be made under the same license.