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commit b080306b2c082c226d5d327df16c34d1d97ddc92
parent ca1528915f80ecef86f6b0041511e3de96a92e86
Author: Timothy Pearson <tpearson@raptorengineeringinc.com>
Date:   Mon, 11 Apr 2016 21:52:41 +0000

asus/kgpe-d116|kcma-d8: Update coreboot to latest version

Diffstat:
resources/libreboot/config/grub/kcma-d8/cbrevision | 2+-
resources/libreboot/config/grub/kgpe-d16/cbrevision | 2+-
resources/libreboot/config/seabios/kcma-d8/cbrevision | 2+-
resources/libreboot/config/seabios/kgpe-d16/cbrevision | 2+-
resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89-------------------------------------------------------------------------------
resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89-------------------------------------------------------------------------------
resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89-------------------------------------------------------------------------------
resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89-------------------------------------------------------------------------------
resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89-------------------------------------------------------------------------------
resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch | 89+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/blobs.list | 52----------------------------------------------------
resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs.list | 335-------------------------------------------------------------------------------
resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs_notes | 15---------------
resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/blobs.list | 52++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs.list | 335+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs_notes | 15+++++++++++++++
20 files changed, 851 insertions(+), 851 deletions(-)

diff --git a/resources/libreboot/config/grub/kcma-d8/cbrevision b/resources/libreboot/config/grub/kcma-d8/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/config/grub/kgpe-d16/cbrevision b/resources/libreboot/config/grub/kgpe-d16/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/config/seabios/kcma-d8/cbrevision b/resources/libreboot/config/seabios/kcma-d8/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/config/seabios/kgpe-d16/cbrevision b/resources/libreboot/config/seabios/kgpe-d16/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe <info@gluglug.org.uk> -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe <info@gluglug.org.uk> -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe <info@gluglug.org.uk> -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe <info@gluglug.org.uk> -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe <info@gluglug.org.uk> -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe <info@gluglug.org.uk> +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe <info@gluglug.org.uk> +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe <info@gluglug.org.uk> +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe <info@gluglug.org.uk> +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe <info@gluglug.org.uk> +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/blobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/blobs.list @@ -1,52 +0,0 @@ -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c -src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c -src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h -src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h -src/vendorcode/amd/cimx/rd890/HotplugFirmware.h -src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc -src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h -src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs.list @@ -1,335 +0,0 @@ -payloads/libpayload/curses/PDCurses-3.4/demos/worm.c -payloads/libpayload/curses/PDCurses-3.4/sdl1/deffont.h -payloads/libpayload/curses/PDCurses-3.4/sdl1/deficon.h -payloads/libpayload/curses/PDCurses-3.4/win32/pdckbd.c -payloads/libpayload/curses/PDCurses-3.4/x11/big_icon.xbm -payloads/libpayload/curses/PDCurses-3.4/x11/little_icon.xbm -payloads/libpayload/curses/pdcurses-backend/pdcdisp.c -payloads/libpayload/curses/tinycurses.c -payloads/libpayload/drivers/keyboard.c -payloads/libpayload/drivers/usb/usbmsc.c -payloads/libpayload/tests/cbfs-x86-test.c -payloads/nvramcui/payload.sh -src/cpu/allwinner/a10/raminit.c -src/cpu/amd/geode_gx2/Kconfig -src/cpu/amd/geode_lx/cpureginit.c -src/cpu/amd/geode_lx/Kconfig -src/cpu/amd/model_10xxx/init_cpus.c -src/cpu/amd/model_10xxx/processor_name.c -src/cpu/amd/model_fxx/model_fxx_update_microcode.c -src/cpu/amd/model_fxx/powernow_acpi.c -src/cpu/intel/haswell/acpi.c -src/cpu/intel/microcode/microcode.c -src/cpu/intel/model_2065x/acpi.c -src/cpu/intel/model_206ax/acpi.c -src/cpu/Kconfig -src/cpu/samsung/exynos5250/update-bl1.sh -src/cpu/via/nano/update_ucode.c -src/device/dram/spd_cache.c -src/device/Kconfig -src/device/oprom/yabel/interrupt.c -src/drivers/pc80/mc146818rtc.c -src/drivers/pc80/vga/vga_palette.c -src/Kconfig -src/lib/coreboot_table.c -src/lib/jpeg.c -src/mainboard/advansus/a785e-i/mptable.c -src/mainboard/amd/bimini_fam10/mptable.c -src/mainboard/amd/dinar/buildOpts.c -src/mainboard/amd/dinar/Kconfig -src/mainboard/amd/inagua/Kconfig -src/mainboard/amd/olivehill/mptable.c -src/mainboard/amd/olivehillplus/mptable.c -src/mainboard/amd/parmer/mptable.c -src/mainboard/amd/persimmon/Kconfig -src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c 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-src/northbridge/intel/sandybridge/raminit_mrc.c -src/northbridge/intel/fsp_rangeley/fsp/Kconfig -src/drivers/intel/fsp1_1/car.c -src/mainboard/intel/mohonpeak/Kconfig -src/mainboard/apple/macbookair4_2/early_southbridge.c -src/cpu/intel/fsp_model_406dx/acpi.c -src/northbridge/intel/fsp_sandybridge/fsp/Kconfig -src/drivers/aspeed/common/ast_dram_tables.h -src/drivers/aspeed/common/ast_tables.h -src/mainboard/intel/cougar_canyon2/Kconfig -src/cpu/amd/family_10h-family_15h/processor_name.c -src/cpu/amd/family_10h-family_15h/init_cpus.c -src/cpu/intel/fsp_model_206ax/acpi.c diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs_notes @@ -1,15 +0,0 @@ -.spd.hex files - serial presence detect. These are not blobs -see JEDEC standard or https://en.wikipedia.org/wiki/Serial_presence_detect -These are added to the nonblobs file - -src/northbridge/intel/nehalem/raminit_tables.c" -src/northbridge/intel/sandybridge/raminit_patterns.h -These are used by native raminit for the relevant platforms, and are not blobs - -"src/southbridge/nvidia/mcp55/early_setup_ss.h" \ -"src/southbridge/nvidia/ck804/early_setup_ss.h" \ -"src/southbridge/sis/sis966/early_setup_ss.h" -not blobs - -The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must -be made under the same license. diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/blobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/blobs.list @@ -0,0 +1,52 @@ +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c +src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c 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+payloads/external/FILO/Kconfig +payloads/external/SeaBIOS/Kconfig +src/soc/intel/common/fsp_ramstage.c +src/soc/intel/skylake/Kconfig +src/soc/intel/braswell/gpio.c +src/soc/nvidia/tegra210/Kconfig +src/soc/nvidia/tegra210/mtc.c +src/southbridge/intel/common/firmware/Kconfig +src/mainboard/google/cyan/spd/spd.c +src/mainboard/google/cyan/Kconfig +src/mainboard/google/glados/spd/spd.c +src/mainboard/intel/sklrvp/spd/spd.c +src/mainboard/intel/kunimitsu/spd/spd.c +src/mainboard/intel/strago/spd/spd.c +src/mainboard/intel/strago/Kconfig +src/mainboard/amd/bettong/mptable.c +src/northbridge/amd/pi/00660F01/Kconfig +util/crossgcc/patches/gcc-5.2.0_riscv.patch +util/xcompile/xcompile +src/northbridge/intel/sandybridge/raminit_mrc.c +src/northbridge/intel/fsp_rangeley/fsp/Kconfig +src/drivers/intel/fsp1_1/car.c +src/mainboard/intel/mohonpeak/Kconfig +src/mainboard/apple/macbookair4_2/early_southbridge.c +src/cpu/intel/fsp_model_406dx/acpi.c +src/northbridge/intel/fsp_sandybridge/fsp/Kconfig +src/drivers/aspeed/common/ast_dram_tables.h +src/drivers/aspeed/common/ast_tables.h +src/mainboard/intel/cougar_canyon2/Kconfig +src/cpu/amd/family_10h-family_15h/processor_name.c +src/cpu/amd/family_10h-family_15h/init_cpus.c +src/cpu/intel/fsp_model_206ax/acpi.c diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs_notes @@ -0,0 +1,15 @@ +.spd.hex files - serial presence detect. These are not blobs +see JEDEC standard or https://en.wikipedia.org/wiki/Serial_presence_detect +These are added to the nonblobs file + +src/northbridge/intel/nehalem/raminit_tables.c" +src/northbridge/intel/sandybridge/raminit_patterns.h +These are used by native raminit for the relevant platforms, and are not blobs + +"src/southbridge/nvidia/mcp55/early_setup_ss.h" \ +"src/southbridge/nvidia/ck804/early_setup_ss.h" \ +"src/southbridge/sis/sis966/early_setup_ss.h" +not blobs + +The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must +be made under the same license.