libreboot

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commit e3065addba58b99eff932030f0a5170ed17743f7
parent d87eb3639ea31142de06c52c90a8251cb6ae43b6
Author: Leah Woods <info@minifree.org>
Date:   Sun, 22 May 2016 02:11:56 +0100

format documentation for 80 character line limit

This was done in Vim
:set tw=80
gqG

Diffstat:
docs/libreboot.texi | 13189+++++++++++++++++++++++++++++++++++++++++++------------------------------------
1 file changed, 7221 insertions(+), 5968 deletions(-)

diff --git a/docs/libreboot.texi b/docs/libreboot.texi @@ -4,6034 +4,7040 @@ @documentencoding UTF-8 -@ignore -A few notes: -- Nodes cannot share the same name in texinfo files. Therefore I had to change some of the node names. I usually did this by appending the name of the hardware in question to the original node name. -- I removed .html extensions from the text that displays for references, e.g. See bbb_setup.html --> See bbb_setup -- In texinfo, section numbering does not go below the @subsubsection level. Because the Table of Contents section is already a chapter, many sections do not have numbers and therefore do not appear in the texinfo-generated table of contents. +@ignore A few notes: +- Nodes cannot share the same name in texinfo files. Therefore I had to change + some of the node names. I usually did this by appending the name of the + hardware in question to the original node name. +- I removed .html extensions from the text that displays for references, e.g. + See bbb_setup.html --> See bbb_setup +- In texinfo, section numbering does not go below the @subsubsection level. + Because the Table of Contents section is already a chapter, many sections do + not have numbers and therefore do not appear in the texinfo-generated table of + contents. - I removed @anchor statements where they were unused (almost everywhere) -- The @copying section currently appears at the top of the page in html and info output for testing purposes. -TODO: +- The @copying section currently appears at the top of the page in html and info + output for testing purposes. TODO: - Images do not display in .info. Some nodes therefore appear blank. -- Some image files are contained in @uref statments -- consider changing to @image -- Some references to other sections of the documentation are in @emph statements -- consider changing to @ref +- Some image files are contained in @uref statments -- consider changing to + @image +- Some references to other sections of the documentation are in @emph statements + -- consider changing to @ref - Formatting pdf/ps/dvi output - Strikethrough - Internationalization - Structure: subsubheadings -- Suppliers page (../../suppliers)? -@end ignore - -@copying -Copyright @copyright{} 2014, 2015, 2016 Leah Woods <info@@minifree.org>@* -Copyright © 2015 Paul Kocialkowski <contact@@paulk.fr>@* -Copyright © 2015 Alex David <opdecirkel@@gmail.com>@* -Copyright © 2015 Patrick "P. J." McDermott <pj@@pehjota.net>@* -Copyright © 2015 Albin Söderqvist@* -Copyright © 2015 Jeroen Quint <jezza@@diplomail.ch>@* - -Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license can be found at @uref{../resources/licenses/gfdl-1.3.txt,gfdl-1.3.txt} - -Updated versions of the license (when available) can be found at @uref{https://www.gnu.org/licenses/licenses.html,https://www.gnu.org/licenses/licenses.html} - -@quotation -UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. - -TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. - -The disclaimer of warranties and limitation of liability provided above shall be interpreted in a manner that, to the extent possible, most closely approximates an absolute disclaimer and waiver of all liability. -@end quotation - -@end copying - -@ifnottex -@paragraphindent 0 -@end ifnottex - -@titlepage -@title GNU Libreboot documentation -@insertcopying -@end titlepage - -@ifnottex -@insertcopying -@end ifnottex - -@summarycontents -@contents - -@node Top -@top GNU Libreboot documentation -Information about this release can be found by consulting the release notes (see @ref{Libreboot release information,release}). Always check @uref{http://libreboot.org,libreboot.org} for updates. - -@menu -* Libreboot release information:: -* Table of contents:: -* About the libreboot project:: -* How do I know what version I'm running?:: - -Appendix -* GNU Free Documentation License:: -@end menu - -@node Libreboot release information -@chapter Libreboot release information -Release date: Day Month Year. - -Installation instructions can be found @ref{Installation,here}. Building instructions (for source code) can be found @ref{Building libreboot from source, here}. - -@menu -* Machines supported in this release:: -* Changes for this release relative to r20150518:: Earliest changes last, recent changes first -@end menu - -@node Machines supported in this release -@section Machines supported in this release: -@itemize -@item -@strong{ASUS Chromebook C201} -@itemize -@item -Check notes: @xref{ASUS Chromebook C201}. @c @strong{@emph{hcl/c201.html}} -@item -NOTE: not in libreboot 20150518. Only in git. for now. -@end itemize - -@item -@strong{Gigabyte GA-G41M-ES2L desktop board} -@itemize -@item -Check notes: @xref{Gigabyte GA-G41M-ES2L motherboard}. @c @strong{@emph{hcl/ga-g41m-es2l.html}} -@item -@strong{NOTE: not in libreboot 20150518. Only in git, for now.} -@end itemize - -@item -@strong{Intel D510MO desktop board} -@itemize -@item -Check notes: @xref{Intel D510MO motherboard}. @c @strong{@emph{hcl/d510mo.html}} -@item -@strong{NOTE: not in libreboot 20150518. Only in git, for now.} -@end itemize - -@item -@strong{ASUS KFSN4-DRE server board} -@itemize -@item -PCB revision 1.05G is the best version (can use 6-core CPUs) -@item -Check notes: @xref{ASUS KFSN4-DRE motherboard}. @c @strong{@emph{hcl/kfsn4-dre.html}} -@item -@strong{NOTE: not in libreboot 20150518. Only in git, for now.} -@end itemize - -@item -@strong{ASUS KGPE-D16 server board} -@itemize -@item -Check notes: @xref{ASUS KGPE-D16 motherboard}. @c @strong{@emph{hcl/kgpe-d16.html}} -@item -@strong{NOTE: not in libreboot 20150518. Only in git, for now.} -@end itemize - -@item -@strong{ASUS KCMA-D8 desktop/workstation board} -@itemize -@item -Check notes: @xref{ASUS KCMA-D8 motherboard}. @c @strong{@emph{hcl/kcma-d8.html}} -@item -@strong{NOTE: not in libreboot 20150518. Only in git, for now.} -@end itemize - -@item -@strong{ThinkPad X60/X60s} -@itemize -@item -You can also remove the motherboard from an X61/X61s and replace it with an X60/X60s motherboard. An X60 Tablet motherboard will also fit inside an X60/X60s. -@end itemize - -@item -@strong{ThinkPad X60 Tablet} (1024x768 and 1400x1050) with digitizer support -@itemize -@item -See @ref{Lenovo ThinkPad X60/X60s} for list of supported LCD panels -@item -It is unknown whether an X61 Tablet can have it's mainboard replaced with an X60 Tablet motherboard. -@end itemize - -@item -@strong{ThinkPad T60} (Intel GPU) (there are issues; see below): -@itemize -@item -See notes below for exceptions, and see @ref{Supported T60 list} for known working LCD panels. -@item -It is unknown whether a T61 can have it's mainboard replaced with a T60 motherboard. -@item -See @uref{https://libreboot.org/docs/future/index.html#t60_cpu_microcode} @c @strong{@emph{future/index.html#t60_cpu_microcode}}. -@item -T60P (and T60 laptops with ATI GPU) will likely never be supported: @xref{Lenovo ThinkPad T60}. @c @strong{@emph{hcl/index.html#t60_ati_intel}} -@end itemize - -@item -@strong{ThinkPad X200} -@itemize -@item -X200S and X200 Tablet are also supported, conditionally; @pxref{X200S and X200 Tablet}. @c @strong{@emph{hcl/x200.html#x200s}} -@item -@strong{ME/AMT}: libreboot removes this, permanently. @xref{GM45 chipsets - remove the ME}. @c @strong{@emph{hcl/gm45_remove_me.html}} -@end itemize - -@item -@strong{ThinkPad R400} -@itemize -@item -See @strong{@emph{hcl/r400.html}} -@item -@strong{ME/AMT}: libreboot removes this, permanently. @xref{GM45 chipsets - remove the ME}. @c @strong{@emph{hcl/gm45_remove_me.html}} -@end itemize - -@item -@strong{ThinkPad T400} -@itemize -@item -See @strong{@emph{hcl/t400.html}} -@item -@strong{ME/AMT}: libreboot removes this, permanently. @xref{GM45 chipsets - remove the ME}. @c @strong{@emph{hcl/gm45_remove_me.html}} -@end itemize - -@item -@strong{ThinkPad T500} -@itemize -@item -See @strong{@emph{hcl/t500.html}} -@item -@strong{ME/AMT}: libreboot removes this, permanently. @xref{GM45 chipsets - remove the ME}. @c @strong{@emph{hcl/gm45_remove_me.html}} -@end itemize - -@item -@strong{Apple MacBook1@comma{}1} (MA255LL/A, MA254LL/A, MA472LL/A) -@itemize -@item -@xref{Apple Macbook1-1,Macbook1@comma{}1}. @c See @strong{@emph{hcl/index.html#macbook11}}. -@end itemize - -@item -@strong{Apple MacBook2@comma{}1} (MA699LL/A, MA701LL/A, MB061LL/A, MA700LL/A, MB063LL/A, MB062LL/A) -@itemize -@item -@xref{Apple Macbook2-1,Macbook2@comma{}1}. @c See @strong{@emph{hcl/index.html#macbook21}}. -@end itemize - -@end itemize - -@node Changes for this release relative to r20150518 -@section Changes for this release, relative to r20150518 (earliest changes last, recent changes first) -@itemize -@item -Changelog not yet generated. Clone the git repository and check the git logs. -@end itemize - - -@node Table of contents -@chapter Table of contents - -@menu -* Hardware compatibility:: Hardware compatibility list -* Installation:: How to install libreboot -* GNU/Linux distributions:: How to install GNU/Linux on a libreboot system -* Git:: How to use the git repository and build/maintain libreboot from source -* Hardware security:: -* Hardware maintenance:: Hardware maintenance -* Depthcharge:: Depthcharge payload -* GRUB:: GRUB payload -* Miscellaneous:: -@end menu - - -@c -@c NOTE: this is one way of structuring the file I tried -@c -@ignore -@include include/hardware-compatibility.texi -@include include/installation.texi -@include include/installing-gnu-linux.texi -@include include/git.texi -@include include/security.texi -@include include/hardware-maintenance.texi -@include include/depthcharge-payload.texi -@include include/grub-payload.texi -@include include/misc.texi -@end ignore - -@node Hardware compatibility -@section Hardware compatibility -This section relates to known hardware compatibility in libreboot. - -@menu -* List of supported hardware:: -* Recommended wifi chipsets:: -* GM45 chipsets - remove the ME:: -* LCD compatibility on GM45 laptops:: -@end menu - -@node List of supported hardware -@subsection List of supported hardware -Libreboot supports the following systems in this release: -@itemize @bullet - -@item Desktops (AMD, Intel x86) -@itemize @minus -@item Gigabyte GA-G41M-ES2L motherboard @c (@xref{Gigabyte GA-G41M-ES2L motherboard}) -@item Intel D510MO motherboard @c (@xref{Intel D510MO motherboard}) -@item ASUS KCMA-D8 motherboard @c (@xref{ASUS KCMA-D8 motherboard}) -@end itemize - -@item Servers/workstations (AMD, x86) -@itemize @minus -@item ASUS KFSN4-DRE motherboard @c (@xref{ASUS KFSN4-DRE motherboard}) -@item ASUS KGPE-D16 motherboard @c (@xref{ASUS KGPE-D16 motherboard}) -@end itemize - -@item Laptops (ARM) -@itemize @minus -@item ASUS Chromebook C201 @c (@xref{ASUS Chromebook C201}) -@end itemize - -@item Laptops (Intel x86) -@itemize @minus -@item Lenovo ThinkPad X60/X60s @c (@xref{Lenovo ThinkPad X60/X60s}) -@item Lenovo ThinkPad X60 Tablet @c (@xref{Lenovo ThinkPad X60 Tablet}) -@item Lenovo ThinkPad T60 @c (@xref{Lenovo ThinkPad T60}) -@item Lenovo ThinkPad X200 @c (@xref{Lenovo ThinkPad X200}) -@item Lenovo ThinkPad R400 @c (@xref{Lenovo ThinkPad R400}) -@item Lenovo ThinkPad T400 @c (@xref{Lenovo ThinkPad T400}) -@item Lenovo ThinkPad T500 @c (@xref{Lenovo ThinkPad T500}) -@item Apple MacBook1,1 @c (@xref{Apple MacBook1,1}) -@item Apple MacBook2,1 @c (@xref{Apple MacBook2,1}) -@end itemize - -@end itemize - -`Supported' means that the build scripts know how to build ROM images for these systems, and that the systems have been tested (confirmed working). There may be exceptions; in other words, this is a list of `officially' supported systems. - -It is also possible to build ROM images (from source) for other systems (and virtual systems, e.g. QEMU). - - -@menu -* Gigabyte GA-G41M-ES2L motherboard:: -* Intel D510MO motherboard:: -* ASUS KCMA-D8 motherboard:: -* ASUS KFSN4-DRE motherboard:: -* ASUS KGPE-D16 motherboard:: -* ASUS Chromebook C201:: -* Lenovo ThinkPad X60/X60s:: -* Lenovo ThinkPad X60 Tablet:: -* Lenovo ThinkPad T60:: -* Lenovo ThinkPad X200:: -* Lenovo ThinkPad R400:: -* Lenovo ThinkPad T400:: -* Lenovo ThinkPad T500:: -* Apple Macbook1-1:: @c commas cannot be used in node names -* Apple Macbook2-1:: -@end menu - - - -@node Gigabyte GA-G41M-ES2L motherboard -@subsubsection Gigabyte GA-G41M-ES2L motherboard -This is a desktop board using intel hardware (circa ~2009, ICH7 southbridge, similar performance-wise to the Libreboot X200. It can make for quite a nifty desktop. Powered by libreboot. - -IDE on the board is untested, but it might be possible to use a SATA HDD using an IDE SATA adapter. The SATA ports do work. - -Read this post on the libreboot mailing list for more information: @uref{https://lists.nongnu.org/archive/html/libreboot-dev/2015-12/msg00011.html,https://lists.nongnu.org/archive/html/libreboot-dev/2015-12/msg00011.html} - -@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.} - -NOTE: the onboard NIC does not work when libreboot is installed. This is being investigated by damo22 in the libreboot IRC channel. - -Flashing instructions can be found at @ref{How to update/install,flashrom}. - - -@node Intel D510MO motherboard -@subsubsection Intel D510MO motherboard -This is a desktop board using intel hardware. It can make for quite a nifty desktop. Powered by libreboot. - -@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.} - -NOTE: video framebuffer currently unsupported, only text-mode works, even when booting GNU/Linux. -This can still be used for building a headlesss server. Boot with fb=false - -Flashing instructions can be found at @ref{Flashing Intel D510MO}. - - - -@node ASUS KCMA-D8 motherboard -@subsubsection ASUS KCMA-D8 motherboard -This is a desktop board using AMD hardware (Fam10h @strong{and Fam15h} CPUs available). It can also be used for building a high-powered workstation. Powered by libreboot. The coreboot port was done by Timothy Pearson of @uref{https://raptorengineeringinc.com/,Raptor Engineering Inc.} and, working with Timothy (and sponsoring the work) merged into libreboot. - -@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.} - -@strong{Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules..} - -Flashing instructions can be found at @ref{How to update/install,flashrom} - note that external flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is currently installed. If you already have libreboot, by default it is possible to re-flash using software running in GNU/Linux on the kcma-d8, without using external hardware. - -@itemize - -@item -CPU compatibility -@itemize -@item -@strong{Use Opteron 4200 series (works without microcode updates, including hw virt).} 4300 series needs microcode updates, so avoid those CPUs. 4100 series is too old, and mostly untested. -@end itemize - -@item -Board status compatibility -@itemize -@item -See @uref{https://raptorengineeringinc.com/coreboot/kcma-d8-status.php,https://raptorengineeringinc.com/coreboot/kcma-d8-status.php}. -@end itemize - -@item -Form factor -@itemize -@item -These boards use the SSI EEB 3.61 form factor; make sure that your case supports this. This form factor is similar to E-ATX in that the size is identical, but the position of the screws are different. -@end itemize - -@item -IPMI iKVM module add-on -@itemize -@item -Don't use it. It uses proprietary firmware and adds a backdoor (remote out-of-band management chip, similar to the @uref{http://libreboot.org/faq/#intelme,Intel Management Engine}. Fortunately, the firmware is unsigned (possibly to replace) and physically separate from the mainboard since it's on the add-on module, which you don't have to install. -@end itemize - -@item -Flash chips -@itemize -@item -2MiB flash chips are included by default, on these boards. It's on a P-DIP 8 slot (SPI chip). The flash chip can be upgraded to higher sizes: 4MiB, 8MiB or 16MiB. With at least 8MiB, you could feasibly fit a compressed linux+initramfs image (BusyBox+Linux system) into CBFS and boot that, loading it into memory. -@item -Libreboot has configs for 2, 4, 8 and 16 MiB flash chip sizes (default flash chip is 2MiB). -@item -@strong{DO NOT hot-swap the chip with your bare hands. Use a P-DIP 8 chip extractor. These can be found online. See @uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} -@end itemize - -@item -Native graphics initialization -@anchor{native-graphics-kcma-d8} -@itemize -@item -Only text-mode is known to work, but linux(kernel) can initialize the framebuffer display (if it has KMS - kernel mode setting). -@end itemize - -@item -Current issues -@itemize -@item -LRDIMM memory modules are currently incompatible -@item -SAS (via PIKE 2008 module) requires non-free option ROM (and SeaBIOS) to boot from it (theoretically possible to replace, but you can put a kernel in CBFS or on SATA and use that to boot GNU, which can be on a SAS drive. The linux kernel can use those SAS drives (via PIKE module) without an option ROM). -@item -IPMI iKVM module (optional add-on card) uses proprietary firmware. Since it's for remote out-of-band management, it's theoretically a backdoor similar to the Intel Management Engine. Fortunately, unlike the ME, this firmware is unsigned which means that a free replacement is theoretically possible. For now, the libreboot project recommends not installing the module. @uref{https://github.com/facebook/openbmc,This project} might be interesting to derive from, for those who want to work on a free replacement. In practise, out-of-band management isn't very useful anyway (or at the very least, it's not a major inconvenience to not have it). -@item -Graphics: only text-mode works. See @ref{native-graphics-kcma-d8,graphics}. -@end itemize - -@item -Hardware specifications -@itemize -@item -Check ASUS website for specs - -@end itemize -@end itemize - - -@node ASUS KFSN4-DRE motherboard -@subsubsection ASUS KFSN4-DRE motherboard -This is a server board using AMD hardware (Fam10h). It can also be used for building a high-powered workstation. Powered by libreboot. - -@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.} - -Flashing instructions can be found at @ref{How to update/install,flashrom}. - -@itemize - -@item -Form factor -@itemize -@item -These boards use the SSI EEB 3.61 form factor; make sure that your case supports this. This form factor is similar to E-ATX in that the size is identical, but the position of the screws are different. -@end itemize - -@item -Flash chips -@itemize -@item -These boards use LPC flash (not SPI), in a PLCC socket. The default flash size 1MiB (8Mbits), and can be upgraded to 2MiB (16Mbits). SST49LF080A is the default that the board uses. SST49LF016C is an example of a 2MiB (16Mbits) chip, which might work. It is believed that 2MiB (16Mbits) is the maximum size available for the flash chip. -@item -@strong{DO NOT hot-swap the chip with your bare hands. Use a PLCC chip extractor. These can be found online. See @uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} -@end itemize - -@item -Native graphics initialization -@itemize -@item -Native graphics initialization exists (XGI Z9s) for this board. Framebuffer- and text-mode both work. A serial port is also available. -@end itemize - -@item -Memory -@itemize -@item -DDR2 533/667 Registered ECC. 16 slots. Total capacity up to 64GiB. -@end itemize - -@item -Hex-core CPUs -@itemize -@item -PCB revision 1.05G is the best version of this board (the revision number will be printed on the board), because it can use dual hex-core CPUs (Opteron 2400/8400 series). Other revisions are believed to only support dual quad-core CPUs. -@end itemize - -@item -Current issues -@itemize -@item -There seems to be a 30 second bootblock delay (observed by tpearson); the system otherwise boots and works as expected. See @uref{../resources/text/kfsn4-dre/bootlog.txt,kfsn4-dre/bootlog.txt} - this uses the 'simple' bootblock, while tpearson uses the 'normal' bootblock, which tpearson suspects may be a possible cause. This person says that they will look into it. @uref{http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asus/kfsn4-dre/4.0-10101-g039edeb/2015-06-27T03:59:16Z/config.txt;h=4742905c185a93fbda8eb14322dd82c70641aef0;hb=055f5df4e000a97453dfad6c91c2d06ea22b8545,This config} doesn't have the issue. -@item -Text-mode is a bit jittery (but still usable). (the jitter disappears if using KMS, once the kernel starts. The jitter will remain, if booting the kernel in text-mode). -@end itemize - -@item -Other information -@itemize -@item -@uref{ftp://ftp.sgi.com/public/Technical%20Support/Pdf%20files/Asus/kfsn4-dre.pdf,specifications} -@end itemize - -@end itemize - -@node ASUS KGPE-D16 motherboard @c TODO: Nodes? -@subsubsection ASUS KGPE-D16 server/workstation board -This is a server board using AMD hardware (Fam10h @strong{and Fam15h} CPUs available). It can also be used for building a high-powered workstation. Powered by libreboot. The coreboot port was done by Timothy Pearson of @uref{https://raptorengineeringinc.com/,Raptor Engineering Inc.} and, working with Timothy (and sponsoring the work) merged into libreboot. - -@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.} - -@strong{Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules..} - -Flashing instructions can be found at @ref{How to update/install,flashrom} - note that external flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is currently installed. If you already have libreboot, by default it is possible to re-flash using software running in GNU/Linux on the KGPE-D16, without using external hardware. - -@itemize - -@item -CPU compatibility -@itemize @minus -@item -@strong{Use Opteron 6200 series (works without microcode updates, including hw virt).} -6300 series needs microcode updates, so avoid those CPUs. 6100 series is too old, and mostly untested. -@end itemize - -@item -Board status compatibility -@itemize @minus -@item -See @uref{https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php,https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php}. -@end itemize - -@item -Form factor -@itemize @minus -@item -These boards use the SSI EEB 3.61 form factor; make sure that your case supports this. This form factor is similar to E-ATX in that the size is identical, but the position of the screws are different. -@end itemize - -@item -IPMI iKVM module add-on -@itemize @minus -@item -Don't use it. It uses proprietary firmware and adds a backdoor (remote out-of-band management chip, similar to the @uref{http://libreboot.org/faq/#intelme,Intel Management Engine}. Fortunately, the firmware is unsigned (possibly to replace) and physically separate from the mainboard since it's on the add-on module, which you don't have to install. -@end itemize - -@item -Flash chips -@itemize @minus -@item -2MiB flash chips are included by default, on these boards. It's on a P-DIP 8 slot (SPI chip). The flash chip can be upgraded to higher sizes: 4MiB, 8MiB or 16MiB. With at least 8MiB, you could feasibly fit a compressed linux+initramfs image (BusyBox+Linux system) into CBFS and boot that, loading it into memory. -@item -Libreboot has configs for 2, 4, 8 and 16 MiB flash chip sizes (default flash chip is 2MiB). -@item -@strong{DO NOT hot-swap the chip with your bare hands. Use a P-DIP 8 chip extractor. These can be found online. See @uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} -@end itemize - -@item -Native graphics initialization -@anchor{native-graphics-kgpe-d16} -@itemize @minus -@item -Only text-mode is known to work, but linux(kernel) can initialize the framebuffer display (if it has KMS - kernel mode setting). -@end itemize - -@item -Current issues -@itemize @minus -@item -LRDIMM memory modules are currently incompatible -@item -SAS (via PIKE 2008 module) requires non-free option ROM (and SeaBIOS) to boot from it (theoretically possible to replace, but you can put a kernel in CBFS or on SATA and use that to boot GNU, which can be on a SAS drive. The linux kernel can use those SAS drives (via PIKE module) without an option ROM). -@item -IPMI iKVM module (optional add-on card) uses proprietary firmware. Since it's for remote out-of-band management, it's theoretically a backdoor similar to the Intel Management Engine. Fortunately, unlike the ME, this firmware is unsigned which means that a free replacement is theoretically possible. For now, the libreboot project recommends not installing the module. @uref{https://github.com/facebook/openbmc,This project} might be interesting to derive from, for those who want to work on a free replacement. In practise, out-of-band management isn't very useful anyway (or at the very least, it's not a major inconvenience to not have it). -@item -Graphics: only text-mode works. See @ref{native-graphics-kgpe-d16,graphics}. @c @ref{#graphics,#graphics} -@end itemize - -@end itemize -@menu -* ASUS KGPE-D16 Hardware specifications:: -@end menu - - -@node ASUS KGPE-D16 Hardware specifications -@c @subsubheading ASUS KGPE-D16 Hardware specifications -@itemize - -@item Processor / system bus -@itemize -@item -2 CPU sockets (G34 compatible) -@item -HyperTransport(TM) Technology 3.0 @c FIX FIX FIX -- TM -@item -CPUs supported: -@itemize -@item -AMD Opteron 6100 series (Fam10h. No IOMMU support. @strong{Not} recommended - old. View errata datasheet here: @uref{http://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf,http://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf}) -@item -AMD Opteron 6200 series (bulldozer cores) (Fam15h, with full IOMMU support in libreboot. @strong{highly recommended - fast, and works well without microcode updates, including virtualization}) -@item -AMD Opteron 6300 series (piledriver cores) (Fam15h, with full IOMMU support in libreboot. @strong{AVOID LIKE THE PLAGUE - virtualization is broken without microcode updates} -@item -NOTE: 6300 series CPUs have buggy microcode built-in, and libreboot recommends avoiding the updates. The 6200 series CPUs have more reliable microcode. -Look at this errata datasheet: @uref{http://support.amd.com/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf,http://support.amd.com/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf} -(see Errata 734 - this is what kills the 6300 series) -@end itemize - -@item -6.4 GT/s per link (triple link) -@end itemize - -@item Core logic -@itemize -@item -AMD SR5690 -@item -AMD SP5100 -@end itemize - -@item Memory compatibility with libreboot -@itemize -@item -@strong{Total Slots:} 16 (4-channel per CPU, 8 DIMM per CPU), ECC -@item -@strong{Capacity:} Maximum up to 256GB RDIMM -@item -@strong{Memory Type that is compatible:} -@itemize -@item -DDR3 1600/1333/1066/800 UDIMM* -@item -DDR3 1600/1333/1066/800 RDIMM* -@end itemize - -@item -@strong{Compatible sizes per memory module:} -@itemize -@item -16GB, 8GB, 4GB, 3GB, 2GB, 1GB RDIMM -@item -8GB, 4GB, 2GB, 1GB UDIMM -@end itemize - -@end itemize - -@item Expansion slots -@itemize -@item -@strong{Total slot:} 6 -@item -@strong{Slot Location 1:} PCI 32bit/33MHz -@item -@strong{Slot Location 2:} PCI-E x16 (Gen2 X8 Link) -@item -@strong{Slot Location 3:} PCI-E x16 (Gen2 X16 Link), Auto switch to x8 link if slot 2 is occupied -@item -@strong{Slot Location 4:} PCI-E x8 (Gen2 X4 Link) -@item -@strong{Slot Location 5:} PCI-E x16 (Gen2 X16 Link) -@item -@strong{Slot Location 6:} PCI-E x16 (Gen2 X16 Link), Auto turn off if slot 5 is occupied, For 1U FH/FL Card, MIO supported -@item -@strong{Additional Slot 1:} PIKE slot (for SAS drives. See notes above) -@item -Follow SSI Location# -@end itemize - -@item Form factor -@itemize -@item -SSI EEB 3.61 (12"x13") -@end itemize - -@item ASUS features -@itemize -@item -Fan Speed Control -@item -Rack Ready (Rack and Pedestal dual use) -@end itemize - -@item Storage -@itemize -@item -@strong{SATA controller:} -@itemize -@item -AMD SP5100 -@item -6 x SATA2 300MB/s -@end itemize - -@item -@strong{SAS/SATA Controller:} -@itemize -@item -ASUS PIKE2008 3Gbps 8-port SAS card included -@end itemize - -@end itemize - -@item Networking -@itemize -@item -2 x Intel@registeredsymbol{} 82574L + 1 x Mgmt LAN -@end itemize - -@item Graphics -@itemize -@item -Aspeed AST2050 with 8MB VRAM -@end itemize - -@item On board I/O -@itemize -@item -1 x PSU Power Connector (24-pin SSI power connector + 8-pin SSI 12V + 8-pin SSI 12V power connector) -@item -1 x Management Connector , Onboard socket for management card -@item -3 x USB pin header , Up to 6 Devices -@item -1 x Internal A Type USB Port -@item -8 x Fan Header , 4pin (3pin/4pin fan dual support) -@item -2 x SMBus -@item -1 x Serial Port Header -@item -1 x TPM header -@item -1 x PS/2 KB/MS port -@end itemize - -@item Back I/O ports -@itemize -@item -1 x External Serial Port -@item -2 x External USB Port -@item -1 x VGA Port -@item -2 x RJ-45 -@item -1 x PS/2 KB/Mouse -@end itemize - -@item Environment -@itemize -@item -@strong{Operation temperature:} 10C ~ 35C -@item -@strong{Non operation temperature:} -40C ~ 70C -@item -@strong{Non operation humidity:} 20% ~ 90% ( Non condensing) -@end itemize - -@item Monitoring -@itemize -@item -CPU temperatures -@item -Fan speed (RPM) -@end itemize - -@item Note -@itemize -@item -DDR3 1600 can only be supported with AMD Opteron 6300/6200 series processor -@end itemize - -@end itemize - - -@node ASUS Chromebook C201 -@subsubsection ASUS Chromebook C201 -@strong{DO NOT BUY THIS LAPTOP YET!!!!!!!!!!! This is intended mainly for developers at the moment (libreboot developers, and developers of libre GNU/Linux distributions). This laptop currently has @emph{zero} support from libre distros. Parabola theoretically supports it, by installing Arch first and then migrating to Parabola using the migration guide on the Parabola wiki, but it's not very well tested and does not have many packages --- in our opinion, Parabola does not really support this laptop. There are also several issues. Read this page for more information. This laptop can still be used reasonably, in freedom, but it requires a lot of work. Most users will be disappointed.} - -This is a Chromebook, using the Rockchip RK3288 SoC. It uses an ARM CPU, and has free EC firmware (unlike some other laptops). More RK3288-based laptops will be added to libreboot at a later date. - -Paul Kocialkowski, a @uref{http://www.replicant.us/,Replicant} developer, ported this laptop to libreboot. Thank you, Paul! - -@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository. Note that we recommend building for it from an x86 host, until libreboot's build system is modified accordingly.} - -@strong{More info will be added later, including build/installation instructions. The board is supported in libreboot, however, and has been confirmed to work.} - -Flashing instructions can be found at @ref{How to update/install,flashrom}. - -@menu -* Intent:: Google's intent with CrOS devices -* Considerations:: Considerations about ChromeOS and free operating systems -* Video blobs:: Caution: Video acceleration requires a non-free blob, software rendering can be used instead -* WiFi blobs:: Caution: WiFi requires a non-free blob, a USB dongle can be used instead -* EC Firmware:: EC firmware is free software! -* Microcode:: No microcode! -* Depthcharge payload - CrOS:: -* The Screw:: Flash chip write protection: the screw -@end menu - -@node Intent -@ifinfo -@subsubheading Google's intent with CrOS devices -@end ifinfo -CrOS (Chromium OS/Chrome OS) devices, such as Chromebooks, were not designed with the intent of bringing more freedom to users. However, they run with a lot of free software at the boot software and embedded controller levels, since free software gives Google enough flexibility to optimize various aspects such as boot time and most importantly, to implement the CrOS security system, that involves various aspects of the software. Google does hire a lot of Coreboot developers, who are generally friendly to the free software movement and try to be good members of the free software community, by contributing code back. - -CrOS devices are designed (from the factory) to actually coax the user into using @uref{https://www.gnu.org/philosophy/who-does-that-server-really-serve.en.html,proprietary web services} (SaaSS) that invade the user's privacy (ChromeOS is literally just the Google Chrome browser when you boot up, itself proprietary and comes with proprietary add-ons like flash. It's only intended for SaaSS, not actual, real computing). Google is even a member of the @emph{PRISM} program, as outlined by Edward Snowden. See notes about ChromeOS below. The libreboot project recommends that the user replace the default @emph{ChromeOS} with a distribution that can be used in freedom, without invading the user's privacy. - -We also use a similar argument for the MacBook and the ThinkPads that are supported in libreboot. Those laptops are supported, in spite of Apple and Lenovo, companies which are actually @emph{hostile} to the free software movement. - - -@node Considerations -@ifinfo -@subsubheading Considerations about ChromeOS and free operating systems -@end ifinfo -This laptop comes preinstalled (from the factory) with Google ChromeOS. This is a GNU/Linux distribution, but it's not general purpose and it comes with proprietary software. It's designed for @emph{@uref{https://www.gnu.org/philosophy/who-does-that-server-really-serve.en.html,SaaSS}}. Libreboot recommends that users of this laptop replace it with another distribution. - -The FSF has a @uref{https://www.gnu.org/distros/free-distros.html,list of distributions} that are 100% free software. Only one of them is confirmed to work on ARM CrOS devices. Parabola looks hopeful: @uref{https://www.parabola.nu/news/parabola-supports-armv7/,https://www.parabola.nu/news/parabola-supports-armv7/} - -The libreboot project would like to see all FSF-endorsed distro projects port to these laptops. This includes Trisquel, GuixSD and others. And ProteanOS. Maybe even LibreCMC. The more the merrier. We need them, badly. - -@strong{We need these distributions to be ported as soon as possible.} - -@node Video blobs -@ifinfo -@subsubheading Caution: Video acceleration requires a non-free blob, software rendering can be used instead. -@end ifinfo -The lima driver source code for the onboard Mali GPU is not released. The developer withheld it for personal reasons. Until that is released, the only way to use video (in freedom) on this laptop is to not have video acceleration, by making sure not to install the relevant blob. Most tasks can still be performed without video acceleration, without any noticeable performance penalty. - -In practise, this means that certain things like games, blender and GNOME shell (or other fancy desktops) won't work well. The libreboot project recommends a lightweight desktop which does not need video acceleration, such as @emph{XFCE} or @emph{LXDE}. - -The lima developer wrote this blog post, which sheds light on the story: @uref{http://libv.livejournal.com/27461.html,http://libv.livejournal.com/27461.html} - -@node WiFi blobs -@ifinfo -@subsubheading Caution: WiFi requires a non-free blob, a USB dongle can be used instead. -@end ifinfo -These laptops have non-removeable (soldered on) WiFi chips, which require non-free firmware in the Linux kernel in order to work. - -The libreboot project recommends using an external USB wifi dongle that works with free software. @xref{Recommended wifi chipsets}. @c See @uref{index.html#recommended_wifi,index.html#recommended_wifi}. - -There are 2 companies (endorsed by the Free Software Foundation, under their @emph{Respects your Freedom} guidelines), that sell USB WiFi dongles guaranteed to work with free software (i.e. linux-libre kernel): - -@itemize -@item -@uref{https://www.thinkpenguin.com/gnu-linux/penguin-wireless-n-usb-adapter-gnu-linux-tpe-n150usb,ThinkPenguin sells them} (company based in USA) -@item -@uref{https://tehnoetic.com/tehnoetic-wireless-adapter-gnu-linux-libre-tet-n150,Tehnoetic sells them} (company based in Europe) -@end itemize - -These wifi dongles use the AR9271 (atheros) chipset, supported by the free @emph{ath9k_htc} driver in the Linux kernel. They work in @emph{linux-libre} too. - -@node EC Firmware -@ifinfo -@subsubheading EC firmware is free software! -@end ifinfo -It's free software. Google provides the source. Build scripts will be added later, with EC sources provided in libreboot, and builds of the EC firmware. - -This is unlike the other current libreboot laptops (Intel based). In practise, you can (if you do without the video/wifi blobs, and replace ChromeOS with a distribution that respects your freedom) be more free when using one of these laptops. - -The libreboot FAQ briefly describes what an @emph{EC} is: @uref{http://libreboot.org/faq/#firmware-ec,http://libreboot.org/faq/#firmware-ec} - -@node Microcode -@ifinfo -@subsubheading No microcode! -@end ifinfo -Unlike x86 (e.g. Intel/AMD) CPUs, ARM CPUs do not use microcode, not even built in. On the Intel/AMD based libreboot systems, there is still microcode in the CPU (not considered problematic by the FSF, provided that it is reasonably trusted to not be malicious, since it's part of the hardware and read-only), but we exclude microcode updates (volatile updates which are uploaded at boot time by the boot firmware, if present), which are proprietary software. - -On ARM CPUs, the instruction set is implemented in circuitry, without microcode. - -@node Depthcharge payload - CrOS -@ifinfo -@subsubheading Depthcharge payload -@end ifinfo -These systems do not use the GRUB payload. Instead, they use a payload called depthcharge, which is common on CrOS devices. This is free software, maintained by Google. - -@node The Screw -@ifinfo -@subsubheading Flash chip write protection: the screw -@end ifinfo -It's next to the flash chip. Unscrew it, and the flash chip is read-write. Screw it back in, and the flash chip is read-only. It's called the screw. - -@emph{The screw} is accessible by removing other screws and gently prying off the upper shell, where the flash chip and the screw are then directly accessible. User flashing from software is possible, without having to externally re-flash, but the flash chip is SPI (SOIC-8 form factor) so you can also externally re-flash if you want to. In practise, you only need to externally re-flash if you brick the laptop; read @ref{How to program an SPI flash chip with BeagleBone Black,BBB setup} for an example of how to set up an SPI programmer. - -Write protection is useful, because it prevents the firmware from being re-flashed by any malicious software that might become executed on your GNU/Linux system, as root. In other words, it can prevent a firmware-level @emph{evil maid} attack. It's possible to write protect on all current libreboot systems, but CrOS devices make it easy. The screw is such a stupidly simple idea, which all designs should implement. - - - -@node Lenovo ThinkPad X60/X60s -@subsubsection Lenovo ThinkPad X60/X60s -Native gpu initialization (`native graphics') which replaces the proprietary VGA Option ROM (`@uref{https://en.wikipedia.org/wiki/Video_BIOS,Video BIOS}' or `VBIOS'), all known LCD panels are currently compatible: - -To find what LCD panel you have, see: @ref{Get EDID - Find out the name of your LCD panel,Get EDID}. - -@itemize -@item -TMD-Toshiba LTD121ECHB: # -@item -CMO N121X5-L06: # -@item -Samsung LTN121XJ-L07: # -@item -BOE-Hydis HT121X01-101: # -@end itemize - -You can remove an X61/X61s motherboard from the chassis and install an X60/X60s motherboard in it's place (for flashing libreboot). The chassis is mostly identical and the motherboards are the same shape/size. - -The X60 typically comes with an Intel wifi chipset which does not work at all without proprietary firmware, and while Lenovo BIOS is running the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; just remove the card and install another one @strong{after} libreboot is installed. See Recommended wifi chipsets for replacements. @c ADD REF - - - -@node Lenovo ThinkPad X60 Tablet -@subsubsection Lenovo ThinkPad X60 Tablets -Native gpu initialization (`native graphics') which replaces the proprietary VGA Option ROM (`@uref{https://en.wikipedia.org/wiki/Video_BIOS,Video BIOS}' or `VBIOS'). - -To find what LCD panel you have, see: @ref{Get EDID - Find out the name of your LCD panel,Get EDID}. @c @uref{../misc/index.html#get_edid_panelname,../misc/index.html#get_edid_panelname}. - -There are 5 known LCD panels for the X60 Tablet: - -@itemize -@item -@strong{X60T XGA (1024x768):} -@itemize -@item -BOE-Hydis HV121X03-100 (works) -@item -Samsung LTN121XP01 (does not work. blank screen) -@item -BOE-Hydis HT12X21-351 (does not work. blank screen) -@end itemize - -@item -@strong{X60T SXGA+ (1400x1050):} -@itemize -@item -BOE-Hydis HV121P01-100 (works) -@item -BOE-Hydis HV121P01-101 (works) -@end itemize - -@end itemize - -Most X60Ts only have digitizer (pen), but some have finger (touch) aswell as pen; finger/multitouch doesn't work, only digitizer (pen) does. - -You can remove an X61/X61s motherboard from the chassis and install an X60/X60s motherboard in its place (for flashing libreboot). The chassis is mostly identical and the motherboards are the same shape/size. @strong{It is unknown if the same applies between the X60 Tablet and the X61 Tablet}. - -The X60 Tablet typically comes with an Intel wifi chipset which does not work at all without proprietary firmware, and while Lenovo BIOS is running the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; just remove the card and install another one @strong{after} libreboot is installed. See Recommended wifi chipsets for replacements. @c ADD REF - -A user with a X60T that has digitizer+finger support, reported that they could get finger input working. They used linuxwacom at git tag 0.25.99.2 and had the following in their xorg.conf: - -@verbatim -# Now, for some reason (probably a bug in linuxwacom), -# the 'Touch=on' directive gets reset to 'off'. -# So you'll need to do -# $ xsetwacom --set WTouch Touch on -# -# tested with linuxwacom git 42a42b2a8636abc9e105559e5dea467163499de7 - -Section "Monitor" - Identifier "<default monitor>" - DisplaySize 245 184 -EndSection - -Section "Screen" - Identifier "Default Screen Section" - Monitor "<default monitor<" -EndSection - -Section "InputDevice" - Identifier "WTouch" - Driver "wacom" - Option "Device" "/dev/ttyS0" -# Option "DebugLevel" "12" - Option "BaudRate" "38400" - Option "Type" "touch" - Option "Touch" "on" - Option "Gesture" "on" - Option "ForceDevice" "ISDV4" -# Option "KeepShape" "on" - Option "Mode" "Absolute" - Option "RawSample" "2" -# Option "TPCButton" "off" - Option "TopX" "17" - Option "TopY" "53" - Option "BottomX" "961" - Option "BottomY" "985" -EndSection - -Section "ServerLayout" - Identifier "Default Layout" - Screen "Default Screen Section" - InputDevice "WTouch" "SendCoreEvents" -EndSection -@end verbatim - - -@node Lenovo ThinkPad T60 -@subsubsection Lenovo ThinkPad T60 -If your T60 is a 14.1" or 15.1" model with an ATI GPU, it won't work with libreboot by default but you can replace the motherboard with another T60 motherboard that has an Intel GPU, and then libreboot should work. - -As far as I know, 14.1" (Intel GPU) and 15.1" (Intel GPU) T60 motherboards are the same, where 'spacers' are used on the 15.1" T60. In any case, it makes sense to find one that is guaranteed to fit in your chassis. - -There is also a 15.4" T60 with Intel GPU. - -Note: the T60@strong{p} laptops all have ATI graphics. The T60p laptops cannot be used with libreboot under any circumstances. - -The following T60 motherboard (see area highlighted in white) shows an empty space where the ATI GPU would be (this particular motherboard has an Intel GPU):@*@* @image{../resources/images/t60_dev/t60_unbrick,,,,jpg} - -The reason that the ATI GPU on T60 is unsupported is due to the VBIOS (Video BIOS) which is non-free. The VBIOS for the Intel GPU on X60/T60 has been reverse engineered, and replaced with Free Software and so will work in libreboot. - -The 'Video BIOS' is what initializes graphics. - -See: @uref{https://en.wikipedia.org/wiki/Video_BIOS,https://en.wikipedia.org/wiki/Video_BIOS}.@* In fact, lack of free VBIOS in general is a big problem in coreboot, and is one reason (among others) why many ports for coreboot are unsuitable for libreboot's purpose. - -Theoretically, the ThinkPad T60 with ATI GPU can work with libreboot and have ROM images compiled for it, however in practise it would not be usable as a laptop because there would be no visual display at all. That being said, such a configuration is acceptable for use in a 'headless' server setup (with serial and/or ssh console as the display). - -@menu -* Supported T60 list:: -@end menu - -@node Supported T60 list -Native gpu initialization ('native graphics') which replaces the proprietary VGA Option ROM ('@uref{https://en.wikipedia.org/wiki/Video_BIOS,Video BIOS}' or 'VBIOS'). - -To find what LCD panel you have, see: @ref{Get EDID - Find out the name of your LCD panel,Get EDID}. @c @uref{../misc/index.html#get_edid_panelname,../misc/index.html#get_edid_panelname}. - -@strong{Some T60s have ATI GPUs, and all T60P laptops have ATI GPUs These are incompatible! See @ref{Lenovo ThinkPad T60,t60_ati_intel} for how to remedy this.} - -How to dump the EDID:@* - -Tested LCD panels: @strong{working(compatible)} - -@itemize -@item -TMD-Toshiba LTD141EN9B (14.1" 1400x1050) (FRU P/N 41W1478 recommended for the inverter board) -@item -Samsung LTN141P4-L02 (14.1" 1400x1050) (FRU P/N 41W1478 recommended for the inverter board) -@item -LG-Philips LP150E05-A2K1 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) -@item -Samsung LTN150P4-L01 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) (not a T60 screen afaik, but it works) -@item -BOE-Hydis HV150UX1-100 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) -@end itemize - -Tested LCD panels: @strong{not working yet (incompatible; see @uref{https://libreboot.org/docs/future/index.html#lcd_i945_incompatibility})} - -@itemize -@item -Samsung LTN141XA-L01 (14.1" 1024x768) -@item -LG-Philips LP150X09 (15.1" 1024x768) -@item -Samsung LTN150XG (15.1" 1024x768) -@item -LG-Philips LP150E06-A5K4 (15.1" 1400x1050) (also, not an official T60 screen) -@item -Samsung LTN154X3-L0A (15.4" 1280x800) -@item -IDtech IAQX10N (15.1" 2048x1536) (no display in GRUB, display in GNU/Linux is temperamental) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) -@item -IDtech N150U3-L01 (15.1" 1600x1200) (no display in GRUB, display in GNU/Linux works) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) -@end itemize - -@emph{The following LCD panels are @strong{UNTESTED}. If you have one of these panels then please submit a report!}: - -@itemize -@item -CMO(IDtech?) N141XC (14.1" 1024x768) -@item -BOE-Hydis HT14X14 (14.1" 1024x768) -@item -TMD-Toshiba LTD141ECMB (14.1" 1024x768) -@item -Boe-Hydis HT14P12 (14.1" 1400x1050) (FRU P/N 41W1478 recommended for the inverter board) -@item -CMO (IDtech?) 13N7068 (15.1" 1024x768) -@item -CMO (IDtech?) 13N7069 (15.1" 1024x768) -@item -BOE-Hydis HV150P01-100 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) -@item -BOE-Hydis HV150UX1-102 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) -@item -IDtech IAQX10S (15.1" 2048x1536) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) -@item -Samsung LTN154P2-L05 (42X4641 42T0329) (15.4" 1680x1050) -@item -LG-Philips LP154W02-TL10 (13N7020 42T0423) (15.4" 1680x1050) -@item -LG-Philips LP154WU1-TLB1 (42T0361) (15.4" 1920x1200) @strong{(for T61p but it might work in T60. Unknown!)} -@item -Samsung LTN154U2-L05 (42T0408 42T0574) (15.4" 1920x1200) @strong{(for T61p but it might work in T60. Unknown!)} -@end itemize - -It is unknown whether the 1680x1050 (15.4") and 1920x1200 (15.4") panels use a different inverter board than the 1280x800 panels. - -The T60 typically comes with an Intel wifi chipset which does not work at all without proprietary firmware, and while Lenovo BIOS is running the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; just remove the card and install another one @strong{after} libreboot is installed. See Recommended wifi chipsets for replacements. @c ADD REF - - -@node Lenovo ThinkPad X200 -@subsubsection ThinkPad X200 -It is believed that all X200 laptops are compatible. @ref{X200S and X200 Tablet,X200S and X200 Tablet} will also work,depending on the configuration. - -It *might* be possible to put an X200 motherboard in an X201 chassis, though this is currently untested by the libreboot project. The same may also apply between X200S and X201S; again, this is untested. @strong{It's most likely true.} - -There are two possible flash chip sizes for the X200: 4MiB (32Mbit) or 8MiB (64Mbit). This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. - -@strong{The X200 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it by using a modified descriptor: @pxref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains notes, plus instructions). - -Flashing instructions can be found at @ref{How to update/install,flashrom} - -@menu -* Compatibility without blobs - X200:: -* X200S and X200 Tablet:: -* Trouble undocking button doesn't work:: -* LCD compatibility list - X200:: -* How to tell if it has an LED or CCFL?:: -* Hardware register dumps:: -* RAM S3 and microcode updates:: -* Unsorted notes:: -@end menu - -@node Compatibility without blobs - X200 -@ifinfo -@subsubheading Compatibility without blobs - X200 -@end ifinfo -@c @subsubheading Hardware virtualization vt-x -@c @menu -@c * Hardware virtualization vt-x:: -@c @end menu - -@c @node Hardware virtualization vt-x -@c @subsubheading Hardware virtualization (vt-x) -@c @anchor{#hardware-virtualization-vt-x} -The X200, when run without CPU microcode updates in coreboot, currently kernel panics if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled for the guest, the guest panics (but the host is fine). Working around this in QEMU might be possible; if not, software virtualization should work fine (it's just slower). - -On GM45 hardware (with libreboot), make sure that the @emph{kvm} and @emph{kvm_intel} kernel modules are not loaded, when using QEMU. - -The following errata datasheet from Intel might help with investigation: @uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} - -Anecdotal reports from at least 1 user suggests that some models with CPU microcode 1067a (on the CPU itself) might work with vt-x in libreboot. - -@node X200S and X200 Tablet -@ifinfo -@subsubheading X200S and X200 Tablet. -@end ifinfo -X200S and X200 Tablet have raminit issues at the time of writing (GS45 chipset. X200 uses GM45). - -X200S and X200 Tablet are known to work, but only with certain CPU+RAM configurations. The current stumbling block is RCOMP and SFF, mentioned in @uref{https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf,https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf}. - -The issues mostly relate to raminit (memory initialization). With an unpatched coreboot, you get the following: @uref{../resources/text/x200s/cblog00.txt,cblog00.txt}. No SODIMM combination that was tested would work. At first glance, it looks like GS45 (chipset that X200S uses. X200 uses GM45) is unsupported, but there is a workaround that can be used to make certain models of the X200S work, depending on the RAM. - -The datasheet for GS45 describes two modes: low-performance and high-performance. Low performance uses the SU range of ultra-low voltage procesors (SU9400, for example), and high-performance uses the SL range of processors (SL9400, for example). According to datasheets, GS45 behaves very similarly to GM45 when operating in high-performance mode. - -The theory then was that you could simply remove the checks in coreboot and make it pass GS45 off as GM45; the idea is that, with a high-performance mode CPU (SL9400, for example) it would just boot up and work. - -This suspicion was confirmed with the following log: @uref{../resources/text/x200s/cblog01.txt,cblog01.txt}. The memory modules in this case are 2x4GB. @strong{However, not all configurations work: @uref{../resources/text/x200s/cblog02.txt,cblog02.txt} (2x2GB) and @uref{../resources/text/x200s/cblog03.txt,cblog03.txt} (1x2GB) show a failed bootup.} @emph{False alarm. The modules were mixed (non-matching). X200S with high-performance mode CPU will work so long as you use matching memory modules (doesn't matter what size).} S - -This was then pushed as a patch for coreboot, which can be found at @uref{http://review.coreboot.org/#/c/7786/,http://review.coreboot.org/#/c/7786/} (libreboot merges this patch in coreboot-libre now. Check the 'getcb' script in src or git). -@menu -* Proper GS45 raminit:: -@end menu - -@node Proper GS45 raminit @c FIX FIX FIX: node issues? -@c @subsubheading Proper GS45 raminit -A new northbridge gs45 should be added to coreboot, based on gm45, and a new port x200st (X200S and X200T) should be added based on the x200 port. - -This port would have proper raminit. Alternatively, gs45 (if raminit is taken to be the only issue with it) can be part of gm45 northbridge support (and X200S/Tablet being part of the X200 port) with conditional checks in the raminit that make raminit work differently (as required) for GS45. nico_h and pgeorgi/patrickg in the coreboot IRC channel should know more about raminit on gm45 and likely gs45. - -pgeorgi recommends to run SerialICE on the factory BIOS (for X200S), comparing it with X200 (factory BIOS) and X200 (gm45 raminit code in coreboot), to see what the differences are. Then tweak raminit code based on that. - -@node Trouble undocking button doesn't work -@ifinfo -@subsubheading Trouble undocking (button doesn't work) -@end ifinfo -This person seems to have a workaround: @uref{https://github.com/the-unconventional/libreboot-undock,https://github.com/the-unconventional/libreboot-undock} - -@node LCD compatibility list - X200 -@ifinfo -@subsubheading LCD compatibility list -@end ifinfo -LCD panel list (X200 panels listed there): @uref{http://www.thinkwiki.org/wiki/TFT_display,http://www.thinkwiki.org/wiki/TFT_display} - -All LCD panels for the X200, X200S and X200 Tablet are known to work. - -@menu -* AFFS/IPS panels:: -* X200S:: -@end menu - -@node AFFS/IPS panels -@c @subsubheading AFFS/IPS panels -@c @menu -@c * X200:: -@c @end menu - -X200 -@c @subsubheading X200 -@c @anchor{#x200} -Adapted from @uref{https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X200,https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X200} - -Look at wikipedia for difference between TN and IPS panels. IPS have much better colour/contrast than a regular TN, and will typically have good viewing angles. - -These seem to be from the X200 tablet. You need to find one without the glass touchscreen protection on it (might be able to remove it, though). It also must not have a digitizer on it (again, might be possible to just simply remove the digitizer). - -@itemize -@item -BOE-Hydis HV121WX4-120, HV121WX4-110 or HV121WX4-100 - cheap-ish, might be hard to find -@item -Samsung LTN121AP02-001 - common to find, cheap -@end itemize - -@strong{If your X200 has an LED backlit panel in it, then you also need to get an inverter and harness cable that is compatible with the CCFL panels. To see which panel type you have, @pxref{How to tell if it has an LED or CCFL?,led_howtotell}. If you need the inverter/cable, here are part numbers: 44C9909 for CCFL LVDS cable with bluetooth and camera connections, and 42W8009 or 42W8010 for the inverter.} @c ADD REF - -There are glossy and matte versions of these. Matte means anti-glare, which is what you want (in this authors opinion). - -Refer to the HMM (hardware maintenance manual) for how to replace the screen. - -Sources: - -@itemize -@item -@uref{http://forum.thinkpads.com/viewtopic.php?f=2&t=84941,ThinkPad Forums - Matte AFFS Panel on X200} -@item -@uref{http://forum.thinkpads.com/viewtopic.php?p=660662#p660662,ThinkPad Forums - Parts for X200 AFFS Mod} -@item -@uref{http://thinkwiki.de/X200_Displayumbau,ThinkWiki.de - X200 Displayumbau} (achtung: du musst lesen und/oder spreche deutsch; oder ein freund fur hilfe) -@end itemize - -@node X200S -@c @subsubheading X200S -@uref{http://forum.thinkpads.com/viewtopic.php?p=618928#p618928,http://forum.thinkpads.com/viewtopic.php?p=618928#p618928} explains that the X200S screens/assemblies are thinner. You need to replace the whole lid with one from a normal X200/X201. - -@c @ref{#pagetop,Back to top of page.} - -@node How to tell if it has an LED or CCFL? -@c @subsubheading How to tell if it has an LED or CCFL? -Some X200s have a CCFL backlight and some have an LED backlight, in their LCD panel. This also means that the inverters will vary, so you must be careful if ever replacing either the panel and/or inverter. (a CCFL inverter is high-voltage and will destroy an LED backlit panel). - -CCFLs contain mercury. An X200 with a CCFL backlight will (@strong{}unless it has been changed to an LED, with the correct inverter. Check with your supplier!) the following: @emph{"This product contains Lithium Ion Battery, Lithium Battery and a lamp which contains mercury; dispose according to local, state or federal laws"} (one with an LED backlit panel will say something different). - - -@node Hardware register dumps -@c @subsubheading Hardware register dumps -The coreboot wiki @uref{http://www.coreboot.org/Motherboard_Porting_Guide,shows} how to collect various logs useful in porting to new boards. Following are outputs from the X200: - -@itemize -@item -BIOS 3.15, EC 1.06 -@itemize -@item -@uref{../resources/misc/dumps/x200/,x200_dumps/} -@end itemize - -@end itemize - -@node RAM S3 and microcode updates -@c @subsubheading RAM, S3 and microcode updates -Not all memory modules work. Most of the default ones do, but you have to be careful when upgrading to 8GiB; some modules work, some don't. - -@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721,This page} might be useful for RAM compatibility info -(note: coreboot raminit is different, so this page might be BS) - -pehjota started collecting some steppings for different CPUs on several X200 laptops. You can get the CPUID by running: @* $ @strong{dmesg | sed -n 's/^.* microcode: CPU0 sig=0x\([^,]*\),.*$/\1/p'} - -What pehjota wrote: The laptops that have issues resuming from suspend, as well as a laptop that (as I mentioned earlier in #libreboot) won't boot with any Samsung DIMMs, all have CPUID 0x10676 (stepping M0). - -What pehjota wrote: Laptops with CPUID 0x167A (stepping R0) resume properly every time and work with Samsung DIMMs. I'll need to do more testing on more units to better confirm these trends, but it looks like the M0 microcode is very buggy. That would also explain why I didn't have issues with Samsung DIMMs with the Lenovo BIOS (which would have microcode updates). I wonder if VT-x works on R0. - -What pehjota wrote: As I said, 10676 is M0 and 1067A is R0; those are the two CPUIDs and steppings for Intel Core 2 Duo P8xxx CPUs with factory microcode. (1067 is the family and model, and 6 or A is the stepping ID.) - -@strong{TODO: check the CPUIDs and test S3 resume and/or KVM on any C2D systems (including non-P8xxx ones, which I don't have here) you have available. I'd be curious if you could confirm these results.} It might not be coreboot that's buggy with raminit/S3; it might just be down to the microcode updates. -@c @menu -@c * Unsorted notes:: -@c @end menu - -@node Unsorted notes -@c @subsubheading Unsorted notes -@c @anchor{#unsorted-notes} -@verbatim -<sgsit> do you know if it's possible to flash thinkpads over the LPC debug connector at the front edge? -<sgsit> that would make life much easier for systems like this -<sgsit> all the Wistron manufactured systems have this thing called a "golden finger", normally at the front edge of the board -<sgsit> you can plug a board in which gives diagnostic codes but i'm wondering whether it is capable of more -<sgsit> http://www.endeer.cz/bios.tools/bios.html -@end verbatim - - -@node Lenovo ThinkPad R400 -@subsubsection Lenovo ThinkPad R400 -It is believed that all or most R400 laptops are compatible. See notes about @ref{A note about CPUs - R400,r400_external,CPU compatibility} for potential incompatibilities. - -There are two possible flash chip sizes for the R400: 4MiB (32Mbit) or 8MiB (64Mbit). This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. - -@strong{The R400 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it by using a modified descriptor: see @ref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains notes, plus instructions). - -Flashing instructions can be found at @ref{How to update/install,flashrom}. - -@menu -* Compatibility without blobs - R400:: -* LCD Compatibility - R400:: -@end menu - -@node Compatibility without blobs - R400 -@c @subsubheading Compatibility (without blobs) -@c @menu -@c * Hardware virtualization vt-x:: -@c @end menu -@itemize -@item -Hardware virtualization vt-x -@c @subsubheading Hardware virtualization (vt-x) -@c @anchor{#hardware-virtualization-vt-x} -The R400, when run without CPU microcode updates in coreboot, currently kernel panics if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled for the guest, the guest panics (but the host is fine). Working around this in QEMU might be possible; if not, software virtualization should work fine (it's just slower). - -On GM45 hardware (with libreboot), make sure that the @emph{kvm} and @emph{kvm_intel} kernel modules are not loaded, when using QEMU. - -The following errata datasheet from Intel might help with investigation: @uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} -@end itemize - -The R400 is almost identical to the X200, code-wise. @xref{Lenovo ThinkPad X200,x200}. - -TODO: put hardware register logs here like on the @uref{x200.html,X200} and @uref{t400.html,T400} page. - -@node LCD Compatibility - R400 @c Fixed a typo here: previously 'LCD compatibily' -@c @subsubheading LCD compatibility -Not all LCD panels are compatible yet. @xref{LCD compatibility on GM45 laptops,gm45_lcd}. - - - -@node Lenovo ThinkPad T400 -@subsubsection Lenovo ThinkPad T400 -It is believed that all or most T400 laptops are compatible. See notes about @ref{A note about CPUs - T400,CPU compatibility} for potential incompatibilities. - -There are two possible flash chip sizes for the T400: 4MiB (32Mbit) or 8MiB (64Mbit). This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. - -@strong{The T400 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it by using a modified descriptor: see @ref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains notes, plus instructions) - -Flashing instructions can be found at @ref{How to update/install,flashrom}. - -@menu -* Compatibility without blobs - T400:: -* LCD compatibility - T400:: -* Hardware register dumps - T400:: -@end menu - -@node Compatibility without blobs - T400 -@c @subsubheading Compatibility (without blobs) - -@itemize -@item -Hardware virtualization vt-x - -The T400, when run without CPU microcode updates in coreboot, currently kernel panics if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled for the guest, the guest panics (but the host is fine). Working around this in QEMU might be possible; if not, software virtualization should work fine (it's just slower). - -On GM45 hardware (with libreboot), make sure that the @emph{kvm} and @emph{kvm_intel} kernel modules are not loaded, when using QEMU. - -The following errata datasheet from Intel might help with investigation: @uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} - -The T400 is almost identical to the X200, code-wise. @xref{Lenovo ThinkPad X200,x200}. -@end itemize - -@node LCD compatibility - T400 -@c @subsubheading LCD compatiblity -Not all LCD panels are compatible yet. @xref{LCD compatibility on GM45 laptops,gm45_lcd}. - -@node Hardware register dumps - T400 -@c @subsubheading Hardware register dumps -The coreboot wiki @uref{http://www.coreboot.org/Motherboard_Porting_Guide,shows} how to collect various logs useful in porting to new boards. Following are outputs from the T400: - -@itemize -@item -T400 with @strong{Winbond W25X64} flash chip (8MiB, SOIC-16) and Lenovo BIOS 2.02 (EC firmware 1.01): -@itemize -@item -@uref{../resources/misc/dumps/logs-t400-bios2.02-ec1.01/,logs-t400-bios2.02-ex1.01} -@end itemize - -@item -Version of flashrom used for the external flashing/reading logs is the one that libreboot git revision c164960 uses. -@end itemize - - -@node Lenovo ThinkPad T500 -@subsubsection Lenovo ThinkPad T500 -It is believed that all or most T500 laptops are compatible. See notes about @ref{A note about CPUs - T500,CPU compatibility} for potential incompatibilities. - -There are two possible flash chip sizes for the T500: 4MiB (32Mbit) or 8MiB (64Mbit). This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. - -@strong{The T500 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it by using a modified descriptor: see @ref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains notes, plus instructions) - -Flashing instructions can be found at @ref{How to update/install,flashrom}. - -@menu -* Compatibility without blobs - T500:: -* LCD compatibility - T500:: -* Descriptor and Gbe differences:: -* Hardware register dumps - T500:: -@end menu - -@node Compatibility without blobs - T500 -@c @subsubheading Compatibility (without blobs) -@itemize -@item -Hardware virtualization vt-x - -The T500, when run without CPU microcode updates in coreboot, currently kernel panics if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled for the guest, the guest panics (but the host is fine). Working around this in QEMU might be possible; if not, software virtualization should work fine (it's just slower). - -On GM45 hardware (with libreboot), make sure that the @emph{kvm} and @emph{kvm_intel} kernel modules are not loaded, when using QEMU. - -The following errata datasheet from Intel might help with investigation: @uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} - -The T500 is almost identical to the X200, code-wise. See @ref{Lenovo ThinkPad X200,x200}. -@end itemize - -@node LCD compatibility - T500 -@c @subsubheading LCD compatibility -Not all LCD panels are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. - -@node Descriptor and Gbe differences -@c @subsubheading Descriptor and Gbe differences -See @uref{../resources/misc/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt,descriptor_diff_t500_x200.txt} and @uref{../resources/misc/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt,gbe_diff_t500_x200.txt}. - -The patches above are based on the output from ich9deblob on a factory.rom image dumped from the T500 with a SOIC-8 4MiB flash chip. The patch re-creates the X200 descriptor/gbe source, so the commands were something like:@* $ @strong{diff -u t500gbe x200gbe}@* $ @strong{diff -u t500descriptor x200descriptor} - -ME VSCC table is in a different place and a different size on the T500. Libreboot disables and removes the ME anyway, so it doesn't matter. - -The very same descriptor/gbe used on the X200 (generated by @ref{ICH9 gen utility,ich9gen}) was re-used on the T500, and it still worked. - -@node Hardware register dumps - T500 -@c @subsubheading Hardware register dumps -The coreboot wiki @uref{http://www.coreboot.org/Motherboard_Porting_Guide,shows} how to collect various logs useful in porting to new boards. Following are outputs from the T500: - -@itemize -@item -T500 with @strong{Macronix MX25L3205D} flash chip (4MiB, SOIC-8) and Lenovo BIOS 3.13 7VET83WW (EC firmware 1.06): -@itemize -@item -@uref{../resources/misc/dumps/t500log/,t500log/} -@end itemize - -@end itemize - - -@node Apple Macbook1-1 -@subsubsection Information about the macbook1,1 -There is an Apple laptop called the macbook1,1 from 2006 which uses the same i945 chipset as the ThinkPad X60/T60. A developer ported the @ref{Apple Macbook2-1,MacBook2@,1} to coreboot, the ROM images also work on the macbook1,1. - -You can refer to @ref{Apple Macbook2-1,MacBook2@,1} for most of this. Macbook2,1 laptops come with Core 2 Duo processors which support 64-bit operating systems (and 32-bit). The MacBook1,1 uses Core Duo processors (supports 32-bit OS but not 64-bit), and it is believed that this is the only difference. - -It is believed that all models are compatible, listed here: -@itemize -@item -@uref{http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1,http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1} -@end itemize - -Specifically (Order No. / Model No. / CPU): - -@itemize -@item -MA255LL/A / A1181 (EMC 2092) / Core Duo T2500 @strong{(tested - working)} -@item -MA254LL/A / A1181 (EMC 2092) / Core Duo T2400 @strong{(tested - working)} -@item -MA472LL/A / A1181 (EMC 2092) / Core Duo T2500 (untested) -@end itemize - -Also of interest: @ref{How to build the ROM images,config_macbook21}. - -Unbricking: @uref{https://www.ifixit.com/Device/MacBook_Core_2_Duo,this page shows disassembly guides} and mono's page (see @ref{Apple Macbook2-1,MacBook2@,1}) shows the location of the SPI flash chip on the motherboard. @uref{https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529,How to remove the motherboard}. - -No method is yet known for flashing in GNU/Linux while the Apple firmware is running. You will need to disassemble the system and flash externally. Reading from flash seems to work. For external flashing, refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup}. - - - -@node Apple Macbook2-1 -@subsubsection Information about the macbook2,1 -There is an Apple laptop called the macbook2,1 from late 2006 or early 2007 that uses the same i945 chipset as the ThinkPad X60 and ThinkPad T60. A developer ported coreboot to their macbook2,1, and now libreboot can run on it. - -Mono Moosbart is the person who wrote the port for macbook2,1. Referenced below are copies (up to date at the time of writing, 20140630) of the pages that this person wrote when porting coreboot to the macbook2,1. They are included here in case the main site goes down for whatever reason, since they include a lot of useful information. - -Backups created using wget:@* @strong{$ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/}@* @strong{$ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/coreboot/}@* Use @strong{-e robots=off} if using this trick for other sites and the site restricts using robots.txt - -@strong{Links to wget backups (and the backups themselves) of Mono's pages (see above) removed temporarily. Mono has given me permission to distribute them, but I need to ask this person to tell me what license these works fall under first. Otherwise, the above URLs should be fine. NOTE TO SELF: REMOVE THIS WHEN DONE} -@menu -* Installing GNU/Linux distributions on Apple EFI firmware:: -* Information about coreboot:: -* coreboot wiki page:: -* Compatible models:: -@end menu - -@node Installing GNU/Linux distributions on Apple EFI firmware -@c @subsubheading Installing GNU/Linux distributions (on Apple EFI firmware) -@itemize -@item -Parabola GNU/Linux installation on a macbook2,1 with Apple EFI firmware (this is a copy of Mono's page, see above) @c ADD REF??? -@end itemize - -How to boot an ISO: burn it to a CD (like you would normally) and hold down the Alt/Control key while booting. The bootloader will detect the GNU/Linux CD as 'Windows' (because Apple doesn't think GNU/Linux exists). Install it like you normally would. When you boot up again, hold Alt/Control once more. The installation (on the HDD) will once again be seen as 'Windows'. (it's not actually Windows, but Apple likes to think that Apple and Microsoft are all that exist.) Now to install libreboot, follow @ref{MacBook2-1 install,flashrom_macbook21}. - -@node Information about coreboot -@c @subsubheading Information about coreboot -@itemize -@item -Coreboot on the macbook2,1 (this is a copy of Mono's page, see above) -@end itemize - -@node coreboot wiki page -@c @subsubheading coreboot wiki page -@itemize -@item -@uref{http://www.coreboot.org/Board:apple/macbook21,http://www.coreboot.org/Board:apple/macbook21} -@end itemize - -@node Compatible models -@c @subsubheading Compatible models -It is believed that all models are compatible, listed here: - -@itemize -@item -@uref{http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook2,1,http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook2,1} -@end itemize - -Specifically (Order No. / Model No. / CPU): - -@itemize -@item -MA699LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T5600 @strong{(tested - working)} -@item -MA701LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T7200 @strong{(tested - working)} -@item -MB061LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7200 (untested) -@item -MA700LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T7200 @strong{(tested - working)} -@item -MB063LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7400 (untested) -@item -MB062LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7400 @strong{(tested - working)} -@end itemize - -Also of interest: @ref{How to build the ROM images,config_macbook21}. - -Unbricking: @uref{https://www.ifixit.com/Device/MacBook_Core_2_Duo,this page shows disassembly guides} and mono's page (see above) shows the location of the SPI flash chip on the motherboard. @uref{https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529,How to remove the motherboard}. - -For external flashing, refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup}. - -You need to replace OS X with GNU/Linux before flashing libreboot. (OSX won't run at all in libreboot). - -There are some issues with this system (compared to other computers that libreboot supports): - -This is an apple laptop, so it comes with OS X: it has an Apple keyboard, which means that certain keys are missing: insert, del, home, end, pgup, pgdown. There is also one mouse button only. Battery life is poor compared to X60/T60 (for now). It also has other issues: for example, the Apple logo on the back is a hole, exposing the backlight, which means that it glows. You should cover it up. - -The system does get a bit hotter compared to when running the original firmware. It is certainly hotter than an X60/T60. The heat issues have been partially fixed by the following patch (now merged in libreboot): @uref{http://review.coreboot.org/#/c/7923/,http://review.coreboot.org/#/c/7923/}. - -@strong{The MacBook2,1 comes with a webcam, which does not work without proprietary software. Also, webcams are a security risk; cover it up! Or remove it.} - -A user reported that they could get better response from the touchpad with the following in their xorg.conf: - -@verbatim -Section "InputClass" - Identifier "Synaptics Touchpad" - Driver "synaptics" - MatchIsTouchpad "on" - MatchDevicePath "/dev/input/event*" - Driver "synaptics" -# The next two values determine how much pressure one needs -# for tapping, moving the cursor and other events. - Option "FingerLow" "10" - Option "FingerHigh" "15" -# Do not emulate mouse buttons in the touchpad corners. - Option "RTCornerButton" "0" - Option "RBCornerButton" "0" - Option "LTCornerButton" "0" - Option "LBCornerButton" "0" -# One finger tap = left-click - Option "TapButton1" "1" -# Two fingers tap = right-click - Option "TapButton2" "3" -# Three fingers tap = middle-mouse - Option "TapButton3" "2" -# Try to not count the palm of the hand landing on the touchpad -# as a tap. Not sure if helps. - Option "PalmDetect" "1" -# The following modifies how long and how fast scrolling continues -# after lifting the finger when scrolling - Option "CoastingSpeed" "20" - Option "CoastingFriction" "200" -# Smaller number means that the finger has to travel less distance -# for it to count as cursor movement. Larger number prevents cursor -# shaking. - Option "HorizHysteresis" "10" - Option "VertHysteresis" "10" -# Prevent two-finger scrolling. Very jerky movement - Option "HorizTwoFingerScroll" "0" - Option "VertTwoFingerScroll" "0" -# Use edge scrolling - Option "HorizEdgeScroll" "1" - Option "VertEdgeScroll" "1" -EndSection -@end verbatim - -A user reported that the above is only for linux kernel 3.15 or lower. For newer kernels, the touchpad works fine out of the box, except middle tapping. - -A user submitted a utility to enable 3-finger tap on this laptop. It's available at @emph{resources/utilities/macbook21-three-finger-tap} in the libreboot git repository. The script is for GNOME, confirmed to work in Trisquel 7. - - -@node Recommended wifi chipsets -@subsection Recommended wifi chipsets -The following are known to work well: -@itemize -@item -@uref{http://h-node.org/search/results/en/1/search/wifi/ar9285,Atheros AR5B95} (chipset: Atheros AR9285); mini PCI-E. Most of these are half-height, so you will need a half>full height mini PCI express adapter/bracket. -@item -@uref{http://h-node.org/wifi/view/en/116/Atheros-Communications-Inc--AR928X-Wireless-Network-Adapter--PCI-Express---rev-01-,Atheros AR928X} chipset; mini PCI-E. Most of these are half-height, so you will need a half>full height mini PCI express adapter/bracket -@item -Unex DNUA-93F (chipset: @uref{http://h-node.org/search/results/en/1/search/wifi/ar9271,Atheros AR9271}); USB. -@item -Any of the chipsets listed at @uref{https://www.fsf.org/resources/hw/endorsement/respects-your-freedom,https://www.fsf.org/resources/hw/endorsement/respects-your-freedom} -@item -Any of the chipsets listed at @uref{http://h-node.org/wifi/catalogue/en/1/1/undef/undef/yes?,http://h-node.org/wifi/catalogue/en/1/1/undef/undef/yes?} -@end itemize - -The following was mentioned (on IRC), but it's unknown to the libreboot project if these work with linux-libre kernel (TODO: test): - -@itemize -@item -ar5bhb116 ar9382 ABGN -@item -[0200]: Qualcomm Atheros AR242x / AR542x Wireless Network Adapter (PCI-Express) [168c:001c] -@end itemize - - -@node GM45 chipsets - remove the ME -@subsection GM45 chipsets: remove the ME (manageability engine) -This sections relates to disabling and removing the ME (Intel @strong{M}anagement @strong{E}ngine) on GM45. This was originally done on the ThinkPad X200, and later adapted for the ThinkPad R400/T400/T500. It can in principle be done on any GM45 or GS45 system. - -The ME is a blob that typically must be left inside the flash chip (in the ME region, as outlined by the default descriptor). On GM45, it is possible to remove it without any ill effects. All other parts of coreboot on GM45 systems (provided GMA MHD4500 / Intel graphics) can be blob-free, so removing the ME was the last obstacle to make GM45 a feasible target in libreboot (the systems can also work without the microcode blobs). - -The ME is removed and disabled in libreboot by modifying the descriptor. More info about this can be found in the ich9deblob/ich9gen source code in resources/utilities/ich9deblob/ in libreboot, or more generally on this page. - -More information about the ME can be found at @uref{http://www.coreboot.org/Intel_Management_Engine,http://www.coreboot.org/Intel_Management_Engine} and @uref{http://me.bios.io/Main_Page,http://me.bios.io/Main_Page}. - -Another project recently found: @uref{http://io.smashthestack.org/me/,http://io.smashthestack.org/me/} - -@menu -* ICH9 gen utility:: -* ICH9 deblob utility:: -* demefactory utility:: -* Notes - GM45 ME removal:: -@end menu - -@node ICH9 gen utility -@subsubsection ICH9 gen utility -It is no longer necessary to use @ref{ICH9 deblob utility,ich9deblob} to generate a deblobbed descriptor+gbe image for GM45 targets. ich9gen is a small utility within ich9deblob that can generate them from scratch, without a factory.bin dump. - -ich9gen executables can be found under ./ich9deblob/ statically compiled in libreboot_util. If you are using src or git, build ich9gen from source with:@* $ @strong{./build module ich9deblob}@* The executable will appear under resources/utilities/ich9deblob/ - -Run:@* $ @strong{./ich9gen} - -Running ich9gen this way (without any arguments) generates a default descriptor+gbe image with a generic MAC address. You probably don't want to use the generic one; the ROM images in libreboot contain a descriptor+gbe image by default (already inserted) just to prevent or mitigate the risk of bricking your laptop, but with the generic MAC address (the libreboot project does not know what your real MAC address is). - -You can find out your MAC address from @strong{ip addr} or @strong{ifconfig} in GNU/Linux. Alternatively, if you are running libreboot already (with the correct MAC address in your ROM), dump it (flashrom -r) and read the first 6 bytes from position 0x1000 (or 0x2000) in a hex editor (or, rename it to factory.rom and run it in ich9deblob: in the newly created mkgbe.c will be the individual bytes of your MAC address). If you are currently running the stock firmware and haven't installed libreboot yet, you can also run that through ich9deblob to get the mac address. - -An even simpler way to get the MAC address would be to read what's on the little sticker on the bottom/base of the laptop. - -On GM45 laptops that use flash descriptors, the MAC address or the onboard ethernet chipset is flashed (inside the ROM image). You should generate a descriptor+gbe image with your own MAC address inside (with the Gbe checksum updated to match). Run:@* $ @strong{./ich9gen --macaddress XX:XX:XX:XX:XX:XX}@* (replace the XX chars with the hexadecimal chars in the MAC address that you want) - -Two new files will be created: - -@itemize -@item -@strong{ich9fdgbe_4m.bin}: this is for GM45 laptops with the 4MB flash chip. -@item -@strong{ich9fdgbe_8m.bin}: this is for GM45 laptops with the 8MB flash chip. -@item -@strong{ich9fdgbe_16m.bin}: this is for GM45 laptops with the 16MB flash chip. -@end itemize - -Assuming that your libreboot image is named @strong{libreboot.rom}, copy the file to where @strong{libreboot.rom} is located and then insert the descriptor+gbe file into the ROM image. For 16MiB flash chips:@* $ @strong{dd if=ich9fdgbe_16m.bin of=libreboot.rom bs=1 count=12k conv=notrunc}@* For 8MiB flash chips:@* $ @strong{dd if=ich9fdgbe_8m.bin of=libreboot.rom bs=1 count=12k conv=notrunc}@* For 4MiB flash chips:@* $ @strong{dd if=ich9fdgbe_4m.bin of=libreboot.rom bs=1 count=12k conv=notrunc}@* - -Your libreboot.rom image is now ready to be flashed on the system. Refer back to @ref{How to update/install,flashrom}. for how to flash it. - -@menu -* Write-protecting the flash chip:: -@end menu - -@node Write-protecting the flash chip -@ifinfo -@subsubheading Write-protecting the flash chip -@end ifinfo -Look in @emph{resources/utilities/ich9deblob/src/descriptor/descriptor.c} for the following lines in the @emph{descriptorHostRegionsUnlocked} function: - -@verbatim - descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x1; - descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; - descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; - descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; - descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; -@end verbatim - -Also look in @emph{resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.c} for the following lines: - -@verbatim - descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ - descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ - descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ - descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ - descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ -@end verbatim - -NOTE: When you write-protect the flash chip, re-flashing is no longer possible unless you use dedicated external equipment, which also means disassembling the laptop. The same equipment can also be used to remove the write-protection later on, if you choose to do so. *Only* write-protect the chip if you have the right equipment for external flashing later on; for example, see @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup}. - -Change them all to 0x0, then re-compile ich9gen. After you have done that, follow the notes in @ref{ICH9 deblob utility,ich9gen} to generate a new descriptor+gbe image and insert that into your ROM image, then flash it. The next time you boot, the flash chip will be read-only in software (hardware re-flashing will still work, which you will need for re-flashing the chip after write-protecting it, to clear the write protection or to flash yet another ROM image with write protection set in the descriptor). - -Flashrom will tell you that you can still forcefully re-flash, using @emph{-p internal:ich_spi_force=yes} but this won't actually work; it'll just brick your laptop. - -For external flashing guides, refer to @ref{Installation}. - -@node ICH9 deblob utility -@subsubsection ICH9 deblob utility -@strong{This is no longer strictly necessary. Libreboot ROM images for GM45 systems now contain the 12KiB descriptor+gbe generated from ich9gen, by default.} - -This was the tool originally used to disable the ME on X200 (later adapted for other systems that use the GM45 chipset). @ref{ICH9 gen utility,ich9gen} now supersedes it; ich9gen is better because it does not rely on dumping the factory.rom image (whereas, ich9deblob does). - -This is what you will use to generate the deblobbed descriptor+gbe regions for your libreboot ROM image. - -If you are working with libreboot_src (or git), you can find the source under resources/utilities/ich9deblob/ and will already be compiled if you ran @strong{./build module all} or @strong{./build module ich9deblob} from the main directory (./), otherwise you can build it like so:@* $ @strong{./build module ich9deblob}@* An executable file named @strong{ich9deblob} will now appear under resources/utilities/ich9deblob/ - -If you are working with libreboot_util release archive, you can find the utility included, statically compiled (for i686 and x86_64 on GNU/Linux) under ./ich9deblob/. - -Place the factory.rom from your system (can be obtained using the external flashing guides for GM45 targets linked, @pxref{Installation}) in the directory where you have your ich9deblob executable, then run the tool:@* $ @strong{./ich9deblob} - -A 12kiB file named @strong{deblobbed_descriptor.bin} will now appear. @strong{Keep this and the factory.rom stored in a safe location!} The first 4KiB contains the descriptor data region for your system, and the next 8KiB contains the gbe region (config data for your gigabit NIC). These 2 regions could actually be separate files, but they are joined into 1 file in this case. - -A 4KiB file named @strong{deblobbed_4kdescriptor.bin} will alternatively appear, if no GbE region was detected inside the ROM image. This is usually the case, when a discrete NIC is used (eg Broadcom) instead of Intel. Only the Intel NICs need a GbE region in the flash chip. - -Assuming that your libreboot image is named @strong{libreboot.rom}, copy the @strong{deblobbed_descriptor.bin} file to where @strong{libreboot.rom} is located and then run:@* $ @strong{dd if=deblobbed_descriptor.bin of=libreboot.rom bs=1 count=12k conv=notrunc} - -Alternatively, if you got a the @strong{deblobbed_4kdescriptor.bin} file (no GbE defined), do this: $ @strong{dd if=deblobbed_4kdescriptor.bin of=libreboot.rom bs=1 count=4k conv=notrunc} - -The utility will also generate 4 additional files: - -@itemize -@item -mkdescriptor.c -@item -mkdescriptor.h -@item -mkgbe.c -@item -mkgbe.h -@end itemize - -These are C source files that can re-generate the very same Gbe and Descriptor structs (from ich9deblob/ich9gen). To use these, place them in src/ich9gen/ in ich9deblob, then re-build. The newly built @strong{ich9gen} executable will be able to re-create the very same 12KiB file from scratch, based on the C structs, this time @strong{without} the need for a factory.rom dump! - -You should now have a @strong{libreboot.rom} image containing the correct 4K descriptor and 8K gbe regions, which will then be safe to flash. Refer back to @ref{How to update/install,flashrom}. for how to flash it. - -@node demefactory utility -@subsubsection demefactory utility -This takes a factory.rom dump and disables the ME/TPM, but leaves the region intact. It also sets all regions read-write. - -The ME interferes with flash read/write in flashrom, and the default descriptor locks some regions. The idea is that doing this will remove all of those restrictions. - -Simply run (with factory.rom in the same directory):@* $ @strong{./demefactory} - -It will generate a 4KiB descriptor file (only the descriptor, no GbE). Insert that into a factory.rom image (NOTE: do this on a copy of it. Keep the original factory.rom stored safely somewhere):@* $ @strong{dd if=demefactory_4kdescriptor.bin of=factory_nome.rom bs=1 count=4k conv=notrunc} - -TODO: test this.@* TODO: lenovobios (GM45 thinkpads) still write-protects parts of the flash. Modify the assembly code inside. Note: the factory.rom (BIOS region) from lenovobios is in a compressed format, which you have to extract. bios_extract upstream won't work, but the following was said in #coreboot on freenode IRC: - -@verbatim -<roxfan> vimuser: try bios_extract with ffv patch http://patchwork.coreboot.org/patch/3444/ -<roxfan> or https://github.com/coreboot/bios_extract/blob/master/phoenix_extract.py -<roxfan> what are you looking for specifically, btw? - -0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only. -0x84: 0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked. -@end verbatim - -Use-case: a factory.rom image modified in this way would theoretically have no flash protections whatsoever, making it easy to quickly switch between factory/libreboot in software, without ever having to disassemble and re-flash externally unless you brick the device. - -demefactory is part of the ich9deblob src, found at @emph{resources/utilities/ich9deblob/} - -@node Notes - GM45 ME removal -@subsubsection Notes -The sections below are adapted from (mostly) IRC logs related to early development getting the ME removed on GM45. They are useful for background information. This could not have been done without sgsit's help. - -@menu -* Early notes:: -* Flash chips:: -* Early development notes:: -* GBE gigabit ethernet region in SPI flash:: -* GBE region - change MAC address:: -* Flash descriptor region:: -* platform data partition in boot flash factoryrom / lenovo bios:: -@end menu - -@node Early notes -@ifinfo -@subsubheading Early notes -@end ifinfo -@itemize -@item -@uref{http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf,http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf} page 230 mentions about descriptor and non-descriptor mode (which wipes out gbe and ME/AMT). -@item -textstrikeout@{@strong{See reference to HDA_SDO (disable descriptor security)@}} strap connected GPIO33 pin is it on ICH9-M (X200). HDA_SDO applies to later chipsets (series 6 or higher). Disabling descriptor security also disables the ethernet according to sgsit. sgsit's method involves use of 'soft straps' (see IRC logs below) instead of disabling the descriptor. @c ADD STRIKEOUT -@item -@strong{and the location of GPIO33 on the x200s: (was an external link. Putting it here instead)} @uref{../resources/images/x200/gpio33_location.jpg,../resources/images/x200/gpio33_location.jpg} - it's above the number 7 on TP37 (which is above the big intel chip at the bottom) -@item -The ME datasheet may not be for the mobile chipsets but it doesn't vary that much. This one gives some detail and covers QM67 which is what the X201 uses: @uref{http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf,http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf} -@end itemize - -@node Flash chips -@ifinfo -@subsubheading Flash chips -@end ifinfo -@itemize -@item -Schematics for X200 laptop: @uref{http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf,http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf} @strong{textstrikeout@{- Page 20 and page 9 refer to SDA_HDO or SDA_HDOUT@}} only on series 6 or higher chipsets. ICH9-M (X200) does it with a strap connected to GPIO33 pin (see IRC notes below)@* - According to page 29, the X200 can have any of the following flash chips: -@itemize -@item -ATMEL AT26DF321-SU 72.26321.A01 - this is a 32Mb (4MiB) chip -@item -MXIC (Macronix?) MX25L3205DM2I-12G 72.25325.A01 - another 32Mb (4MiB) chip -@item -MXIC (Macronix?) MX25L6405DMI-12G 41R0820AA - this is a 64Mb (8MiB) chip -@item -Winbond W25X64VSFIG 41R0820BA - another 64Mb (8MiB) chip -@end itemize - -sgsit says that the X200s with the 64Mb flash chips are (probably) the ones with AMT (alongside the ME), whereas the 32Mb chips contain only the ME. -@item -Schematics for X200s laptop: @uref{http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf,http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf}. -@end itemize - -@node Early development notes -@ifinfo -@subsubheading Early development notes -@end ifinfo - -@verbatim - -Start (hex) End (hex) Length (hex) Area Name ------------ --------- ------------ --------- -00000000 003FFFFF 00400000 Flash Image - -00000000 00000FFF 00001000 Descriptor Region -00000004 0000000F 0000000C Descriptor Map -00000010 0000001B 0000000C Component Section -00000040 0000004F 00000010 Region Section -00000060 0000006B 0000000C Master Access Section -00000060 00000063 00000004 CPU/BIOS -00000064 00000067 00000004 Manageability Engine (ME) -00000068 0000006B 00000004 GbE LAN -00000100 00000103 00000004 ICH Strap 0 -00000104 00000107 00000004 ICH Strap 1 -00000200 00000203 00000004 MCH Strap 0 -00000EFC 00000EFF 00000004 Descriptor Map 2 -00000ED0 00000EF7 00000028 ME VSCC Table -00000ED0 00000ED7 00000008 Flash device 1 -00000ED8 00000EDF 00000008 Flash device 2 -00000EE0 00000EE7 00000008 Flash device 3 -00000EE8 00000EEF 00000008 Flash device 4 -00000EF0 00000EF7 00000008 Flash device 5 -00000F00 00000FFF 00000100 OEM Section -00001000 001F5FFF 001F5000 ME Region -001F6000 001F7FFF 00002000 GbE Region -001F8000 001FFFFF 00008000 PDR Region -00200000 003FFFFF 00200000 BIOS Region - -Start (hex) End (hex) Length (hex) Area Name ------------ --------- ------------ --------- -00000000 003FFFFF 00400000 Flash Image - -00000000 00000FFF 00001000 Descriptor Region -00000004 0000000F 0000000C Descriptor Map -00000010 0000001B 0000000C Component Section -00000040 0000004F 00000010 Region Section -00000060 0000006B 0000000C Master Access Section -00000060 00000063 00000004 CPU/BIOS -00000064 00000067 00000004 Manageability Engine (ME) -00000068 0000006B 00000004 GbE LAN -00000100 00000103 00000004 ICH Strap 0 -00000104 00000107 00000004 ICH Strap 1 -00000200 00000203 00000004 MCH Strap 0 -00000ED0 00000EF7 00000028 ME VSCC Table -00000ED0 00000ED7 00000008 Flash device 1 -00000ED8 00000EDF 00000008 Flash device 2 -00000EE0 00000EE7 00000008 Flash device 3 -00000EE8 00000EEF 00000008 Flash device 4 -00000EF0 00000EF7 00000008 Flash device 5 -00000EFC 00000EFF 00000004 Descriptor Map 2 -00000F00 00000FFF 00000100 OEM Section -00001000 00002FFF 00002000 GbE Region -00003000 00202FFF 00200000 BIOS Region - -Build Settings --------------- -Flash Erase Size = 0x1000 - -@end verbatim - -It's a utility called 'Flash Image Tool' for ME 4.x that was used for this. You drag a complete image into in and the utility decomposes the various components, allowing you to set soft straps. - -This tool is proprietary, for Windows only, but was used to deblob the X200. End justified means, and the utility is no longer needed since the ich9deblob utility (documented on this page) can now be used to create deblobbed descriptors. - -@node GBE gigabit ethernet region in SPI flash -@ifinfo -@subsubheading GBE (gigabit ethernet) region in SPI flash -@end ifinfo -Of the 8K, about 95% is 0xFF. The data is the gbe region is fully documented in this public datasheet: @uref{http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf,http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf} - -The only actual content found was: - -@verbatim - -00 1F 1F 1F 1F 1F 00 08 FF FF 83 10 FF FF FF FF -08 10 FF FF C3 10 EE 20 AA 17 F5 10 86 80 00 00 -01 0D 00 00 00 00 05 06 20 30 00 0A 00 00 8B 8D -02 06 40 2B 43 00 00 00 F5 10 AD BA F5 10 BF 10 -AD BA CB 10 AD BA AD BA 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 01 00 40 28 12 07 40 FF FF FF FF FF FF FF FF -FF FF FF FF FF FF FF FF FF FF FF FF FF FF D9 F0 -20 60 1F 00 02 00 13 00 00 80 1D 00 FF 00 16 00 -DD CC 18 00 11 20 17 00 DD DD 18 00 12 20 17 00 -00 80 1D 00 00 00 1F -@end verbatim - -The first part is the MAC address set to all 0x1F. It's repeated haly way through the 8K area, and the rest is all 0xFF. This is all documented in the datasheet. - -The GBe region starts at 0x20A000 bytes from the *end* of a factory image and is 0x2000 bytes long. In libreboot (deblobbed) the descriptor is set to put gbe directly after the initial 4K flash descriptor. So the first 4K of the ROM is the descriptor, and then the next 8K is the gbe region. -@c @menu -@c * GBE region change MAC address:: -@c @end menu - -@node GBE region - change MAC address -@ifinfo -@subsubheading GBE region: change MAC address -@end ifinfo -According to the datasheet, it's supposed to add up to 0xBABA but can actually be others on the X200. @uref{https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums,https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums} - -@emph{"One of those engineers loves classic rock music, so they selected 0xBABA"} - -In honour of the song @emph{Baba O'Reilly} by @emph{The Who} apparently. We're not making this stuff up... - -0x3ABA, 0x34BA, 0x40BA and more have been observed in the main Gbe regions on the X200 factory.rom dumps. The checksums of the backup regions match BABA, however. - -By default, the X200 (as shipped by Lenovo) actually has an invalid main gbe checksum. The backup gbe region is correct, and is what these systems default to. Basically, you should do what you need on the *backup* gbe region, and then correct the main one by copying from the backup. - -Look at resources/utilities/ich9deblob/ich9deblob.c. - -@itemize -@item -Add the first 0x3F 16bit numbers (unsigned) of the GBe descriptor together (this includes the checksum value) and that has to add up to 0xBABA. In other words, the checksum is 0xBABA minus the total of the first 0x3E 16bit numbers (unsigned), ignoring any overflow. -@end itemize - -@node Flash descriptor region -@ifinfo -@subsubheading Flash descriptor region -@end ifinfo -@uref{http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf,http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf} from page 850 onwards. This explains everything that is in the flash descriptor, which can be used to understand what libreboot is doing about modifying it. - -How to deblob: - -@itemize -@item -patch the number of regions present in the descriptor from 5 - 3 -@item -originally descriptor + bios + me + gbe + platform -@item -modified = descriptor + bios + gbe -@item -the next stage is to patch the part of the descriptor which defines the start and end point of each section -@item -then cut out the gbe region and insert it just after the region -@item -all this can be substantiated with public docs (ICH9 datasheet) -@item -the final part is flipping 2 bits. Halting the ME via 1 MCH soft strap and 1 ICH soft strap -@item -the part of the descriptor described there gives the base address and length of each region (bits 12:24 of each address) -@item -to disable a region, you set the base address to 0xFFF and the length to 0 -@item -and you change the number of regions from 4 (zero based) to 2 -@end itemize - -There's an interesting parameter called 'ME Alternate disable', which allows the ME to only handle hardware errata in the southbridge, but disables any other functionality. This is similar to the 'ignition' in the 5 series and higher but using the standard firmware instead of a small 128K version. Useless for libreboot, though. - -To deblob GM45, you chop out the platform and ME regions and correct the addresses in flReg1-4. Then you set meDisable to 1 in ICHSTRAP0 and MCHSTRAP0. - -How to patch the descriptor from the factory.rom dump +- Suppliers page (../../suppliers)? @end ignore -@itemize -@item -map the first 4k into the struct (minus the gbe region) -@item -set NR in FLMAP0 to 2 (from 4) -@item -adjust BASE and LIMIT in flReg1,2,3,4 to reflect the new location of each region (or remove them in the case of Platform and ME) -@item -set meDisable to 1/true in ICHSTRAP0 and MCHSTRAP0 -@item -extract the 8k GBe region and append that to the end of the 4k descriptor -@item -output the 12k concatenated chunk -@item -Then it can be dd'd into the first 12K part of a coreboot image. -@item -the GBe region always starts 0x20A000 bytes from the end of the ROM -@end itemize - -This means that libreboot's descriptor region will simply define the following regions: - -@itemize -@item -descriptor (4K) -@item -gbe (8K) -@item -bios (rest of flash chip. CBFS also set to occupy this whole size) -@end itemize - -The data in the descriptor region is little endian, and it represents bits 24:12 of the address (bits 12-24, written this way since bit 24 is nearer to left than bit 12 in the binary representation). - -So, @emph{x << 12 = address} +@copying Copyright @copyright{} 2014, 2015, 2016 Leah Woods +<info@@minifree.org>@* Copyright © 2015 Paul Kocialkowski <contact@@paulk.fr>@* +Copyright © 2015 Alex David <opdecirkel@@gmail.com>@* Copyright © 2015 Patrick +"P. J." McDermott <pj@@pehjota.net>@* Copyright © 2015 Albin Söderqvist@* +Copyright © 2015 Jeroen Quint <jezza@@diplomail.ch>@* -If it's in descriptor mode, then the first 4 bytes will be 5A A5 F0 0F. +Permission is granted to copy, distribute and/or modify this document under the +terms of the GNU Free Documentation License, Version 1.3 or any later version +published by the Free Software Foundation; with no Invariant Sections, no +Front-Cover Texts, and no Back-Cover Texts. A copy of the license can be found +at @uref{../resources/licenses/gfdl-1.3.txt,gfdl-1.3.txt} + +Updated versions of the license (when available) can be found at +@uref{https://www.gnu.org/licenses/licenses.html,https://www.gnu.org/licenses/licenses.html} + +@quotation UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE EXTENT +POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS AND AS-AVAILABLE, AND +MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND CONCERNING THE LICENSED +MATERIAL, WHETHER EXPRESS, IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT +LIMITATION, WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR +PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, ACCURACY, OR THE +PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT KNOWN OR DISCOVERABLE. WHERE +DISCLAIMERS OF WARRANTIES ARE NOT ALLOWED IN FULL OR IN PART, THIS DISCLAIMER +MAY NOT APPLY TO YOU. + +TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE TO YOU ON ANY +LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, NEGLIGENCE) OR OTHERWISE FOR ANY +DIRECT, SPECIAL, INDIRECT, INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR +OTHER LOSSES, COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR +USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR DAMAGES. WHERE A LIMITATION OF +LIABILITY IS NOT ALLOWED IN FULL OR IN PART, THIS LIMITATION MAY NOT APPLY TO +YOU. + +The disclaimer of warranties and limitation of liability provided above shall be +interpreted in a manner that, to the extent possible, most closely approximates +an absolute disclaimer and waiver of all liability. @end quotation -@node platform data partition in boot flash factoryrom / lenovo bios -@ifinfo -@subsubheading platform data partition in boot flash (factory.rom / lenovo bios) -@end ifinfo -Basically useless for libreboot, since it appears to be a blob. Removing it didn't cause any issues in libreboot. +@end copying -This is a 32K region from the factory image. It could be data (non-functional) that the original Lenovo BIOS used, but we don't know. +@ifnottex @paragraphindent 0 @end ifnottex -It has only a 448 byte fragment different from 0x00 or 0xFF. +@titlepage @title GNU Libreboot documentation @insertcopying @end titlepage +@ifnottex @insertcopying @end ifnottex -@node LCD compatibility on GM45 laptops -@subsection LCD compatibility on GM45 laptops -On the T400 and T500 (maybe others), some of the higher resolution panels (e.g. 1440x900, 1680x1050, 1920x1200) fail in libreboot. +@summarycontents @contents -@strong{All X200/X200S/X200T LCD panels are believed to be compatible.} +@node Top @top GNU Libreboot documentation Information about this release can be +found by consulting the release notes (see @ref{Libreboot release +information,release}). Always check @uref{http://libreboot.org,libreboot.org} +for updates. @menu -* The problem:: -* Current workaround:: -* Differences in dmesg:: -@end menu - - -@node The problem -@subsubsection The problem -In some cases, backlight turns on during boot, sometimes not. In all cases, no display is shown in GRUB, nor in GNU/Linux. - -@node Current workaround -@subsubsection Current workaround -Libreboot (git, and releases after 20150518) now automatically detect whether to use single or dual link LVDS configuration. If you're using an older version, use the instructions below. In practise, this means that you'll get a visual display when booting GNU/Linux, but not in GRUB (payload). - -The i915 module in the Linux kernel also provides an option to set the LVDS link configuration. i915.lvds_channel_mode:Specify LVDS channel mode (0=probe BIOS [default], 1=single-channel, 2=dual-channel) (int) - from /sbin/modinfo i915 - use @strong{i915.lvds_channel_mode=2} as a kernel option in grub.cfg. +* Libreboot release information:: Table of contents:: About the libreboot +* project:: How do I know what version I'm running?:: -@node Differences in dmesg -@subsubsection Differences in dmesg (kernel parameter added) -@uref{https://01.org/linuxgraphics/documentation/how-report-bugs,https://01.org/linuxgraphics/documentation/how-report-bugs} +Appendix +* GNU Free Documentation License:: +@end menu -These panels all work in the original firmware, so the idea is to see what differences there are in how coreboot handles them. +@node Libreboot release information @chapter Libreboot release information +Release date: Day Month Year. -@uref{http://www.coreboot.org/pipermail/coreboot/attachments/20150712/d2e214bb/attachment-0002.txt,dmesg with coreboot-libre} (coreboot) - See: @emph{[drm:intel_lvds_init] detected single-link lvds configuration} +Installation instructions can be found @ref{Installation,here}. Building +instructions (for source code) can be found @ref{Building libreboot from source, +here}. -@uref{http://www.coreboot.org/pipermail/coreboot/attachments/20150712/d2e214bb/attachment-0003.txt,dmesg with lenovobios} (lenovobios) - For the same line, it says dual-channel lvds configuration. @menu -* EDID:: +* Machines supported in this release:: Changes for this release relative to +* r20150518:: Earliest changes last, recent changes first @end menu -@node EDID -@ifinfo -@subsubheading EDID -@end ifinfo -One T500 had a screen (1920x1200) that is currently incompatible. Working to fix it. EDID: +@node Machines supported in this release @section Machines supported in this +release: @itemize @item @strong{ASUS Chromebook C201} @itemize @item Check +notes: @xref{ASUS Chromebook C201}. @c @strong{@emph{hcl/c201.html}} @item NOTE: +not in libreboot 20150518. Only in git. for now. @end itemize -@verbatim -user@user-ThinkPad-T500:~/Desktop$ sudo i2cdump -y 2 0x50 -No size specified (using byte-data access) - 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef -00: XX ff ff ff ff ff ff 00 30 ae 55 40 00 00 00 00 X.......0?U@.... -10: 00 11 01 03 80 21 15 78 ea ba 70 98 59 52 8c 28 .????!?x??p?YR?( -20: 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 %PT...?????????? -30: 01 01 01 01 01 01 e7 3a 80 8c 70 b0 14 40 1e 50 ???????:??p??@?P -40: 24 00 4b cf 10 00 00 19 16 31 80 8c 70 b0 14 40 $.K??..??1??p??@ -50: 1e 50 24 00 4b cf 10 00 00 19 00 00 00 0f 00 d1 ?P$.K??..?...?.? -60: 0a 32 d1 0a 28 11 01 00 32 0c 00 00 00 00 00 fe ?2??(??.2?.....? -70: 00 4c 50 31 35 34 57 55 31 2d 54 4c 42 31 00 9a .LP154WU1-TLB1.? -80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -@end verbatim +@item @strong{Gigabyte GA-G41M-ES2L desktop board} @itemize @item Check notes: +@xref{Gigabyte GA-G41M-ES2L motherboard}. @c +@strong{@emph{hcl/ga-g41m-es2l.html}} @item @strong{NOTE: not in libreboot +20150518. Only in git, for now.} @end itemize -What happens: backlight turns on at boot, then turns off. At no point is there a working visual display. +@item @strong{Intel D510MO desktop board} @itemize @item Check notes: +@xref{Intel D510MO motherboard}. @c @strong{@emph{hcl/d510mo.html}} @item +@strong{NOTE: not in libreboot 20150518. Only in git, for now.} @end itemize -Another incompatible screen (EDID) 1680 x 1050 with the same issue: +@item @strong{ASUS KFSN4-DRE server board} @itemize @item PCB revision 1.05G is +the best version (can use 6-core CPUs) @item Check notes: @xref{ASUS KFSN4-DRE +motherboard}. @c @strong{@emph{hcl/kfsn4-dre.html}} @item @strong{NOTE: not in +libreboot 20150518. Only in git, for now.} @end itemize -@verbatim -EDID: -00 ff ff ff ff ff ff 00 30 ae 53 40 00 00 00 00 -00 11 01 03 80 21 15 78 ea cd 75 91 55 4f 8b 26 -21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 -01 01 01 01 01 01 a8 2f 90 e0 60 1a 10 40 20 40 -13 00 4b cf 10 00 00 19 b7 27 90 e0 60 1a 10 40 -20 40 13 00 4b cf 10 00 00 19 00 00 00 0f 00 b3 -0a 32 b3 0a 28 14 01 00 4c a3 50 33 00 00 00 fe -00 4c 54 4e 31 35 34 50 33 2d 4c 30 32 0a 00 7e -Extracted contents: -header: 00 ff ff ff ff ff ff 00 -serial number: 30 ae 53 40 00 00 00 00 00 11 -version: 01 03 -basic params: 80 21 15 78 ea -chroma info: cd 75 91 55 4f 8b 26 21 50 54 -established: 00 00 00 -standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 -descriptor 1: a8 2f 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 -descriptor 2: b7 27 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 -descriptor 3: 00 00 00 0f 00 b3 0a 32 b3 0a 28 14 01 00 4c a3 50 33 -descriptor 4: 00 00 00 fe 00 4c 54 4e 31 35 34 50 33 2d 4c 30 32 0a -extensions: 00 -checksum: 7e - -Manufacturer: LEN Model 4053 Serial Number 0 -Made week 0 of 2007 -EDID version: 1.3 -Digital display -Maximum image size: 33 cm x 21 cm -Gamma: 220% -Check DPMS levels -DPMS levels: Standby Suspend Off -Supported color formats: RGB 4:4:4, YCrCb 4:2:2 -First detailed timing is preferred timing -Established timings supported: -Standard timings supported: -Detailed timings -Hex of detail: a82f90e0601a1040204013004bcf10000019 -Did detailed timing -Detailed mode (IN HEX): Clock 122000 KHz, 14b mm x cf mm - 0690 06b0 06f0 0770 hborder 0 - 041a 041b 041e 042a vborder 0 - -hsync -vsync -Hex of detail: b72790e0601a1040204013004bcf10000019 -Detailed mode (IN HEX): Clock 122000 KHz, 14b mm x cf mm - 0690 06b0 06f0 0770 hborder 0 - 041a 041b 041e 042a vborder 0 - -hsync -vsync -Hex of detail: 0000000f00b30a32b30a281401004ca35033 -Manufacturer-specified data, tag 15 -Hex of detail: 000000fe004c544e31353450332d4c30320a -ASCII string: LTN154P3-L02 -Checksum -Checksum: 0x7e (valid) -WARNING: EDID block does NOT fully conform to EDID 1.3. - Missing name descriptor - Missing monitor ranges -bringing up panel at resolution 1680 x 1050 -Borders 0 x 0 -Blank 224 x 16 -Sync 64 x 3 -Front porch 32 x 1 -Spread spectrum clock -Single channel -Polarities 1, 1 -Data M1=2132104, N1=8388608 -Link frequency 270000 kHz -Link M1=236900, N1=524288 -Pixel N=9, M1=24, M2=8, P1=1 -Pixel clock 243809 kHz -waiting for panel powerup -panel powered up -@end verbatim +@item @strong{ASUS KGPE-D16 server board} @itemize @item Check notes: @xref{ASUS +KGPE-D16 motherboard}. @c @strong{@emph{hcl/kgpe-d16.html}} @item @strong{NOTE: +not in libreboot 20150518. Only in git, for now.} @end itemize -Another incompatible (T400) screen: +@item @strong{ASUS KCMA-D8 desktop/workstation board} @itemize @item Check +notes: @xref{ASUS KCMA-D8 motherboard}. @c @strong{@emph{hcl/kcma-d8.html}} +@item @strong{NOTE: not in libreboot 20150518. Only in git, for now.} @end +itemize -@verbatim -No size specified (using byte-data access) - 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef -00: XX ff ff ff ff ff ff 00 30 ae 33 40 00 00 00 00 X.......0?3@.... -10: 00 0f 01 03 80 1e 13 78 ea cd 75 91 55 4f 8b 26 .??????x??u?UO?& -20: 21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 !PT...?????????? -30: 01 01 01 01 01 01 b0 27 a0 60 51 84 2d 30 30 20 ???????'?`Q?-00 -40: 36 00 2f be 10 00 00 19 d5 1f a0 40 51 84 1a 30 6./??..????@Q??0 -50: 30 20 36 00 2f be 10 00 00 19 00 00 00 0f 00 90 0 6./??..?...?.? -60: 0a 32 90 0a 28 14 01 00 4c a3 42 44 00 00 00 fe ?2??(??.L?BD...? -70: 00 4c 54 4e 31 34 31 57 44 2d 4c 30 35 0a 00 32 .LTN141WD-L05?.2 -80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -@end verbatim +@item @strong{ThinkPad X60/X60s} @itemize @item You can also remove the +motherboard from an X61/X61s and replace it with an X60/X60s motherboard. An X60 +Tablet motherboard will also fit inside an X60/X60s. @end itemize -For comparison, here is a working display (T400 screen, but was connected to a T500. Some T500 displays also work, but no EDID available on this page yet): +@item @strong{ThinkPad X60 Tablet} (1024x768 and 1400x1050) with digitizer +support @itemize @item See @ref{Lenovo ThinkPad X60/X60s} for list of supported +LCD panels @item It is unknown whether an X61 Tablet can have it's mainboard +replaced with an X60 Tablet motherboard. @end itemize -@verbatim -EDID: -00 ff ff ff ff ff ff 00 30 ae 31 40 00 00 00 00 -00 12 01 03 80 1e 13 78 ea b3 85 95 58 53 8a 28 -25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 -01 01 01 01 01 01 26 1b 00 7d 50 20 16 30 30 20 -36 00 30 be 10 00 00 18 8b 16 00 7d 50 20 16 30 -30 20 36 00 30 be 10 00 00 18 00 00 00 0f 00 81 -0a 32 81 0a 28 14 01 00 30 e4 28 01 00 00 00 fe -00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 00 d8 -Extracted contents: -header: 00 ff ff ff ff ff ff 00 -serial number: 30 ae 31 40 00 00 00 00 00 12 -version: 01 03 -basic params: 80 1e 13 78 ea -chroma info: b3 85 95 58 53 8a 28 25 50 54 -established: 00 00 00 -standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 -descriptor 1: 26 1b 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 -descriptor 2: 8b 16 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 -descriptor 3: 00 00 00 0f 00 81 0a 32 81 0a 28 14 01 00 30 e4 28 01 -descriptor 4: 00 00 00 fe 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 -extensions: 00 -checksum: d8 - -Manufacturer: LEN Model 4031 Serial Number 0 -Made week 0 of 2008 -EDID version: 1.3 -Digital display -Maximum image size: 30 cm x 19 cm -Gamma: 220% -Check DPMS levels -DPMS levels: Standby Suspend Off -Supported color formats: RGB 4:4:4, YCrCb 4:2:2 -First detailed timing is preferred timing -Established timings supported: -Standard timings supported: -Detailed timings -Hex of detail: 261b007d502016303020360030be10000018 -Did detailed timing -Detailed mode (IN HEX): Clock 69500 KHz, 130 mm x be mm - 0500 0530 0550 057d hborder 0 - 0320 0323 0329 0336 vborder 0 - -hsync -vsync -Hex of detail: 8b16007d502016303020360030be10000018 -Detailed mode (IN HEX): Clock 69500 KHz, 130 mm x be mm - 0500 0530 0550 057d hborder 0 - 0320 0323 0329 0336 vborder 0 - -hsync -vsync -Hex of detail: 0000000f00810a32810a2814010030e42801 -Manufacturer-specified data, tag 15 -Hex of detail: 000000fe004c503134315758332d544c5231 -ASCII string: LP141WX3-TLR1 -Checksum -Checksum: 0xd8 (valid) -WARNING: EDID block does NOT fully conform to EDID 1.3. - Missing name descriptor - Missing monitor ranges -bringing up panel at resolution 1280 x 800 -Borders 0 x 0 -Blank 125 x 22 -Sync 32 x 6 -Front porch 48 x 3 -Spread spectrum clock -Single channel -Polarities 1, 1 -Data M1=1214600, N1=8388608 -Link frequency 270000 kHz -Link M1=134955, N1=524288 -Pixel N=10, M1=14, M2=11, P1=1 -Pixel clock 138857 kHz -waiting for panel powerup -panel powered up -@end verbatim +@item @strong{ThinkPad T60} (Intel GPU) (there are issues; see below): @itemize +@item See notes below for exceptions, and see @ref{Supported T60 list} for known +working LCD panels. @item It is unknown whether a T61 can have it's mainboard +replaced with a T60 motherboard. @item See +@uref{https://libreboot.org/docs/future/index.html#t60_cpu_microcode} @c +@strong{@emph{future/index.html#t60_cpu_microcode}}. @item T60P (and T60 +laptops with ATI GPU) will likely never be supported: @xref{Lenovo ThinkPad +T60}. @c @strong{@emph{hcl/index.html#t60_ati_intel}} @end itemize -Another compatible T400 screen: +@item @strong{ThinkPad X200} @itemize @item X200S and X200 Tablet are also +supported, conditionally; @pxref{X200S and X200 Tablet}. @c +@strong{@emph{hcl/x200.html#x200s}} @item @strong{ME/AMT}: libreboot removes +this, permanently. @xref{GM45 chipsets - remove the ME}. @c +@strong{@emph{hcl/gm45_remove_me.html}} @end itemize -@verbatim -trisquel@trisquel:~$ sudo i2cdump -y 2 0x50 -No size specified (using byte-data access) - 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef -00: 00 ff ff ff ff ff ff 00 30 ae 31 40 00 00 00 00 ........0?1@.... -10: 00 12 01 03 80 1e 13 78 ea b3 85 95 58 53 8a 28 .??????x????XS?( -20: 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 %PT...?????????? -30: 01 01 01 01 01 01 26 1b 00 7d 50 20 16 30 30 20 ??????&?.}P ?00 -40: 36 00 30 be 10 00 00 18 8b 16 00 7d 50 20 16 30 6.0??..???.}P ?0 -50: 30 20 36 00 30 be 10 00 00 18 00 00 00 0f 00 81 0 6.0??..?...?.? -60: 0a 32 81 0a 28 14 01 00 30 e4 28 01 00 00 00 fe ?2??(??.0?(?...? -70: 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 00 d8 .LP141WX3-TLR1.? -80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ -@end verbatim +@item @strong{ThinkPad R400} @itemize @item See @strong{@emph{hcl/r400.html}} +@item @strong{ME/AMT}: libreboot removes this, permanently. @xref{GM45 chipsets +- remove the ME}. @c @strong{@emph{hcl/gm45_remove_me.html}} @end itemize +@item @strong{ThinkPad T400} @itemize @item See @strong{@emph{hcl/t400.html}} +@item @strong{ME/AMT}: libreboot removes this, permanently. @xref{GM45 chipsets +- remove the ME}. @c @strong{@emph{hcl/gm45_remove_me.html}} @end itemize +@item @strong{ThinkPad T500} @itemize @item See @strong{@emph{hcl/t500.html}} +@item @strong{ME/AMT}: libreboot removes this, permanently. @xref{GM45 chipsets +- remove the ME}. @c @strong{@emph{hcl/gm45_remove_me.html}} @end itemize +@item @strong{Apple MacBook1@comma{}1} (MA255LL/A, MA254LL/A, MA472LL/A) +@itemize @item @xref{Apple Macbook1-1,Macbook1@comma{}1}. @c See +@strong{@emph{hcl/index.html#macbook11}}. @end itemize +@item @strong{Apple MacBook2@comma{}1} (MA699LL/A, MA701LL/A, MB061LL/A, +MA700LL/A, MB063LL/A, MB062LL/A) @itemize @item @xref{Apple +Macbook2-1,Macbook2@comma{}1}. @c See @strong{@emph{hcl/index.html#macbook21}}. +@end itemize + +@end itemize -@node Installation -@section Installing libreboot -This section relates to installing libreboot on supported targets. +@node Changes for this release relative to r20150518 @section Changes for this +release, relative to r20150518 (earliest changes last, recent changes first) +@itemize @item Changelog not yet generated. Clone the git repository and check +the git logs. @end itemize -NOTE: if running flashrom -p internal for software based flashing, and you -get an error related to /dev/mem access, you should reboot with iomem=relaxed -kernel parameter before running flashrom, or use a kernel that has -CONFIG_STRICT_DEVMEM not enabled. -@c ADD itemize block here to show subsections? +@node Table of contents @chapter Table of contents @menu -* Software methods:: -* Hardware methods:: +* Hardware compatibility:: Hardware compatibility list Installation:: +* How to install libreboot GNU/Linux distributions:: How to install +* GNU/Linux on a libreboot system Git:: How to use the +* git repository and build/maintain libreboot from source Hardware security:: +* Hardware maintenance:: Hardware maintenance Depthcharge:: +* Depthcharge payload GRUB:: GRUB payload Miscellaneous:: @end menu -@node Software methods -@subsection Software methods +@c @c NOTE: this is one way of structuring the file I tried @c @ignore @include +include/hardware-compatibility.texi @include include/installation.texi +@include include/installing-gnu-linux.texi @include include/git.texi +@include include/security.texi @include +include/hardware-maintenance.texi @include include/depthcharge-payload.texi +@include include/grub-payload.texi @include include/misc.texi @end +ignore +@node Hardware compatibility @section Hardware compatibility This section +relates to known hardware compatibility in libreboot. @menu -* List of ROM images in libreboot:: Pre-compiled images for user convenience -* QEMU:: ROM images for QEMU -* How to update/install:: If you are already running libreboot or coreboot -* ThinkPad X60/T60 install:: Initial installation guide if running proprietary firmware -* MacBook2-1 install:: Initial installation guide if running proprietary firmware -* ASUS Chromebook C201 install:: Installing Libreboot internally, from the device +* List of supported hardware:: Recommended wifi chipsets:: GM45 chipsets - +* remove the ME:: LCD compatibility on GM45 laptops:: @end menu -@c QUESTION: Should the device-specific instructions be moved to their own nodes on this level? - - -@node List of ROM images in libreboot -@subsubsection List of ROM images in libreboot -Libreboot distributes pre-compiled ROM images, built from the libreboot source code. These images are provided for user convenience, so that they don't have to build anything from source on their own. - -The ROM images in each archive use the following at the end of the file name, if they are built with the GRUB payload: @strong{_@emph{keymap}_@emph{mode}.rom} -Available @emph{modes}: @strong{vesafb} or @strong{txtmode}. The @emph{vesafb} ROM images are recommended, in most cases; @emph{txtmode} ROM images come with MemTest86+, which requires text-mode instead of the usual framebuffer used by coreboot native graphics initialization. +@node List of supported hardware @subsection List of supported hardware +Libreboot supports the following systems in this release: @itemize @bullet -@emph{keymap} can be one of several keymaps that keyboard supports (there are quite a few), which affects the keyboard layout configuration that is used in GRUB. It doesn't matter which ROM image you choose here, as far as the keymap in GNU/Linux is concerned. +@item Desktops (AMD, Intel x86) @itemize @minus @item Gigabyte GA-G41M-ES2L +motherboard @c (@xref{Gigabyte GA-G41M-ES2L motherboard}) @item Intel D510MO +motherboard @c (@xref{Intel D510MO motherboard}) @item ASUS KCMA-D8 motherboard +@c (@xref{ASUS KCMA-D8 motherboard}) @end itemize -Keymaps are named appropriately according to each keyboard layout support in GRUB. To learn how these keymaps are created, see @ref{GRUB keyboard layouts - for reference,grub_keyboard}. +@item Servers/workstations (AMD, x86) @itemize @minus @item ASUS KFSN4-DRE +motherboard @c (@xref{ASUS KFSN4-DRE motherboard}) @item ASUS KGPE-D16 +motherboard @c (@xref{ASUS KGPE-D16 motherboard}) @end itemize -@node QEMU -@subsubsection ROM images for QEMU -Libreboot comes with ROM images built for QEMU, by default: +@item Laptops (ARM) @itemize @minus @item ASUS Chromebook C201 @c (@xref{ASUS +Chromebook C201}) @end itemize -Examples of how to use libreboot ROM images in QEMU: +@item Laptops (Intel x86) @itemize @minus @item Lenovo ThinkPad X60/X60s @c +(@xref{Lenovo ThinkPad X60/X60s}) @item Lenovo ThinkPad X60 Tablet @c +(@xref{Lenovo ThinkPad X60 Tablet}) @item Lenovo ThinkPad T60 @c (@xref{Lenovo +ThinkPad T60}) @item Lenovo ThinkPad X200 @c (@xref{Lenovo ThinkPad X200}) @item +Lenovo ThinkPad R400 @c (@xref{Lenovo ThinkPad R400}) @item Lenovo ThinkPad T400 +@c (@xref{Lenovo ThinkPad T400}) @item Lenovo ThinkPad T500 @c (@xref{Lenovo +ThinkPad T500}) @item Apple MacBook1,1 @c (@xref{Apple MacBook1,1}) @item Apple +MacBook2,1 @c (@xref{Apple MacBook2,1}) @end itemize -@itemize -@item -$ @strong{qemu-system-i386 -M q35 -m 512 -bios qemu_q35_ich9_keymap_mode.rom} -@item -$ @strong{qemu-system-i386 -M pc -m 512 -bios qemu_i440fx_piix4_keymap_mode.rom} @end itemize -You can optionally specify the @strong{-serial stdio} argument, so that QEMU will emulate a serial terminal on the standard input/output (most likely your terminal emulator or TTY). +`Supported' means that the build scripts know how to build ROM images for these +systems, and that the systems have been tested (confirmed working). There may be +exceptions; in other words, this is a list of `officially' supported systems. -Other arguments are available for QEMU. The manual will contain more information. +It is also possible to build ROM images (from source) for other systems (and +virtual systems, e.g. QEMU). -@node How to update/install -@subsubsection How to update or install libreboot (if you are already running libreboot or coreboot) - -On all current targets, updating libreboot can be accomplished without disassembly and, therefore, without having to externally re-flash using any dedicated hardware. In other words, you can do everything entirely in software, directly from the OS that is running on your libreboot system. - -@strong{If you are using libreboot_src or git, then make sure that you built the sources first (see @ref{How to build the ROM images,build}).} - -Look at the @ref{List of ROM images in libreboot,list of ROM images} to see which image is compatible with your device. @menu -* Are you currently running the original proprietary firmware?:: -* ASUS KFSN4-DRE?:: -* ASUS KGPE-D16?:: -* ASUS KCMA-D8?:: -* Are you currently running libreboot or coreboot?:: -* MAC address on GM45 X200/R400/T400/T500:: -* Flash chip size:: -* All good?:: +* Gigabyte GA-G41M-ES2L motherboard:: Intel D510MO motherboard:: ASUS KCMA-D8 +* motherboard:: ASUS KFSN4-DRE motherboard:: ASUS KGPE-D16 motherboard:: ASUS +* Chromebook C201:: Lenovo ThinkPad X60/X60s:: Lenovo ThinkPad X60 Tablet:: +* Lenovo ThinkPad T60:: Lenovo ThinkPad X200:: Lenovo ThinkPad R400:: Lenovo +* ThinkPad T400:: Lenovo ThinkPad T500:: Apple Macbook1-1:: @c commas cannot be +* used in node names Apple Macbook2-1:: @end menu -@node Are you currently running the original proprietary firmware? -@c @subsubheading Are you currently running the original, proprietary firmware? -If you are currently running the proprietary firmware (not libreboot or coreboot), then the flashing instructions for your system are going to be different. - -X60/T60 users running the proprietary firmware should refer to @ref{ThinkPad X60/T60 install,flashrom_lenovobios}. MacBook2,1 users running Apple EFI should refer to @ref{MacBook2-1 install,flashrom_macbook21}. - -X200 users, refer to @ref{ThinkPad X200/X200S/X200T,x200_external}, R400 users refer to @ref{ThinkPad R400,r400_external}, T400 users refer to @ref{ThinkPad T400,t400_external}, T500 users refer to @ref{ThinkPad T500,t500_external}. - -@node ASUS KFSN4-DRE? -@c @subsubheading ASUS KFSN4-DRE? -Internal flashing should work just fine, even if you are currently booting the proprietary firmware. - -Libreboot currently lacks documentation for externally re-flashing an LPC flash chip. However, these boards have the flash chip inside of a PLCC socket, and it is possible to hot-swap the chips. If you want to back up your known-working image, simply hot-swap the chip for one that is the same capacity, after having dumped a copy of the current firmware (flashrom -p internal -r yourchosenname.rom), and then flash that chip with the known-working image. Check whether the system still boots, and if it does, then it should be safe to flash the new image (because you now have a backup of the old image). - -Keeping at least one spare LPC PLCC chip with working firmware on it is highly recommended, in case of bricks. -@strong{DO NOT hot-swap the chip with your bare hands. Use a PLCC chip extractor. These can be found online. See @uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} -Do check the HCL entry: @ref{ASUS KFSN4-DRE motherboard,kfsn4-dre-hcl}. - -@node ASUS KGPE-D16? -@c @subsubheading ASUS KGPE-D16? -If you have the proprietary BIOS, you need to flash libreboot externally. See @ref{KGPE-D16,kgpe-d16}. +@node Gigabyte GA-G41M-ES2L motherboard @subsubsection Gigabyte GA-G41M-ES2L +motherboard This is a desktop board using intel hardware (circa ~2009, ICH7 +southbridge, similar performance-wise to the Libreboot X200. It can make for +quite a nifty desktop. Powered by libreboot. -If you already have coreboot or libreboot installed, without write protection on the flash chip, then you can do it in software (otherwise, see link above). +IDE on the board is untested, but it might be possible to use a SATA HDD using +an IDE SATA adapter. The SATA ports do work. -@strong{DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip extractor. These can be found online. See @uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} - -Do check the HCL entry: @ref{ASUS KGPE-D16 motherboard,kgpe-d16-hcl}. +Read this post on the libreboot mailing list for more information: +@uref{https://lists.nongnu.org/archive/html/libreboot-dev/2015-12/msg00011.html,https://lists.nongnu.org/archive/html/libreboot-dev/2015-12/msg00011.html} -@node ASUS KCMA-D8? -@c @subsubheading ASUS KCMA-D8? -If you have the proprietary BIOS, you need to flash libreboot externally. See @ref{KCMA-D8,kcma-d8}. +@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in +libreboot, for now, you must build for it from source using the libreboot git +repository.} -If you already have coreboot or libreboot installed, without write protection on the flash chip, then you can do it in software (otherwise, see link above). +NOTE: the onboard NIC does not work when libreboot is installed. This is being +investigated by damo22 in the libreboot IRC channel. -@strong{DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip extractor. These can be found online. See @uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} +Flashing instructions can be found at @ref{How to update/install,flashrom}. -Do check the HCL entry: @ref{ASUS KCMA-D8 motherboard,kcma-d8-hcl} -@node Are you currently running libreboot or coreboot? -@c @subsubheading Are you currently running libreboot (or coreboot)? -X60/T60 users should be fine with this guide. If you write-protected the flash chip, please refer to @ref{ThinkPad X60 Recovery Guide,x60_unbrick}, @ref{ThinkPad X60 Tablet Recovery Guide,x60tablet_unbrick} or @ref{ThinkPad T60 Recovery Guide,t60_unbrick}. @emph{This probably does not apply to you. Most people do not write-protect the flash chip, so you probably didn't either.} +@node Intel D510MO motherboard @subsubsection Intel D510MO motherboard This is a +desktop board using intel hardware. It can make for quite a nifty desktop. +Powered by libreboot. -Similarly, it is possible to write-protect the flash chip in coreboot or libreboot on GM45 laptops (X200/R400/T400/T500). If you did this, then you will need to use the links above for flashing, treating your laptop as though it currently has the proprietary firmware (because write-protected SPI flash requires external re-flashing, as is also the case when running the proprietary firmware). +@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in +libreboot, for now, you must build for it from source using the libreboot git +repository.} -If you did not write-protect the flash chip, or it came to you without any write-protection (@strong{@emph{libreboot does not write-protect the flash chip by default, so this probably applies to you}}), read on! +NOTE: video framebuffer currently unsupported, only text-mode works, even when +booting GNU/Linux. This can still be used for building a headlesss server. Boot +with fb=false -@node MAC address on GM45 X200/R400/T400/T500 -@c @subsubheading MAC address on GM45 (X200/R400/T400/T500) -@strong{Users of the X200/R400/T400/T500 take note:} The MAC address for the onboard ethernet chipset is located inside the flash chip. Libreboot ROM images for these laptops contain a generic MAC address by default (00:F5:F0:40:71:FE), but this is not what you want. @emph{Make sure to change the MAC address inside the ROM image, before flashing it. The instructions on @ref{ICH9 gen utility,ich9gen} show how to do this.} +Flashing instructions can be found at @ref{Flashing Intel D510MO}. -It is important that you change the default MAC address, before flashing. It will be printed on a sticker at the bottom of the laptop, or it will be printed on a sticker next to or underneath the RAM. Alternatively, and assuming that your current firmware has the correct MAC address in it, you can get it from your OS. -@node Flash chip size -@c @subsubheading Flash chip size -Use this to find out:@* # @strong{dmidecode | grep ROM\ Size} -@node All good? -@c @subsubheading All good? -Excellent! Moving on... +@node ASUS KCMA-D8 motherboard @subsubsection ASUS KCMA-D8 motherboard This is a +desktop board using AMD hardware (Fam10h @strong{and Fam15h} CPUs available). It +can also be used for building a high-powered workstation. Powered by libreboot. +The coreboot port was done by Timothy Pearson of +@uref{https://raptorengineeringinc.com/,Raptor Engineering Inc.} and, working +with Timothy (and sponsoring the work) merged into libreboot. -Download the @emph{libreboot_util.tar.xz} archive, and extract it. Inside, you will find a directory called @emph{flashrom}. This contains statically compiled executable files of the @emph{flashrom} utility, which you will use to re-flash your libreboot system. +@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in +libreboot, for now, you must build for it from source using the libreboot git +repository.} -Simply use @emph{cd} on your terminal, to switch to the @emph{libreboot_util} directory. Inside, there is a script called @emph{flash}, which will detect what CPU architecture you have (e.g. i686, x86_64) and use the appropriate executable. It is also possible for you to build these executables from the libreboot source code archives. +@strong{Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules..} -How to update the flash chip contents:@* $ @strong{sudo ./flash update @ref{List of ROM images in libreboot,yourrom.rom}} +Flashing instructions can be found at @ref{How to update/install,flashrom} - +note that external flashing is required (e.g. BBB), if the proprietary (ASUS) +firmware is currently installed. If you already have libreboot, by default it is +possible to re-flash using software running in GNU/Linux on the kcma-d8, without +using external hardware. -Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but you are sure that you chose the correct ROM image, then run this alternative command:@* $ @strong{sudo ./flash forceupdate @ref{List of ROM images in libreboot,yourrom.rom}} +@itemize -You should see @strong{"Verifying flash... VERIFIED."} written at the end of the flashrom output. @strong{Shut down} after you see this, and then boot up again after a few seconds. +@item CPU compatibility @itemize @item @strong{Use Opteron 4200 series (works +without microcode updates, including hw virt).} 4300 series needs microcode +updates, so avoid those CPUs. 4100 series is too old, and mostly untested. @end +itemize +@item Board status compatibility @itemize @item See +@uref{https://raptorengineeringinc.com/coreboot/kcma-d8-status.php,https://raptorengineeringinc.com/coreboot/kcma-d8-status.php}. +@end itemize -@node ThinkPad X60/T60 install -@subsubsection ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware) -@strong{This is for the ThinkPad X60 and T60 while running Lenovo BIOS. If you already have coreboot or libreboot running, then go to @ref{How to update/install,flashrom} instead!} +@item Form factor @itemize @item These boards use the SSI EEB 3.61 form factor; +make sure that your case supports this. This form factor is similar to E-ATX in +that the size is identical, but the position of the screws are different. @end +itemize -@strong{If you are flashing a Lenovo ThinkPad T60, be sure to read @ref{Supported T60 list,supported_t60_list}} +@item IPMI iKVM module add-on @itemize @item Don't use it. It uses proprietary +firmware and adds a backdoor (remote out-of-band management chip, similar to the +@uref{http://libreboot.org/faq/#intelme,Intel Management Engine}. Fortunately, +the firmware is unsigned (possibly to replace) and physically separate from the +mainboard since it's on the add-on module, which you don't have to install. +@end itemize -@strong{If you are using libreboot_src or git, then make sure that you built the sources first (see @ref{How to build the ROM images,build}).} +@item Flash chips @itemize @item 2MiB flash chips are included by default, on +these boards. It's on a P-DIP 8 slot (SPI chip). The flash chip can be upgraded +to higher sizes: 4MiB, 8MiB or 16MiB. With at least 8MiB, you could feasibly fit +a compressed linux+initramfs image (BusyBox+Linux system) into CBFS and boot +that, loading it into memory. @item Libreboot has configs for 2, 4, 8 and 16 +MiB flash chip sizes (default flash chip is 2MiB). @item @strong{DO NOT +hot-swap the chip with your bare hands. Use a P-DIP 8 chip extractor. These can +be found online. See +@uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} +@end itemize -@strong{Warning: this guide will not instruct the user how to backup the original Lenovo BIOS firmware. These backups are tied to each system, and will not work on any other. For that, please refer to @uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}.} +@item Native graphics initialization @anchor{native-graphics-kcma-d8} @itemize +@item Only text-mode is known to work, but linux(kernel) can initialize the +framebuffer display (if it has KMS - kernel mode setting). @end itemize -@strong{If you're using libreboot 20150518, note that there is a mistake in the flashing script. do this: @emph{rm -f patch && wget -O flash http://git.savannah.gnu.org/cgit/libreboot.git/plain/flash?id=910b212e90c6f9c57025e1c7b0c08897af787496 && chmod +x flash}} +@item Current issues @itemize @item LRDIMM memory modules are currently +incompatible @item SAS (via PIKE 2008 module) requires non-free option ROM (and +SeaBIOS) to boot from it (theoretically possible to replace, but you can put a +kernel in CBFS or on SATA and use that to boot GNU, which can be on a SAS drive. +The linux kernel can use those SAS drives (via PIKE module) without an option +ROM). @item IPMI iKVM module (optional add-on card) uses proprietary firmware. +Since it's for remote out-of-band management, it's theoretically a backdoor +similar to the Intel Management Engine. Fortunately, unlike the ME, this +firmware is unsigned which means that a free replacement is theoretically +possible. For now, the libreboot project recommends not installing the module. +@uref{https://github.com/facebook/openbmc,This project} might be interesting to +derive from, for those who want to work on a free replacement. In practise, +out-of-band management isn't very useful anyway (or at the very least, it's not +a major inconvenience to not have it). @item Graphics: only text-mode works. +See @ref{native-graphics-kcma-d8,graphics}. @end itemize -The first half of the procedure is as follows:@* $ @strong{sudo ./flash i945lenovo_firstflash @ref{List of ROM images in libreboot,yourrom.rom}.} +@item Hardware specifications @itemize @item Check ASUS website for specs -You should see within the output the following:@* @strong{"Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are swapped"}. +@end itemize @end itemize -You should also see within the output the following:@* @strong{"Your flash chip is in an unknown state"}, @strong{"FAILED"} and @strong{"DO NOT REBOOT OR POWEROFF"}@* Seeing this means that the operation was a @strong{resounding} success! @strong{DON'T PANIC}. -See this link for more details: @uref{http://thread.gmane.org/gmane.linux.bios.flashrom/575,http://thread.gmane.org/gmane.linux.bios.flashrom/575}. +@node ASUS KFSN4-DRE motherboard @subsubsection ASUS KFSN4-DRE motherboard This +is a server board using AMD hardware (Fam10h). It can also be used for building +a high-powered workstation. Powered by libreboot. -If the above is what you see, then @strong{SHUT DOWN}. Wait a few seconds, and then boot; libreboot is running, but there is a 2nd procedure @strong{*needed*} (see below). +@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in +libreboot, for now, you must build for it from source using the libreboot git +repository.} -When you have booted up again, you must also do this:@* $ @strong{sudo ./flash i945lenovo_secondflash @ref{List of ROM images in libreboot,yourrom.rom}} +Flashing instructions can be found at @ref{How to update/install,flashrom}. -If flashing fails at this stage, try the following:@* $ @strong{sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w @ref{List of ROM images in libreboot,yourrom.rom}} +@itemize -You should see within the output the following:@* @strong{"Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is untranslated"} +@item Form factor @itemize @item These boards use the SSI EEB 3.61 form factor; +make sure that your case supports this. This form factor is similar to E-ATX in +that the size is identical, but the position of the screws are different. @end +itemize -You should also see within the output the following:@* @strong{"Verifying flash... VERIFIED."} +@item Flash chips @itemize @item These boards use LPC flash (not SPI), in a PLCC +socket. The default flash size 1MiB (8Mbits), and can be upgraded to 2MiB +(16Mbits). SST49LF080A is the default that the board uses. SST49LF016C is an +example of a 2MiB (16Mbits) chip, which might work. It is believed that 2MiB +(16Mbits) is the maximum size available for the flash chip. @item @strong{DO +NOT hot-swap the chip with your bare hands. Use a PLCC chip extractor. These can +be found online. See +@uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} +@end itemize +@item Native graphics initialization @itemize @item Native graphics +initialization exists (XGI Z9s) for this board. Framebuffer- and text-mode both +work. A serial port is also available. @end itemize -@node MacBook2-1 install -@subsubsection MacBook2,1: Initial installation guide (if running the proprietary firmware) -@strong{If you have a MacBook1,1, refer to @ref{Apple Macbook1-1,macbook1-1} for flashing instructions.} +@item Memory @itemize @item DDR2 533/667 Registered ECC. 16 slots. Total +capacity up to 64GiB. @end itemize -@strong{This is for the MacBook2,1 while running Apple EFI firmware. If you already have coreboot or libreboot running, then go to @ref{How to update/install,flashrom} instead!} +@item Hex-core CPUs @itemize @item PCB revision 1.05G is the best version of +this board (the revision number will be printed on the board), because it can +use dual hex-core CPUs (Opteron 2400/8400 series). Other revisions are believed +to only support dual quad-core CPUs. @end itemize -Be sure to read the information in @ref{Apple Macbook2-1,macbook2-1}. +@item Current issues @itemize @item There seems to be a 30 second bootblock +delay (observed by tpearson); the system otherwise boots and works as expected. +See @uref{../resources/text/kfsn4-dre/bootlog.txt,kfsn4-dre/bootlog.txt} - this +uses the 'simple' bootblock, while tpearson uses the 'normal' bootblock, which +tpearson suspects may be a possible cause. This person says that they will look +into it. +@uref{http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asus/kfsn4-dre/4.0-10101-g039edeb/2015-06-27T03:59:16Z/config.txt;h=4742905c185a93fbda8eb14322dd82c70641aef0;hb=055f5df4e000a97453dfad6c91c2d06ea22b8545,This +config} doesn't have the issue. @item Text-mode is a bit jittery (but still +usable). (the jitter disappears if using KMS, once the kernel starts. The jitter +will remain, if booting the kernel in text-mode). @end itemize -@strong{Warning: this guide will not instruct the user how to backup the original Apple EFI firmware. For that, please refer to @uref{http://www.coreboot.org/Board:apple/macbook21,http://www.coreboot.org/Board:apple/macbook21}.} +@item Other information @itemize @item +@uref{ftp://ftp.sgi.com/public/Technical%20Support/Pdf%20files/Asus/kfsn4-dre.pdf,specifications} +@end itemize -@strong{If you are using libreboot_src or git, then make sure that you built the sources first (see @ref{How to build the ROM images,build}).} +@end itemize -Look at the @ref{List of ROM images in libreboot,list of ROM images} to see which image is compatible with your device. +@node ASUS KGPE-D16 motherboard @c TODO: Nodes? @subsubsection ASUS KGPE-D16 +server/workstation board This is a server board using AMD hardware (Fam10h +@strong{and Fam15h} CPUs available). It can also be used for building a +high-powered workstation. Powered by libreboot. The coreboot port was done by +Timothy Pearson of @uref{https://raptorengineeringinc.com/,Raptor Engineering +Inc.} and, working with Timothy (and sponsoring the work) merged into libreboot. + +@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in +libreboot, for now, you must build for it from source using the libreboot git +repository.} + +@strong{Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules..} + +Flashing instructions can be found at @ref{How to update/install,flashrom} - +note that external flashing is required (e.g. BBB), if the proprietary (ASUS) +firmware is currently installed. If you already have libreboot, by default it is +possible to re-flash using software running in GNU/Linux on the KGPE-D16, +without using external hardware. + +@itemize + +@item CPU compatibility @itemize @minus @item @strong{Use Opteron 6200 series +(works without microcode updates, including hw virt).} 6300 series needs +microcode updates, so avoid those CPUs. 6100 series is too old, and mostly +untested. @end itemize + +@item Board status compatibility @itemize @minus @item See +@uref{https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php,https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php}. +@end itemize + +@item Form factor @itemize @minus @item These boards use the SSI EEB 3.61 form +factor; make sure that your case supports this. This form factor is similar to +E-ATX in that the size is identical, but the position of the screws are +different. @end itemize + +@item IPMI iKVM module add-on @itemize @minus @item Don't use it. It uses +proprietary firmware and adds a backdoor (remote out-of-band management chip, +similar to the @uref{http://libreboot.org/faq/#intelme,Intel Management Engine}. +Fortunately, the firmware is unsigned (possibly to replace) and physically +separate from the mainboard since it's on the add-on module, which you don't +have to install. @end itemize + +@item Flash chips @itemize @minus @item 2MiB flash chips are included by +default, on these boards. It's on a P-DIP 8 slot (SPI chip). The flash chip can +be upgraded to higher sizes: 4MiB, 8MiB or 16MiB. With at least 8MiB, you could +feasibly fit a compressed linux+initramfs image (BusyBox+Linux system) into CBFS +and boot that, loading it into memory. @item Libreboot has configs for 2, 4, 8 +and 16 MiB flash chip sizes (default flash chip is 2MiB). @item @strong{DO NOT +hot-swap the chip with your bare hands. Use a P-DIP 8 chip extractor. These can +be found online. See +@uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} +@end itemize + +@item Native graphics initialization @anchor{native-graphics-kgpe-d16} @itemize +@minus @item Only text-mode is known to work, but linux(kernel) can initialize +the framebuffer display (if it has KMS - kernel mode setting). @end itemize + +@item Current issues @itemize @minus @item LRDIMM memory modules are currently +incompatible @item SAS (via PIKE 2008 module) requires non-free option ROM (and +SeaBIOS) to boot from it (theoretically possible to replace, but you can put a +kernel in CBFS or on SATA and use that to boot GNU, which can be on a SAS drive. +The linux kernel can use those SAS drives (via PIKE module) without an option +ROM). @item IPMI iKVM module (optional add-on card) uses proprietary firmware. +Since it's for remote out-of-band management, it's theoretically a backdoor +similar to the Intel Management Engine. Fortunately, unlike the ME, this +firmware is unsigned which means that a free replacement is theoretically +possible. For now, the libreboot project recommends not installing the module. +@uref{https://github.com/facebook/openbmc,This project} might be interesting to +derive from, for those who want to work on a free replacement. In practise, +out-of-band management isn't very useful anyway (or at the very least, it's not +a major inconvenience to not have it). @item Graphics: only text-mode works. +See @ref{native-graphics-kgpe-d16,graphics}. @c @ref{#graphics,#graphics} @end +itemize + +@end itemize @menu +* ASUS KGPE-D16 Hardware specifications:: +@end menu -Use this flashing script, to install libreboot:@* $ @strong{sudo ./flash i945apple_firstflash @ref{List of ROM images in libreboot,yourrom.rom}} -You should also see within the output the following:@* @strong{"Verifying flash... VERIFIED."} +@node ASUS KGPE-D16 Hardware specifications @c @subsubheading ASUS KGPE-D16 +Hardware specifications @itemize -Shut down. +@item Processor / system bus @itemize @item 2 CPU sockets (G34 compatible) @item +HyperTransport(TM) Technology 3.0 @c FIX FIX FIX -- TM @item CPUs supported: +@itemize @item AMD Opteron 6100 series (Fam10h. No IOMMU support. @strong{Not} +recommended - old. View errata datasheet here: +@uref{http://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf,http://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf}) +@item AMD Opteron 6200 series (bulldozer cores) (Fam15h, with full IOMMU support +in libreboot. @strong{highly recommended - fast, and works well without +microcode updates, including virtualization}) @item AMD Opteron 6300 series +(piledriver cores) (Fam15h, with full IOMMU support in libreboot. @strong{AVOID +LIKE THE PLAGUE - virtualization is broken without microcode updates} @item +NOTE: 6300 series CPUs have buggy microcode built-in, and libreboot recommends +avoiding the updates. The 6200 series CPUs have more reliable microcode. Look +at this errata datasheet: +@uref{http://support.amd.com/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf,http://support.amd.com/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf} +(see Errata 734 - this is what kills the 6300 series) @end itemize +@item 6.4 GT/s per link (triple link) @end itemize -@node ASUS Chromebook C201 install -@subsubsection ASUS Chromebook C201 installation guide +@item Core logic @itemize @item AMD SR5690 @item AMD SP5100 @end itemize -These instructions are for installing Libreboot to the ASUS Chromebook C201. Since the device ships with Coreboot, the installation instructions are the same before and after flashing Libreboot for the first time. +@item Memory compatibility with libreboot @itemize @item @strong{Total Slots:} +16 (4-channel per CPU, 8 DIMM per CPU), ECC @item @strong{Capacity:} Maximum up +to 256GB RDIMM @item @strong{Memory Type that is compatible:} @itemize @item +DDR3 1600/1333/1066/800 UDIMM* @item DDR3 1600/1333/1066/800 RDIMM* @end itemize -@strong{DO NOT BUY THIS LAPTOP YET!!!!!!!!!!! This is intended mainly for developers at the moment (libreboot developers, and developers of libre GNU/Linux distributions). This laptop currently has @emph{zero} support from libre distros. Parabola theoretically supports it, by installing Arch first and then migrating to Parabola using the migration guide on the Parabola wiki, but it's not very well tested and does not have many packages - in our opinion, Parabola does not really support this laptop. There are also several issues. Read @ref{ASUS Chromebook C201,this page} for more information. This laptop can still be used reasonably, in freedom, but it requires a lot of work. Most users will be disappointed.} +@item @strong{Compatible sizes per memory module:} @itemize @item 16GB, 8GB, +4GB, 3GB, 2GB, 1GB RDIMM @item 8GB, 4GB, 2GB, 1GB UDIMM @end itemize -@strong{If you are using libreboot_src or git, then make sure that you built the sources first (see @ref{How to build the ROM images,build}).} +@end itemize -Look at the @ref{List of ROM images in libreboot,list of ROM images} to see which image is compatible with your device. +@item Expansion slots @itemize @item @strong{Total slot:} 6 @item @strong{Slot +Location 1:} PCI 32bit/33MHz @item @strong{Slot Location 2:} PCI-E x16 (Gen2 X8 +Link) @item @strong{Slot Location 3:} PCI-E x16 (Gen2 X16 Link), Auto switch to +x8 link if slot 2 is occupied @item @strong{Slot Location 4:} PCI-E x8 (Gen2 X4 +Link) @item @strong{Slot Location 5:} PCI-E x16 (Gen2 X16 Link) @item +@strong{Slot Location 6:} PCI-E x16 (Gen2 X16 Link), Auto turn off if slot 5 is +occupied, For 1U FH/FL Card, MIO supported @item @strong{Additional Slot 1:} +PIKE slot (for SAS drives. See notes above) @item Follow SSI Location# @end +itemize -Libreboot can be installed internally from the device, with sufficient privileges. The installation process requires using @strong{Google's modified version of flashrom}, that has support for reflashing the Chromebook's SPI flash. Otherwise, flashing externally will work with the upstream flashrom version. +@item Form factor @itemize @item SSI EEB 3.61 (12"x13") @end itemize -@strong{Google's modified version of flashrom} is free software and its source code is made available by Google: @uref{https://chromium.googlesource.com/chromiumos/third_party/flashrom/,flashrom}.@* It is not distributed along with Libreboot yet. However, it is preinstalled on the device, with ChromeOS. +@item ASUS features @itemize @item Fan Speed Control @item Rack Ready (Rack and +Pedestal dual use) @end itemize -Installing Libreboot internally requires sufficient privileges on the system installed on the device.@* When the device has ChromeOS installed (as it does initially), it is necessary to gain root privileges in ChromeOS, to be able to access a root shell. +@item Storage @itemize @item @strong{SATA controller:} @itemize @item AMD SP5100 +@item 6 x SATA2 300MB/s @end itemize -@menu -* Gaining root privileges on ChromeOS:: -* Preparing the device for the installation:: -* Installing Libreboot to the SPI flash:: -@end menu +@item @strong{SAS/SATA Controller:} @itemize @item ASUS PIKE2008 3Gbps 8-port +SAS card included @end itemize +@end itemize -@node Gaining root privileges on ChromeOS -@c @subsubheading Gaining root privileges on ChromeOS +@item Networking @itemize @item 2 x Intel@registeredsymbol{} 82574L + 1 x Mgmt +LAN @end itemize -In order to gain root privileges on ChromeOS, developer mode has to be enabled from the recovery mode screen and debugging features have to be enabled in ChromeOS. +@item Graphics @itemize @item Aspeed AST2050 with 8MB VRAM @end itemize -Instructions to access the @ref{Recovery mode screen,recovery mode screen} and @ref{Enabling developer mode,enabling developer mode} are available on the page dedicated to @ref{Depthcharge,depthcharge}. +@item On board I/O @itemize @item 1 x PSU Power Connector (24-pin SSI power +connector + 8-pin SSI 12V + 8-pin SSI 12V power connector) @item 1 x Management +Connector , Onboard socket for management card @item 3 x USB pin header , Up to +6 Devices @item 1 x Internal A Type USB Port @item 8 x Fan Header , 4pin +(3pin/4pin fan dual support) @item 2 x SMBus @item 1 x Serial Port Header @item +1 x TPM header @item 1 x PS/2 KB/MS port @end itemize -Once developer mode is enabled, the device will boot to the @ref{Developer mode screen,developer mode screen}. ChromeOS can be booted by waiting for 30 seconds (the delay is shortened in Libreboot) or by pressing @strong{Ctrl + D} +@item Back I/O ports @itemize @item 1 x External Serial Port @item 2 x External +USB Port @item 1 x VGA Port @item 2 x RJ-45 @item 1 x PS/2 KB/Mouse @end itemize -After the system has booted, root access can be enabled by clicking on the @strong{Enable debugging features} link. A confirmation dialog will ask whether to proceed.@* After confirming by clicking @strong{Proceed}, the device will reboot and ask for the root password to set. Finally, the operation has to be confirmed by clicking @strong{Enable}. +@item Environment @itemize @item @strong{Operation temperature:} 10C ~ 35C @item +@strong{Non operation temperature:} -40C ~ 70C @item @strong{Non operation +humidity:} 20% ~ 90% ( Non condensing) @end itemize -After setting the root password, it becomes possible to log-in as root. A tty prompt can be obtained by pressing @strong{Ctrl + Alt + Next}. The @strong{Next} key is the one on the top left of the keyboard. +@item Monitoring @itemize @item CPU temperatures @item Fan speed (RPM) @end +itemize -@node Preparing the device for the installation -@c @subsubheading Preparing the device for the installation -Before installing Libreboot on the device, both its software and hardware has to be prepared to allow the installation procedure and to ensure that security features don't get in the way. +@item Note @itemize @item DDR3 1600 can only be supported with AMD Opteron +6300/6200 series processor @end itemize -@menu -* Configuring verified boot parameters:: -* Removing the write protect screw:: -@end menu +@end itemize -@node Configuring verified boot parameters -@c @subsubheading Configuring verified boot parameters -It is recommended to have access to the @ref{Developer mode screen,developer mode screen} and to @ref{Configuring verified boot parameters for depthcharge,configure the following verified boot parameters}: -@itemize -@item -Kernels signature verification: @emph{disabled} -@item -External media boot: @emph{enabled} -@end itemize +@node ASUS Chromebook C201 @subsubsection ASUS Chromebook C201 @strong{DO NOT +BUY THIS LAPTOP YET!!!!!!!!!!! This is intended mainly for developers at the +moment (libreboot developers, and developers of libre GNU/Linux distributions). +This laptop currently has @emph{zero} support from libre distros. Parabola +theoretically supports it, by installing Arch first and then migrating to +Parabola using the migration guide on the Parabola wiki, but it's not very well +tested and does not have many packages --- in our opinion, Parabola does not +really support this laptop. There are also several issues. Read this page for +more information. This laptop can still be used reasonably, in freedom, but it +requires a lot of work. Most users will be disappointed.} -Those changes can be reverted later, when the device is known to be in a working state. +This is a Chromebook, using the Rockchip RK3288 SoC. It uses an ARM CPU, and has +free EC firmware (unlike some other laptops). More RK3288-based laptops will be +added to libreboot at a later date. -@node Removing the write protect screw -@c @subsubheading Removing the write protect screw -Since part of the SPI flash is write-protected by a screw, it is necessary to remove the screw to remove the write protection and allow writing Libreboot to the @emph{read-only} part of the flash. +Paul Kocialkowski, a @uref{http://www.replicant.us/,Replicant} developer, ported +this laptop to libreboot. Thank you, Paul! -To access the screw, the device has to be opened. There are 8 screws to remove from the bottom of the device, as shown on the picture below. Two are hidden under the top pads. After removing the screws, the keyboard plastic part can be carefully detached from the rest. @strong{Beware: there are cables attached to it!} It is advised to flip the keyboard plastic part over, as shown on the picture below. The write protect screw is located next to the SPI flash chip, circled in red in the picture below. It has to be removed. +@strong{NOTE: This board is unsupported in libreboot 20150518. To use it in +libreboot, for now, you must build for it from source using the libreboot git +repository. Note that we recommend building for it from an x86 host, until +libreboot's build system is modified accordingly.} -@uref{../resources/images/c201/screws.jpg,@image{../resources/images/c201/screws,,,Screws,jpg}} @uref{../resources/images/c201/wp-screw.jpg,@image{../resources/images/c201/wp-screw,,,WP screw,jpg}} +@strong{More info will be added later, including build/installation +instructions. The board is supported in libreboot, however, and has been +confirmed to work.} -The write protect screw can be put back in place later, when the device is known to be in a working state. +Flashing instructions can be found at @ref{How to update/install,flashrom}. -@node Installing Libreboot to the SPI flash -@c @subsubheading Installing Libreboot to the SPI flash -The SPI flash (that holds Libreboot) is divided into various partitions that are used to implement parts of the CrOS security system. Libreboot is installed in the @emph{read-only} coreboot partition, that becomes writable after removing the write-protect screw. @menu -* Installing Libreboot internally from the device:: -* Installing Libreboot externally with a SPI flash programmer:: +* Intent:: Google's intent with CrOS devices Considerations:: +* Considerations about ChromeOS and free operating systems Video blobs:: +* Caution: Video acceleration requires a non-free blob, software rendering can +* be used instead WiFi blobs:: Caution: WiFi requires a non-free blob, +* a USB dongle can be used instead EC Firmware:: EC firmware is free +* software! Microcode:: No microcode! Depthcharge payload - CrOS:: +* The Screw:: Flash chip write protection: the screw @end menu -@node Installing Libreboot internally from the device -@c @subsubheading Installing Libreboot internally, from the device -Before installing Libreboot to the SPI flash internally, the device has to be reassembled. +@node Intent @ifinfo @subsubheading Google's intent with CrOS devices @end +ifinfo CrOS (Chromium OS/Chrome OS) devices, such as Chromebooks, were not +designed with the intent of bringing more freedom to users. However, they run +with a lot of free software at the boot software and embedded controller levels, +since free software gives Google enough flexibility to optimize various aspects +such as boot time and most importantly, to implement the CrOS security system, +that involves various aspects of the software. Google does hire a lot of +Coreboot developers, who are generally friendly to the free software movement +and try to be good members of the free software community, by contributing code +back. + +CrOS devices are designed (from the factory) to actually coax the user into +using +@uref{https://www.gnu.org/philosophy/who-does-that-server-really-serve.en.html,proprietary +web services} (SaaSS) that invade the user's privacy (ChromeOS is literally just +the Google Chrome browser when you boot up, itself proprietary and comes with +proprietary add-ons like flash. It's only intended for SaaSS, not actual, real +computing). Google is even a member of the @emph{PRISM} program, as outlined by +Edward Snowden. See notes about ChromeOS below. The libreboot project recommends +that the user replace the default @emph{ChromeOS} with a distribution that can +be used in freedom, without invading the user's privacy. + +We also use a similar argument for the MacBook and the ThinkPads that are +supported in libreboot. Those laptops are supported, in spite of Apple and +Lenovo, companies which are actually @emph{hostile} to the free software +movement. + + +@node Considerations @ifinfo @subsubheading Considerations about ChromeOS and +free operating systems @end ifinfo This laptop comes preinstalled (from the +factory) with Google ChromeOS. This is a GNU/Linux distribution, but it's not +general purpose and it comes with proprietary software. It's designed for +@emph{@uref{https://www.gnu.org/philosophy/who-does-that-server-really-serve.en.html,SaaSS}}. +Libreboot recommends that users of this laptop replace it with another +distribution. + +The FSF has a @uref{https://www.gnu.org/distros/free-distros.html,list of +distributions} that are 100% free software. Only one of them is confirmed to +work on ARM CrOS devices. Parabola looks hopeful: +@uref{https://www.parabola.nu/news/parabola-supports-armv7/,https://www.parabola.nu/news/parabola-supports-armv7/} + +The libreboot project would like to see all FSF-endorsed distro projects port to +these laptops. This includes Trisquel, GuixSD and others. And ProteanOS. Maybe +even LibreCMC. The more the merrier. We need them, badly. -All the files from the @strong{veyron_speedy} release (or build) have to be transferred to the device. +@strong{We need these distributions to be ported as soon as possible.} -The following operations have to be executed with root privileges on the device (e.g. using the @emph{root} account). In addition, the @strong{cros-flash-replace} script has to be made executable:@* # @strong{chmod a+x cros-flash-replace}@* +@node Video blobs @ifinfo @subsubheading Caution: Video acceleration requires a +non-free blob, software rendering can be used instead. @end ifinfo The lima +driver source code for the onboard Mali GPU is not released. The developer +withheld it for personal reasons. Until that is released, the only way to use +video (in freedom) on this laptop is to not have video acceleration, by making +sure not to install the relevant blob. Most tasks can still be performed without +video acceleration, without any noticeable performance penalty. + +In practise, this means that certain things like games, blender and GNOME shell +(or other fancy desktops) won't work well. The libreboot project recommends a +lightweight desktop which does not need video acceleration, such as @emph{XFCE} +or @emph{LXDE}. + +The lima developer wrote this blog post, which sheds light on the story: +@uref{http://libv.livejournal.com/27461.html,http://libv.livejournal.com/27461.html} + +@node WiFi blobs @ifinfo @subsubheading Caution: WiFi requires a non-free blob, +a USB dongle can be used instead. @end ifinfo These laptops have non-removeable +(soldered on) WiFi chips, which require non-free firmware in the Linux kernel in +order to work. + +The libreboot project recommends using an external USB wifi dongle that works +with free software. @xref{Recommended wifi chipsets}. @c See +@uref{index.html#recommended_wifi,index.html#recommended_wifi}. + +There are 2 companies (endorsed by the Free Software Foundation, under their +@emph{Respects your Freedom} guidelines), that sell USB WiFi dongles guaranteed +to work with free software (i.e. linux-libre kernel): + +@itemize @item +@uref{https://www.thinkpenguin.com/gnu-linux/penguin-wireless-n-usb-adapter-gnu-linux-tpe-n150usb,ThinkPenguin +sells them} (company based in USA) @item +@uref{https://tehnoetic.com/tehnoetic-wireless-adapter-gnu-linux-libre-tet-n150,Tehnoetic +sells them} (company based in Europe) @end itemize + +These wifi dongles use the AR9271 (atheros) chipset, supported by the free +@emph{ath9k_htc} driver in the Linux kernel. They work in @emph{linux-libre} +too. + +@node EC Firmware @ifinfo @subsubheading EC firmware is free software! @end +ifinfo It's free software. Google provides the source. Build scripts will be +added later, with EC sources provided in libreboot, and builds of the EC +firmware. + +This is unlike the other current libreboot laptops (Intel based). In practise, +you can (if you do without the video/wifi blobs, and replace ChromeOS with a +distribution that respects your freedom) be more free when using one of these +laptops. + +The libreboot FAQ briefly describes what an @emph{EC} is: +@uref{http://libreboot.org/faq/#firmware-ec,http://libreboot.org/faq/#firmware-ec} + +@node Microcode @ifinfo @subsubheading No microcode! @end ifinfo Unlike x86 +(e.g. Intel/AMD) CPUs, ARM CPUs do not use microcode, not even built in. On the +Intel/AMD based libreboot systems, there is still microcode in the CPU (not +considered problematic by the FSF, provided that it is reasonably trusted to not +be malicious, since it's part of the hardware and read-only), but we exclude +microcode updates (volatile updates which are uploaded at boot time by the boot +firmware, if present), which are proprietary software. -The SPI flash has to be read first:@* # @strong{flashrom -p host -r flash.img}@* @strong{Note: it might be a good idea to copy the produced flash.img file at this point and store it outside of the device for backup purposes.} +On ARM CPUs, the instruction set is implemented in circuitry, without microcode. -Then, the @strong{cros-flash-replace} script has to be executed as such:@* # @strong{./cros-flash-replace flash.img coreboot ro-frid}@* If any error is shown, it is definitely a bad idea to go further than this point. +@node Depthcharge payload - CrOS @ifinfo @subsubheading Depthcharge payload @end +ifinfo These systems do not use the GRUB payload. Instead, they use a payload +called depthcharge, which is common on CrOS devices. This is free software, +maintained by Google. -The resulting flash image can then be flashed back:@* # @strong{flashrom -p host -w flash.img}@* +@node The Screw @ifinfo @subsubheading Flash chip write protection: the screw +@end ifinfo It's next to the flash chip. Unscrew it, and the flash chip is +read-write. Screw it back in, and the flash chip is read-only. It's called the +screw. -You should also see within the output the following:@* @strong{"Verifying flash... VERIFIED."} +@emph{The screw} is accessible by removing other screws and gently prying off +the upper shell, where the flash chip and the screw are then directly +accessible. User flashing from software is possible, without having to +externally re-flash, but the flash chip is SPI (SOIC-8 form factor) so you can +also externally re-flash if you want to. In practise, you only need to +externally re-flash if you brick the laptop; read @ref{How to program an SPI +flash chip with BeagleBone Black,BBB setup} for an example of how to set up an +SPI programmer. -Shut down. The device will now boot to Libreboot. +Write protection is useful, because it prevents the firmware from being +re-flashed by any malicious software that might become executed on your +GNU/Linux system, as root. In other words, it can prevent a firmware-level +@emph{evil maid} attack. It's possible to write protect on all current libreboot +systems, but CrOS devices make it easy. The screw is such a stupidly simple +idea, which all designs should implement. -@node Installing Libreboot externally with a SPI flash programmer -@c @subsubheading Installing Libreboot externally, with a SPI flash programmer -Before installing Libreboot to the SPI flash internally, the device has to be opened. -The SPI flash is located next to the write protect screw. Its layout is indicated in the picture below. Note that it is not necessary to connect @strong{WP#} since removing the screw already connects it to ground. Before writing to the chip externally, the battery connector has to be detached. It is located under the heat spreader, that has to be unscrewed from the rest of the case. The battery connector is located on the right and has colorful cables, as shown on the picture below. -@uref{../resources/images/c201/spi-flash-layout.jpg,@image{../resources/images/c201/spi-flash-layout,,,SPI flash layout,jpg}} @uref{../resources/images/c201/battery-connector.jpg,@image{../resources/images/c201/battery-connector,,,Battery connector,jpg}} +@node Lenovo ThinkPad X60/X60s @subsubsection Lenovo ThinkPad X60/X60s Native +gpu initialization (`native graphics') which replaces the proprietary VGA Option +ROM (`@uref{https://en.wikipedia.org/wiki/Video_BIOS,Video BIOS}' or `VBIOS'), +all known LCD panels are currently compatible: -All the files from the @strong{veyron_speedy} release (or build) have to be transferred to the host. +To find what LCD panel you have, see: @ref{Get EDID - Find out the name of your +LCD panel,Get EDID}. -The following operations have to be executed with root privileges on the host (e.g. using the @emph{root} account). In addition, the @strong{cros-flash-replace} script has to be made executable:@* # @strong{chmod a+x cros-flash-replace}@* +@itemize @item TMD-Toshiba LTD121ECHB: # @item CMO N121X5-L06: # @item Samsung +LTN121XJ-L07: # @item BOE-Hydis HT121X01-101: # @end itemize -The SPI flash has to be read first (using the right spi programmer):@* # @strong{flashrom -p @emph{programmer} -r flash.img}@* @strong{Note: it might be a good idea to copy the produced flash.img file at this point and store it outside of the device for backup purposes.} +You can remove an X61/X61s motherboard from the chassis and install an X60/X60s +motherboard in it's place (for flashing libreboot). The chassis is mostly +identical and the motherboards are the same shape/size. -Then, the @strong{cros-flash-replace} script has to be executed as such:@* # @strong{./cros-flash-replace flash.img coreboot ro-frid}@* If any error is shown, it is definitely a bad idea to go further than this point. +The X60 typically comes with an Intel wifi chipset which does not work at all +without proprietary firmware, and while Lenovo BIOS is running the system will +refuse to boot if you replace the card. Fortunately it is very easily replaced; +just remove the card and install another one @strong{after} libreboot is +installed. See Recommended wifi chipsets for replacements. @c ADD REF -The resulting flash image can then be flashed back (using the right spi programmer):@* # @strong{flashrom -p @emph{programmer} -w flash.img}@* -You should also see within the output the following:@* @strong{"Verifying flash... VERIFIED."} -The device will now boot to Libreboot. +@node Lenovo ThinkPad X60 Tablet @subsubsection Lenovo ThinkPad X60 Tablets +Native gpu initialization (`native graphics') which replaces the proprietary VGA +Option ROM (`@uref{https://en.wikipedia.org/wiki/Video_BIOS,Video BIOS}' or +`VBIOS'). +To find what LCD panel you have, see: @ref{Get EDID - Find out the name of your +LCD panel,Get EDID}. @c +@uref{../misc/index.html#get_edid_panelname,../misc/index.html#get_edid_panelname}. +There are 5 known LCD panels for the X60 Tablet: +@itemize @item @strong{X60T XGA (1024x768):} @itemize @item BOE-Hydis +HV121X03-100 (works) @item Samsung LTN121XP01 (does not work. blank screen) +@item BOE-Hydis HT12X21-351 (does not work. blank screen) @end itemize -@node Hardware methods -@subsection Hardware methods +@item @strong{X60T SXGA+ (1400x1050):} @itemize @item BOE-Hydis HV121P01-100 +(works) @item BOE-Hydis HV121P01-101 (works) @end itemize -@menu -* How to program an SPI flash chip with BeagleBone Black:: -* GA-G41M-ES2L flashing tutorial:: -* Flashing Intel D510MO:: -* Configuring EHCI debugging on the BeagleBone Black:: -* KGPE-D16:: Needed if running proprietary firmware, or to unbrick -* KCMA-D8:: Needed if running proprietary firmware, or to unbrick -* ThinkPad X60 Recovery Guide:: -* ThinkPad X60 Tablet Recovery Guide:: -* ThinkPad T60 Recovery Guide:: -* ThinkPad X200/X200S/X200T:: Needed if running proprietary firmware, or to unbrick -* ThinkPad R400:: Needed if running proprietary firmware, or to unbrick -* ThinkPad T400:: Needed if running proprietary firmware, or to unbrick -* ThinkPad T500:: Needed if running proprietary firmware, or to unbrick -@end menu +@end itemize +Most X60Ts only have digitizer (pen), but some have finger (touch) aswell as +pen; finger/multitouch doesn't work, only digitizer (pen) does. -@node How to program an SPI flash chip with BeagleBone Black -@subsubsection How to program an SPI flash chip with the BeagleBone Black -This document exists as a guide for reading from or writing to an SPI flash chip with the BeagleBone Black, using the @uref{http://flashrom.org/Flashrom,flashrom} software. A BeagleBone Black, rev. C was used when creating this guide, but earlier revisions may also work. +You can remove an X61/X61s motherboard from the chassis and install an X60/X60s +motherboard in its place (for flashing libreboot). The chassis is mostly +identical and the motherboards are the same shape/size. @strong{It is unknown if +the same applies between the X60 Tablet and the X61 Tablet}. -@menu -* Hardware requirements - BBB:: -* Setting up the 33V DC PSU:: -* Accessing the operating system on the BBB:: -* Setting up spidev on the BBB:: -* Connecting the Pomona 5250/5252:: -* Notes about stability:: -@end menu +The X60 Tablet typically comes with an Intel wifi chipset which does not work at +all without proprietary firmware, and while Lenovo BIOS is running the system +will refuse to boot if you replace the card. Fortunately it is very easily +replaced; just remove the card and install another one @strong{after} libreboot +is installed. See Recommended wifi chipsets for replacements. @c ADD REF -@node Hardware requirements - BBB -@c @subsubheading Hardware requirements -Shopping list (pictures of this hardware is shown later): +A user with a X60T that has digitizer+finger support, reported that they could +get finger input working. They used linuxwacom at git tag 0.25.99.2 and had the +following in their xorg.conf: -@itemize -@item -A @uref{http://flashrom.org,Flashrom}-compatible external SPI programmer: @strong{BeagleBone Black}, sometimes referred to as 'BBB', (rev. C) is highly recommended. You can buy one from @uref{https://www.adafruit.com,Adafruit} (USA), @uref{http://electrokit.com,Electrokit} (Sweden) or any of the distributors listed @uref{http://beagleboard.org/black,here} (look below 'Purchase'). We recommend this product because we know that it works well for our purposes and doesn't require any non-free software. -@item -Electrical/insulative tape: cover the entire bottom surface of the BBB (the part that rests on a surface). This is important, when placing the BBB on top of a board so that nothing shorts. Most hardware/electronics stores have this. Optionally, you can use the bottom half of a @uref{http://www.hammondmfg.com/1593HAM.htm#BeagleBoneBlack,hammond plastic enclosure}. -@item -Clip for connecting to the flash chip: if you have a SOIC-16 flash chip (16 pins), you will need the @strong{Pomona 5252} or equivalent. For SOIC-8 flash chips (8 pins), you will need the @strong{Pomona 5250} or equivalent. Do check which chip you have, before ordering a clip. Also, you might as well buy two clips or more since they break easily. @uref{http://farnell.com/,Farnell element 14} sells these and ships to many countries. Some people find these clips difficult to get hold of, especially in South America. If you know of any good suppliers, please contact the libreboot project with the relevant information. @strong{If you can't get hold of a pomona clip, some other clips might work, e.g. 3M, but they are not always reliable. You can also directly solder the wires to the chip, if that suits you; the clip is just for convenience, really.} -@item -@strong{External 3.3V DC power supply}, for powering the flash chip: an ATX power supply / PSU (common on Intel/AMD desktop computers) will work for this. A lab PSU (DC) will also work (adjusted to 3.3V). -@itemize -@item -Getting a multimeter might be worthwhile, to verify that it's supplying 3.3V. -@end itemize +@verbatim +# Now, for some reason (probably a bug in linuxwacom), the 'Touch=on' directive +# gets reset to 'off'. So you'll need to do $ xsetwacom --set WTouch Touch on +# +# tested with linuxwacom git 42a42b2a8636abc9e105559e5dea467163499de7 -@item -@strong{External 5V DC power supply} (barrel connector), for powering the BBB: the latter can have power supplied via USB, but a dedicated power supply is recommended. These should be easy to find in most places that sell electronics. @strong{OPTIONAL. Only needed if not powering with the USB cable, or if you want to use @ref{ Configuring EHCI debugging on the BeagleBone Black,EHCI debug}}. -@item -@strong{Pin header / jumper cables} (2.54mm / 0.1" headers): you should get male--male, male--female and female--female cables in 10cm size. Just get a load of them. Other possible names for these cables/wires/leads are -@itemize -@item -flying leads -@item -dupont (or other brand names) -@item -breadboard cables (since they are often used on breadboards). -@end itemize +Section "Monitor" Identifier "<default monitor>" DisplaySize 245 +184 EndSection -@uref{https://www.adafruit.com,Adafruit} sell them, as do many others. @strong{Some people find them difficult to buy. Please contact the libreboot project if you know of any good sellers.} You might also be able to make these cables yourself. For PSU connections, using long cables, e.g. 20cm, is fine, and you can extend them longer than that if needed. -@item -@strong{Mini USB A-B cable}: the BBB probably already comes with one. @strong{OPTIONAL---only needed for @ref{ Configuring EHCI debugging on the BeagleBone Black,EHCI debug} or for serial/SSH access without ethernet cable (g_multi kernel module)}. -@item -@strong{FTDI TTL cable or debug board}: used for accessing the serial console on the BBB. @uref{http://elinux.org/Beagleboard:BeagleBone_Black_Serial,This page} contains a list. @strong{OPTIONAL---only needed for serial console on the BBB, if not using SSH via ethernet cable.} -@end itemize +Section "Screen" Identifier "Default Screen Section" Monitor "<default +monitor<" EndSection -@node Setting up the 33V DC PSU -@c @subsubheading Setting up the 3.3V DC PSU -ATX PSU pinouts can be read on @uref{https://en.wikipedia.org/wiki/Power_supply_unit_%28computer%29#Wiring_diagrams,this Wikipedia page}. +Section "InputDevice" Identifier "WTouch" Driver "wacom" Option +"Device" "/dev/ttyS0" +# Option "DebugLevel" "12" + Option "BaudRate" "38400" Option "Type" "touch" Option + "Touch" "on" Option "Gesture" "on" Option "ForceDevice" "ISDV4" +# Option "KeepShape" "on" + Option "Mode" "Absolute" Option "RawSample" "2" +# Option "TPCButton" "off" + Option "TopX" "17" Option "TopY" "53" Option "BottomX" "961" + Option "BottomY" "985" EndSection -You can use pin 1 or 2 (orange wire) on a 20-pin or 24-pin ATX PSU for 3.3V, and any of the ground/earth sources (black cables) for ground. Short PS_ON# / Power on (green wire; pin 16 on 24-pin ATX PSU, or pin 14 on a 20-pin ATX PSU) to a ground (black; there is one right next to it) using a wire/paperclip/jumper, then power on the PSU by grounding PS_ON# (this is also how an ATX motherboard turns on a PSU). +Section "ServerLayout" Identifier "Default Layout" Screen "Default +Screen Section" InputDevice "WTouch" "SendCoreEvents" EndSection @end verbatim -@strong{DO **NOT** use pin 4, 6, do **NOT** use pin 19 or 20 (on a 20-pin ATX PSU), and DO **NOT** use pin 21, 22 or 23 (on a 24-pin ATX PSU). Those wires (the red ones) are 5V, and they **WILL** kill your flash chip. ***NEVER*** supply more than 3.3V to your flash chip (that is, if it's a 3.3V flash chip; 5V and 1.8V SPI flash chips do exist, but they are rare. Always check what voltage your chip takes. Most of them take 3.3V).} -You only need one 3.3V supply and one ground for the flash chip, after grounding PS_ON#. +@node Lenovo ThinkPad T60 @subsubsection Lenovo ThinkPad T60 If your T60 is a +14.1" or 15.1" model with an ATI GPU, it won't work with libreboot by default +but you can replace the motherboard with another T60 motherboard that has an +Intel GPU, and then libreboot should work. -The male end of a 0.1" or 2.54mm header cable is not thick enough to remain permanently connected to the ATX PSU on its own. When connecting header cables to the connector on the ATX PSU, use a female end attached to a thicker piece of wire (you could use a paper clip), or wedge the male end of the jumper cable into the sides of the hole in the connector, instead of going through the centre. +As far as I know, 14.1" (Intel GPU) and 15.1" (Intel GPU) T60 motherboards are +the same, where 'spacers' are used on the 15.1" T60. In any case, it makes sense +to find one that is guaranteed to fit in your chassis. -Here is an example set up:@* @image{../resources/images/x200/psu33,,,,jpg} +There is also a 15.4" T60 with Intel GPU. -@node Accessing the operating system on the BBB -@c @subsubheading Accessing the operating system on the BBB -The operating system on your BBB will probably have an SSH daemon running where the root account has no password. Use SSH to access the operating system and set a root password. By default, the OS on your BBB will most likely use DHCP, so it should already have an IP address. +Note: the T60@strong{p} laptops all have ATI graphics. The T60p laptops cannot +be used with libreboot under any circumstances. -You will also be using the OS on your BBB for programming an SPI flash chip. +The following T60 motherboard (see area highlighted in white) shows an empty +space where the ATI GPU would be (this particular motherboard has an Intel +GPU):@*@* @image{../resources/images/t60_dev/t60_unbrick,,,,jpg} -@itemize -@item -Alternatives to SSH in case SSH fails:: +The reason that the ATI GPU on T60 is unsupported is due to the VBIOS (Video +BIOS) which is non-free. The VBIOS for the Intel GPU on X60/T60 has been reverse +engineered, and replaced with Free Software and so will work in libreboot. -You can also use a serial FTDI debug board with GNU Screen, to access the serial console.@* # @strong{screen /dev/ttyUSB0 115200}@* Here are some example photos:@* @image{../resources/images/x200/ftdi,,,,jpg} @image{../resources/images/x200/ftdi_port,,,,jpg}@* +The 'Video BIOS' is what initializes graphics. -You can also connect the USB cable from the BBB to another computer and a new network interface will appear, with its own IP address. This is directly accessible from SSH, or screen:@* # @strong{screen /dev/ttyACM0 115200} +See: +@uref{https://en.wikipedia.org/wiki/Video_BIOS,https://en.wikipedia.org/wiki/Video_BIOS}.@* +In fact, lack of free VBIOS in general is a big problem in coreboot, and is one +reason (among others) why many ports for coreboot are unsuitable for libreboot's +purpose. -You can also access the uboot console, using the serial method instead of SSH. -@end itemize +Theoretically, the ThinkPad T60 with ATI GPU can work with libreboot and have +ROM images compiled for it, however in practise it would not be usable as a +laptop because there would be no visual display at all. That being said, such a +configuration is acceptable for use in a 'headless' server setup (with serial +and/or ssh console as the display). -@node Setting up spidev on the BBB -@c @subsubheading Setting up spidev on the BBB -Log on as root on the BBB, using either SSH or a serial console as defined in @ref{Accessing the operating system on the BBB,bbb_access}. Make sure that you have internet access on your BBB. +@menu +* Supported T60 list:: +@end menu -Follow the instructions at @uref{http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0,http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0} up to (and excluding) the point where it tells you to modify uEnv.txt +@node Supported T60 list Native gpu initialization ('native graphics') which +replaces the proprietary VGA Option ROM +('@uref{https://en.wikipedia.org/wiki/Video_BIOS,Video BIOS}' or 'VBIOS'). -You need to update the software on the BBB first. If you have an element14 brand BBB (sold by Premier Farnell plc. stores like Farnell element14, Newark element14, and Embest), you may need to @uref{https://groups.google.com/forum/?_escaped_fragment_=msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ#!msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ,work around a bug} in the LED aging init script before you can update your software. If you don't have a file named /etc/init.d/led_aging.sh, you can skip this step and update your software as described below. Otherwise, replace the contents of this file with: +To find what LCD panel you have, see: @ref{Get EDID - Find out the name of your +LCD panel,Get EDID}. @c +@uref{../misc/index.html#get_edid_panelname,../misc/index.html#get_edid_panelname}. -@verbatim -#!/bin/sh -e -### BEGIN INIT INFO -# Provides: led_aging.sh -# Required-Start: $local_fs -# Required-Stop: $local_fs -# Default-Start: 2 3 4 5 -# Default-Stop: 0 1 6 -# Short-Description: Start LED aging -# Description: Starts LED aging (whatever that is) -### END INIT INFO +@strong{Some T60s have ATI GPUs, and all T60P laptops have ATI GPUs These are +incompatible! See @ref{Lenovo ThinkPad T60,t60_ati_intel} for how to remedy +this.} -x=$(/bin/ps -ef | /bin/grep "[l]ed_acc") -if [ ! -n "$x" -a -x /usr/bin/led_acc ]; then - /usr/bin/led_acc & -fi -@end verbatim +How to dump the EDID:@* -Run @strong{apt-get update} and @strong{apt-get upgrade} then reboot the BBB, before continuing. +Tested LCD panels: @strong{working(compatible)} -Check that the firmware exists:@* # @strong{ls /lib/firmware/BB-SPI0-01-00A0.*}@* Output: +@itemize @item TMD-Toshiba LTD141EN9B (14.1" 1400x1050) (FRU P/N 41W1478 +recommended for the inverter board) @item Samsung LTN141P4-L02 (14.1" 1400x1050) +(FRU P/N 41W1478 recommended for the inverter board) @item LG-Philips +LP150E05-A2K1 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 +recommended for the inverter board) @item Samsung LTN150P4-L01 (15.1" 1400x1050) +(P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) (not +a T60 screen afaik, but it works) @item BOE-Hydis HV150UX1-100 (15.1" 1600x1200) +(P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) @end +itemize + +Tested LCD panels: @strong{not working yet (incompatible; see +@uref{https://libreboot.org/docs/future/index.html#lcd_i945_incompatibility})} + +@itemize @item Samsung LTN141XA-L01 (14.1" 1024x768) @item LG-Philips LP150X09 +(15.1" 1024x768) @item Samsung LTN150XG (15.1" 1024x768) @item LG-Philips +LP150E06-A5K4 (15.1" 1400x1050) (also, not an official T60 screen) @item Samsung +LTN154X3-L0A (15.4" 1280x800) @item IDtech IAQX10N (15.1" 2048x1536) (no display +in GRUB, display in GNU/Linux is temperamental) (P/N 42T0078 FRU 42T0079 or P/N +41W1338 recommended for the inverter board) @item IDtech N150U3-L01 (15.1" +1600x1200) (no display in GRUB, display in GNU/Linux works) (P/N 42T0078 FRU +42T0079 or P/N 41W1338 recommended for the inverter board) @end itemize + +@emph{The following LCD panels are @strong{UNTESTED}. If you have one of these +panels then please submit a report!}: + +@itemize @item CMO(IDtech?) N141XC (14.1" 1024x768) @item BOE-Hydis HT14X14 +(14.1" 1024x768) @item TMD-Toshiba LTD141ECMB (14.1" 1024x768) @item Boe-Hydis +HT14P12 (14.1" 1400x1050) (FRU P/N 41W1478 recommended for the inverter board) +@item CMO (IDtech?) 13N7068 (15.1" 1024x768) @item CMO (IDtech?) 13N7069 (15.1" +1024x768) @item BOE-Hydis HV150P01-100 (15.1" 1400x1050) (P/N 42T0078 FRU +42T0079 or P/N 41W1338 recommended for the inverter board) @item BOE-Hydis +HV150UX1-102 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 +recommended for the inverter board) @item IDtech IAQX10S (15.1" 2048x1536) (P/N +42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) @item +Samsung LTN154P2-L05 (42X4641 42T0329) (15.4" 1680x1050) @item LG-Philips +LP154W02-TL10 (13N7020 42T0423) (15.4" 1680x1050) @item LG-Philips LP154WU1-TLB1 +(42T0361) (15.4" 1920x1200) @strong{(for T61p but it might work in T60. +Unknown!)} @item Samsung LTN154U2-L05 (42T0408 42T0574) (15.4" 1920x1200) +@strong{(for T61p but it might work in T60. Unknown!)} @end itemize + +It is unknown whether the 1680x1050 (15.4") and 1920x1200 (15.4") panels use a +different inverter board than the 1280x800 panels. + +The T60 typically comes with an Intel wifi chipset which does not work at all +without proprietary firmware, and while Lenovo BIOS is running the system will +refuse to boot if you replace the card. Fortunately it is very easily replaced; +just remove the card and install another one @strong{after} libreboot is +installed. See Recommended wifi chipsets for replacements. @c ADD REF + + +@node Lenovo ThinkPad X200 @subsubsection ThinkPad X200 It is believed that all +X200 laptops are compatible. @ref{X200S and X200 Tablet,X200S and X200 Tablet} +will also work,depending on the configuration. + +It *might* be possible to put an X200 motherboard in an X201 chassis, though +this is currently untested by the libreboot project. The same may also apply +between X200S and X201S; again, this is untested. @strong{It's most likely +true.} + +There are two possible flash chip sizes for the X200: 4MiB (32Mbit) or 8MiB +(64Mbit). This can be identified by the type of flash chip below the palmrest: +4MiB is SOIC-8, 8MiB is SOIC-16. + +@strong{The X200 laptops come with the ME (and sometimes AMT in addition) before +flashing libreboot. Libreboot disables and removes it by using a modified +descriptor: @pxref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains +notes, plus instructions). -@verbatim -/lib/firmware/BB-SPI0-01-00A0.dtbo -@end verbatim +Flashing instructions can be found at @ref{How to update/install,flashrom} -Then:@* # @strong{echo BB-SPI0-01 > /sys/devices/bone_capemgr.*/slots}@* # @strong{cat /sys/devices/bone_capemgr.*/slots}@* Output: +@menu +* Compatibility without blobs - X200:: X200S and X200 Tablet:: Trouble undocking +* button doesn't work:: LCD compatibility list - X200:: How to tell if it has an +* LED or CCFL?:: Hardware register dumps:: RAM S3 and microcode updates:: +* Unsorted notes:: +@end menu -@verbatim - 0: 54:PF--- - 1: 55:PF--- - 2: 56:PF--- - 3: 57:PF--- - 4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G - 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI - 7: ff:P-O-L Override Board Name,00A0,Override Manuf,BB-SPI0-01 -@end verbatim +@node Compatibility without blobs - X200 @ifinfo @subsubheading Compatibility +without blobs - X200 @end ifinfo @c @subsubheading Hardware virtualization vt-x +@c @menu @c * Hardware virtualization vt-x:: @c @end menu + +@c @node Hardware virtualization vt-x @c @subsubheading Hardware virtualization +(vt-x) @c @anchor{#hardware-virtualization-vt-x} The X200, when run without CPU +microcode updates in coreboot, currently kernel panics if running QEMU with vt-x +enabled on 2 cores for the guest. With a single core enabled for the guest, the +guest panics (but the host is fine). Working around this in QEMU might be +possible; if not, software virtualization should work fine (it's just slower). + +On GM45 hardware (with libreboot), make sure that the @emph{kvm} and +@emph{kvm_intel} kernel modules are not loaded, when using QEMU. + +The following errata datasheet from Intel might help with investigation: +@uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} + +Anecdotal reports from at least 1 user suggests that some models with CPU +microcode 1067a (on the CPU itself) might work with vt-x in libreboot. + +@node X200S and X200 Tablet @ifinfo @subsubheading X200S and X200 Tablet. @end +ifinfo X200S and X200 Tablet have raminit issues at the time of writing (GS45 +chipset. X200 uses GM45). + +X200S and X200 Tablet are known to work, but only with certain CPU+RAM +configurations. The current stumbling block is RCOMP and SFF, mentioned in +@uref{https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf,https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf}. + +The issues mostly relate to raminit (memory initialization). With an unpatched +coreboot, you get the following: +@uref{../resources/text/x200s/cblog00.txt,cblog00.txt}. No SODIMM combination +that was tested would work. At first glance, it looks like GS45 (chipset that +X200S uses. X200 uses GM45) is unsupported, but there is a workaround that can +be used to make certain models of the X200S work, depending on the RAM. + +The datasheet for GS45 describes two modes: low-performance and +high-performance. Low performance uses the SU range of ultra-low voltage +procesors (SU9400, for example), and high-performance uses the SL range of +processors (SL9400, for example). According to datasheets, GS45 behaves very +similarly to GM45 when operating in high-performance mode. + +The theory then was that you could simply remove the checks in coreboot and make +it pass GS45 off as GM45; the idea is that, with a high-performance mode CPU +(SL9400, for example) it would just boot up and work. + +This suspicion was confirmed with the following log: +@uref{../resources/text/x200s/cblog01.txt,cblog01.txt}. The memory modules in +this case are 2x4GB. @strong{However, not all configurations work: +@uref{../resources/text/x200s/cblog02.txt,cblog02.txt} (2x2GB) and +@uref{../resources/text/x200s/cblog03.txt,cblog03.txt} (1x2GB) show a failed +bootup.} @emph{False alarm. The modules were mixed (non-matching). X200S with +high-performance mode CPU will work so long as you use matching memory modules +(doesn't matter what size).} S + +This was then pushed as a patch for coreboot, which can be found at +@uref{http://review.coreboot.org/#/c/7786/,http://review.coreboot.org/#/c/7786/} +(libreboot merges this patch in coreboot-libre now. Check the 'getcb' script in +src or git). @menu +* Proper GS45 raminit:: +@end menu -Verify that the spidev device now exists:@* # @strong{ls -al /dev/spid*}@* Output: +@node Proper GS45 raminit @c FIX FIX FIX: node issues? @c @subsubheading Proper +GS45 raminit A new northbridge gs45 should be added to coreboot, based on gm45, +and a new port x200st (X200S and X200T) should be added based on the x200 port. -@verbatim -crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0 -@end verbatim +This port would have proper raminit. Alternatively, gs45 (if raminit is taken to +be the only issue with it) can be part of gm45 northbridge support (and +X200S/Tablet being part of the X200 port) with conditional checks in the raminit +that make raminit work differently (as required) for GS45. nico_h and +pgeorgi/patrickg in the coreboot IRC channel should know more about raminit on +gm45 and likely gs45. -Now the BBB is ready to be used for flashing. Make this persist across reboots:@* In /etc/default/capemgr add @strong{CAPE=BB-SPI0-01} at the end (or change the existing @strong{CAPE=} entry to say that, if an entry already exists. +pgeorgi recommends to run SerialICE on the factory BIOS (for X200S), comparing +it with X200 (factory BIOS) and X200 (gm45 raminit code in coreboot), to see +what the differences are. Then tweak raminit code based on that. -Get flashrom from the libreboot_util release archive, or build it from libreboot_src/git if you need to. An ARM binary (statically compiled) for flashrom exists in libreboot_util releases. Put the flashrom binary on your BBB. +@node Trouble undocking button doesn't work @ifinfo @subsubheading Trouble +undocking (button doesn't work) @end ifinfo This person seems to have a +workaround: +@uref{https://github.com/the-unconventional/libreboot-undock,https://github.com/the-unconventional/libreboot-undock} -You may also need ich9gen, if you will be flashing an ICH9-M laptop (such as the X200). Get it from libreboot_util, or build it from libreboot_src, and put the ARM binary for it on your BBB. +@node LCD compatibility list - X200 @ifinfo @subsubheading LCD compatibility +list @end ifinfo LCD panel list (X200 panels listed there): +@uref{http://www.thinkwiki.org/wiki/TFT_display,http://www.thinkwiki.org/wiki/TFT_display} -Finally, get the ROM image that you would like to flash and put that on your BBB. +All LCD panels for the X200, X200S and X200 Tablet are known to work. -Now test flashrom:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512}@* Output: +@menu +* AFFS/IPS panels:: X200S:: +@end menu -@verbatim -Calibrating delay loop... OK. -No EEPROM/flash device found. -Note: flashrom can never write if the flash chip isn't found automatically. -@end verbatim +@node AFFS/IPS panels @c @subsubheading AFFS/IPS panels @c @menu @c * X200:: @c +@end menu -This means that it's working (the clip isn't connected to any flash chip, so the error is fine). +X200 @c @subsubheading X200 @c @anchor{#x200} Adapted from +@uref{https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X200,https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X200} -@node Connecting the Pomona 5250/5252 -@c @subsubheading Connecting the Pomona 5250/5252 -Use this image for reference when connecting the pomona to the BBB: @uref{http://beagleboard.org/Support/bone101#headers,http://beagleboard.org/Support/bone101#headers} (D0 = MISO or connects to MISO). +Look at wikipedia for difference between TN and IPS panels. IPS have much better +colour/contrast than a regular TN, and will typically have good viewing angles. -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +These seem to be from the X200 tablet. You need to find one without the glass +touchscreen protection on it (might be able to remove it, though). It also must +not have a digitizer on it (again, might be possible to just simply remove the +digitizer). -@verbatim - NC - - 21 - 1 - - 17 - NC - - NC - NC - - NC - NC - - NC - NC - - NC - 18 - - 3.3V (PSU) - 22 - - NC - this is pin 1 on the flash chip -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. - -You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# and WP#. -On some systems they are held high, if the flash chip is attached to the board. -If you're flashing a chip that isn't connected to a board, you'll almost certainly -have to connect them. - -SOIC16 pinout (more info available online, or in the datasheet for your flash chip): -HOLD 1-16 SCK -VDD 2-15 MOSI -N/C 3-14 N/C -N/C 4-13 N/C -N/C 5-12 N/C -N/C 6-11 N/C -SS 7-10 GND -MISO 8-9 WP -@end verbatim +@itemize @item BOE-Hydis HV121WX4-120, HV121WX4-110 or HV121WX4-100 - cheap-ish, +might be hard to find @item Samsung LTN121AP02-001 - common to find, cheap @end +itemize -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +@strong{If your X200 has an LED backlit panel in it, then you also need to get +an inverter and harness cable that is compatible with the CCFL panels. To see +which panel type you have, @pxref{How to tell if it has an LED or +CCFL?,led_howtotell}. If you need the inverter/cable, here are part numbers: +44C9909 for CCFL LVDS cable with bluetooth and camera connections, and 42W8009 +or 42W8010 for the inverter.} @c ADD REF -@verbatim - 18 - - 1 - 22 - - NC - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. - -You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# and WP#. -On some systems they are held high, if the flash chip is attached to the board. -If you're flashing a chip that isn't connected to a board, you'll almost certainly -have to connect them. - -SOIC8 pinout (more info available online, or in the datasheet for your flash chip): -SS 1-8 VDD -MISO 2-7 HOLD -WP 3-6 SCK -GND 4-5 MOSI -@end verbatim +There are glossy and matte versions of these. Matte means anti-glare, which is +what you want (in this authors opinion). -@strong{NC = no connection} +Refer to the HMM (hardware maintenance manual) for how to replace the screen. -@strong{DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is connected to the flash chip.} +Sources: -@strong{You also need to connect the BLACK wire (ground/earth) from the 3.3V PSU to pin 2 on the BBB (P9 header). It is safe to install this now (that is, before you connect the pomona to the flash chip); in fact, you should.} +@itemize @item +@uref{http://forum.thinkpads.com/viewtopic.php?f=2&t=84941,ThinkPad Forums - +Matte AFFS Panel on X200} @item +@uref{http://forum.thinkpads.com/viewtopic.php?p=660662#p660662,ThinkPad Forums +- Parts for X200 AFFS Mod} @item +@uref{http://thinkwiki.de/X200_Displayumbau,ThinkWiki.de - X200 Displayumbau} +(achtung: du musst lesen und/oder spreche deutsch; oder ein freund fur hilfe) +@end itemize -if you need to extend the 3.3v psu leads, just use the same colour M-F leads, @strong{but} keep all other leads short (10cm or less) +@node X200S @c @subsubheading X200S +@uref{http://forum.thinkpads.com/viewtopic.php?p=618928#p618928,http://forum.thinkpads.com/viewtopic.php?p=618928#p618928} +explains that the X200S screens/assemblies are thinner. You need to replace the +whole lid with one from a normal X200/X201. -You should now have something that looks like this:@* @image{../resources/images/x200/5252_bbb0,,,,jpg} @image{../resources/images/x200/5252_bbb1,,,,jpg} +@c @ref{#pagetop,Back to top of page.} +@node How to tell if it has an LED or CCFL? @c @subsubheading How to tell if it +has an LED or CCFL? Some X200s have a CCFL backlight and some have an LED +backlight, in their LCD panel. This also means that the inverters will vary, so +you must be careful if ever replacing either the panel and/or inverter. (a CCFL +inverter is high-voltage and will destroy an LED backlit panel). -@node Notes about stability -@c @subsubheading Notes about stability -@uref{http://flashrom.org/ISP,http://flashrom.org/ISP} is what we typically do in libreboot, though not always. That page has some notes about using resistors to affect stability. Currently, we use spispeed=512 (512kHz) but it is possible to use higher speeds while maintaining stability. +CCFLs contain mercury. An X200 with a CCFL backlight will (@strong{}unless it +has been changed to an LED, with the correct inverter. Check with your +supplier!) the following: @emph{"This product contains Lithium Ion Battery, +Lithium Battery and a lamp which contains mercury; dispose according to local, +state or federal laws"} (one with an LED backlit panel will say something +different). -tty0_ in #libreboot was able to get better flashing speeds with the following configuration: -@itemize -@item -"coax" with 0.1 mm core and aluminum foley (from my kitchen), add 100 Ohm resistors (serial) -@item -put heatshrink above the foley, for: CS, CLK, D0, D1 -@item -Twisted pair used as core (in case more capacitors are needed) -@item -See this image: @uref{http://i.imgur.com/qHGxKpj.jpg,http://i.imgur.com/qHGxKpj.jpg} -@item -He was able to flash at 50MHz (lower speeds are also fine). -@end itemize +@node Hardware register dumps @c @subsubheading Hardware register dumps The +coreboot wiki @uref{http://www.coreboot.org/Motherboard_Porting_Guide,shows} how +to collect various logs useful in porting to new boards. Following are outputs +from the X200: +@itemize @item BIOS 3.15, EC 1.06 @itemize @item +@uref{../resources/misc/dumps/x200/,x200_dumps/} @end itemize +@end itemize -@node GA-G41M-ES2L flashing tutorial -@subsubsection GA-G41M-ES2L flashing tutorial -This guide is for those who want libreboot on their Intel GA-G41M-ES2L motherboard while they still have the original BIOS present. +@node RAM S3 and microcode updates @c @subsubheading RAM, S3 and microcode +updates Not all memory modules work. Most of the default ones do, but you have +to be careful when upgrading to 8GiB; some modules work, some don't. -@menu -* Flash chip size - GA-G41M-ES2L:: -* Flashing instructions - GA-G41M-ES2L:: -@end menu +@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721,This page} might be +useful for RAM compatibility info (note: coreboot raminit is different, so this +page might be BS) -@node Flash chip size - GA-G41M-ES2L -@ifinfo -@subsubheading Flash chip size -@end ifinfo -Use this to find out:@* # @strong{dmidecode | grep ROM\ Size} +pehjota started collecting some steppings for different CPUs on several X200 +laptops. You can get the CPUID by running: @* $ @strong{dmesg | sed -n 's/^.* +microcode: CPU0 sig=0x\([^,]*\),.*$/\1/p'} -@node Flashing instructions - GA-G41M-ES2L -@ifinfo -@subsubheading Flashing instructions - GA-G41M-ES2L -@end ifinfo -Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to set up the BBB for flashing it externally, if you want to do that. +What pehjota wrote: The laptops that have issues resuming from suspend, as well +as a laptop that (as I mentioned earlier in #libreboot) won't boot with any +Samsung DIMMs, all have CPUID 0x10676 (stepping M0). -Internal flashing is possible. Boot with proprietary BIOS and GNU/Linux, and run the latest version of flashrom. This board has 2 flash chips, one is a backup. +What pehjota wrote: Laptops with CPUID 0x167A (stepping R0) resume properly +every time and work with Samsung DIMMs. I'll need to do more testing on more +units to better confirm these trends, but it looks like the M0 microcode is very +buggy. That would also explain why I didn't have issues with Samsung DIMMs with +the Lenovo BIOS (which would have microcode updates). I wonder if VT-x works on +R0. -Flash the first chip: -./flashrom -p internal:dualbiosindex=0 -w libreboot.rom +What pehjota wrote: As I said, 10676 is M0 and 1067A is R0; those are the two +CPUIDs and steppings for Intel Core 2 Duo P8xxx CPUs with factory microcode. +(1067 is the family and model, and 6 or A is the stepping ID.) -Flash the second chip: -./flashrom -p internal:dualbiosindex=1 -w libreboot.rom +@strong{TODO: check the CPUIDs and test S3 resume and/or KVM on any C2D systems +(including non-P8xxx ones, which I don't have here) you have available. I'd be +curious if you could confirm these results.} It might not be coreboot that's +buggy with raminit/S3; it might just be down to the microcode updates. @c @menu +@c * Unsorted notes:: @c @end menu -NOTE: You need the latest version of flashrom. Just grab it on flashrom.org from their SVN or Git repos. +@node Unsorted notes @c @subsubheading Unsorted notes @c +@anchor{#unsorted-notes} @verbatim <sgsit> do you know if it's possible to flash +thinkpads over the LPC debug connector at the front edge? <sgsit> that would +make life much easier for systems like this <sgsit> all the Wistron manufactured +systems have this thing called a "golden finger", normally at the front edge of +the board <sgsit> you can plug a board in which gives diagnostic codes but i'm +wondering whether it is capable of more <sgsit> +http://www.endeer.cz/bios.tools/bios.html @end verbatim -That's all! -Do refer to the @ref{Hardware compatibility,compatibility page} for more information about this board. +@node Lenovo ThinkPad R400 @subsubsection Lenovo ThinkPad R400 It is believed +that all or most R400 laptops are compatible. See notes about @ref{A note about +CPUs - R400,r400_external,CPU compatibility} for potential incompatibilities. +There are two possible flash chip sizes for the R400: 4MiB (32Mbit) or 8MiB +(64Mbit). This can be identified by the type of flash chip below the palmrest: +4MiB is SOIC-8, 8MiB is SOIC-16. -@node Flashing Intel D510MO -@subsubsection Flashing Intel D510MO -D510MO flashing tutorial +@strong{The R400 laptops come with the ME (and sometimes AMT in addition) before +flashing libreboot. Libreboot disables and removes it by using a modified +descriptor: see @ref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains +notes, plus instructions). -This guide is for those who want libreboot on their Intel D510MO motherboard while they still have the original BIOS present. +Flashing instructions can be found at @ref{How to update/install,flashrom}. @menu -* Flash chip size - D510MO:: -* Flashing instructions - D510MO:: +* Compatibility without blobs - R400:: LCD Compatibility - R400:: @end menu -@node Flash chip size - D510MO -@c @subsubheading Flash chip size -Use this to find out:@* # @strong{dmidecode | grep ROM\ Size} +@node Compatibility without blobs - R400 @c @subsubheading Compatibility +(without blobs) @c @menu @c * Hardware virtualization vt-x:: @c @end menu +@itemize @item Hardware virtualization vt-x @c @subsubheading Hardware +virtualization (vt-x) @c @anchor{#hardware-virtualization-vt-x} The R400, when +run without CPU microcode updates in coreboot, currently kernel panics if +running QEMU with vt-x enabled on 2 cores for the guest. With a single core +enabled for the guest, the guest panics (but the host is fine). Working around +this in QEMU might be possible; if not, software virtualization should work fine +(it's just slower). -@node Flashing instructions - D510MO -@c @subsubheading Flashing instructions - D510MO -@image{../resources/images/d510mo/d510mo,,,,jpg} +On GM45 hardware (with libreboot), make sure that the @emph{kvm} and +@emph{kvm_intel} kernel modules are not loaded, when using QEMU. -Use this image for reference, then refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to set up the BBB for flashing it. +The following errata datasheet from Intel might help with investigation: +@uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} +@end itemize -Do refer to the @ref{Hardware compatibility,compatibility page} for more information about this board. +The R400 is almost identical to the X200, code-wise. @xref{Lenovo ThinkPad +X200,x200}. +TODO: put hardware register logs here like on the @uref{x200.html,X200} and +@uref{t400.html,T400} page. +@node LCD Compatibility - R400 @c Fixed a typo here: previously 'LCD +compatibily' @c @subsubheading LCD compatibility Not all LCD panels are +compatible yet. @xref{LCD compatibility on GM45 laptops,gm45_lcd}. -@node Configuring EHCI debugging on the BeagleBone Black -@subsubsection EHCI debugging on the BeagleBone Black -If your computer does not boot after installing libreboot, it is very useful to get debug logs from it, from the payload (grub) and/or the kernel (if gets to there). All of them stream debug logs on the available serial (RS-232) by default. However, most of todays laptops lack RS-232 port. The other option is to stream the logs to USB EHCI debug port. +@node Lenovo ThinkPad T400 @subsubsection Lenovo ThinkPad T400 It is believed +that all or most T400 laptops are compatible. See notes about @ref{A note about +CPUs - T400,CPU compatibility} for potential incompatibilities. -This section explains step-by-step how to setup BBB as a ``USB EHCI debug dongle'' and configure libreboot and the linux kernel to stream logs to it (TODO: grub). +There are two possible flash chip sizes for the T400: 4MiB (32Mbit) or 8MiB +(64Mbit). This can be identified by the type of flash chip below the palmrest: +4MiB is SOIC-8, 8MiB is SOIC-16. -I will refer to three computers: +@strong{The T400 laptops come with the ME (and sometimes AMT in addition) before +flashing libreboot. Libreboot disables and removes it by using a modified +descriptor: see @ref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains +notes, plus instructions) -@itemize -@item -@strong{host} - this is the computer you use, have tools, compiler, Internet, etc -@item -@strong{BBB} - Beaglebone Black (rev. B or higher, i use rev. C) -@item -@strong{target} - the computer you are trying to install liberboot -@end itemize +Flashing instructions can be found at @ref{How to update/install,flashrom}. @menu -* Find USB port on the target that supports EHCI debug:: -* Initial setup of BBB to act as EHCI debug dongle:: -* Patch BBB's g_dbgp module:: Optional, but highly recommended -* Configure libreboot with EHCI debug:: -* Selecting HCD Index and USB Debug port:: -* How to get the debug logs:: -* Enable EHCI Debug on the target's kernel:: Optional , but recommended -* References:: +* Compatibility without blobs - T400:: LCD compatibility - T400:: Hardware +* register dumps - T400:: @end menu +@node Compatibility without blobs - T400 @c @subsubheading Compatibility +(without blobs) -@node Find USB port on the target that supports EHCI debug -@c @subsubheading Find USB port on the target that supports EHCI debug -Not all USB controllers support EHCI debug (see: @uref{http://www.coreboot.org/EHCI_Debug_Port#Hardware_capability,EHCI Debug Port} ). Even more, if a USB controller supports EHCI debug, it is available only @strong{on a single port} that might or might not be exposed externally. - -@itemize -@item -You need running OS (GNU/Linux) on your target for this step (If you've flashed libreboot and it does not boot, you have to flush back the stock bios) -@item -You need USB memory stick (the data on it will not be touched). -@item -The EHCI debugging can not be done through external hub, BBB must be connected directly to the debug port of the controller (so, no hubs) -@end itemize +@itemize @item Hardware virtualization vt-x -@itemize -@item -Download @xref{1-ehci-ref,,1}, @uref{http://www.coreboot.org/pipermail/coreboot/attachments/20080909/ae11c291/attachment.sh,this} shell script. -@end itemize +The T400, when run without CPU microcode updates in coreboot, currently kernel +panics if running QEMU with vt-x enabled on 2 cores for the guest. With a single +core enabled for the guest, the guest panics (but the host is fine). Working +around this in QEMU might be possible; if not, software virtualization should +work fine (it's just slower). -@enumerate -@item -Plug the usb stick in the first available usb port -@item -Run the script, you will get output similar to following: -@item -The buses the support debug are Bus 3 (0000:00:1a.0) on Port 1 and Bus 4 (0000:00:1d.0) on port 2. Your usb stick is plugged on Bus 1, Port 3 -@item -Repeat the steps, plugging the USB stick in the next available port -@item -Go through all available ports and remember(write down) those for which bus/port of the usb stick matches one of the bus/port that support debug (bold). -@end enumerate +On GM45 hardware (with libreboot), make sure that the @emph{kvm} and +@emph{kvm_intel} kernel modules are not loaded, when using QEMU. -Remember (write down) for each port (external plug) you found that supports debug: @strong{PCI device id, the bus id, the port number, and the physical location of the usb plug.} +The following errata datasheet from Intel might help with investigation: +@uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} -If you do not find a match, you can not get debug over EHCI. Sorry. +The T400 is almost identical to the X200, code-wise. @xref{Lenovo ThinkPad +X200,x200}. @end itemize -@anchor{1-ehci-ref} -The guys from coreboot were talking about including the script in coreboot distribution (check the status). +@node LCD compatibility - T400 @c @subsubheading LCD compatiblity Not all LCD +panels are compatible yet. @xref{LCD compatibility on GM45 laptops,gm45_lcd}. -@node Initial setup of BBB to act as EHCI debug dongle -@c @subsubheading Initial setup of BBB to act as EHCI debug dongle -BBB must be powered with a barrel power connector since the mini-B USB plug will be used for the EHCI debug stream. So you will need: +@node Hardware register dumps - T400 @c @subsubheading Hardware register dumps +The coreboot wiki @uref{http://www.coreboot.org/Motherboard_Porting_Guide,shows} +how to collect various logs useful in porting to new boards. Following are +outputs from the T400: -@itemize -@item -power supply (5V, 2A(10W) is sufficient). -@item -an extra usb cable: A to mini-B +@itemize @item T400 with @strong{Winbond W25X64} flash chip (8MiB, SOIC-16) and +Lenovo BIOS 2.02 (EC firmware 1.01): @itemize @item +@uref{../resources/misc/dumps/logs-t400-bios2.02-ec1.01/,logs-t400-bios2.02-ex1.01} @end itemize -(On BBB) The linux kernel includes module (g_dbgp that enables one of the usb ports on a computer to behave as EHCI debug dongle. Make sure you have this module available on your BBB (Debian 7.8 that comes with BBB should have it), if not, you should compile it yourself (see next section): - -@verbatim -ls /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget/g_dbgp.ko -@end verbatim - -Unload all other g_* modules: - -@verbatim -# lsmod -# rmmod g_multi -... -@end verbatim +@item Version of flashrom used for the external flashing/reading logs is the one +that libreboot git revision c164960 uses. @end itemize -Then load g_dbgp : -@verbatim -# modprobe g_dbgp -# lsmod # should show that g_dbgp is loaded, and no other g_* -@end verbatim +@node Lenovo ThinkPad T500 @subsubsection Lenovo ThinkPad T500 It is believed +that all or most T500 laptops are compatible. See notes about @ref{A note about +CPUs - T500,CPU compatibility} for potential incompatibilities. -Plug the mini-B side of the USB cable in your BBB and the A side in your target. Then one of the usb devices on your target (with lsusb ) should be: +There are two possible flash chip sizes for the T500: 4MiB (32Mbit) or 8MiB +(64Mbit). This can be identified by the type of flash chip below the palmrest: +4MiB is SOIC-8, 8MiB is SOIC-16. -@verbatim -Bus 001 Device 024: ID 0525:c0de Netchip Technology, Inc. -@end verbatim +@strong{The T500 laptops come with the ME (and sometimes AMT in addition) before +flashing libreboot. Libreboot disables and removes it by using a modified +descriptor: see @ref{GM45 chipsets - remove the ME,gm45_remove_me}} (contains +notes, plus instructions) -If you see the device on the target, you are good to continue to the next step. +Flashing instructions can be found at @ref{How to update/install,flashrom}. -@node Patch BBB's g_dbgp module -@c @subsubheading Patch BBB's g_dbgp module (optional, but highly recommended) -For the reasons why you need this, see: @uref{http://www.coreboot.org/EHCI_Gadget_Debug,EHCI Gadget Debug}.@*Make sure that you have cross compiling environment for arm-linux-gnueabihf setup on your @emph{host}. +@menu +* Compatibility without blobs - T500:: LCD compatibility - T500:: Descriptor and +* Gbe differences:: Hardware register dumps - T500:: +@end menu -@itemize -@item -On BBB: uname -r - this will give you version number like 3.8.13-bone70 (I will refer to this as: $mav.$miv-$lv: where mav=3.8, miv=13, lv=bone70 -@item -Get the BBB kernel ready on your host for cross-compiling: -@end itemize +@node Compatibility without blobs - T500 @c @subsubheading Compatibility +(without blobs) @itemize @item Hardware virtualization vt-x -@verbatim -$ cd $work_dir -$ git clone https://github.com/beagleboard/kernel.git -$ cd kernel -$ git checkout $mav (see above) -$ ./patch.sh -$ wget http://arago-project.org/git/projects/?p=am33x-cm3.git\;a=blob_plain\;f=bin/am335x-pm-firmware.bin\;hb=HEAD -O kernel/firmware/am335x-pm-firmware.bin -$ cp configs/beaglebone kernel/arch/arm/configs/beaglebone_defconfig -@end verbatim +The T500, when run without CPU microcode updates in coreboot, currently kernel +panics if running QEMU with vt-x enabled on 2 cores for the guest. With a single +core enabled for the guest, the guest panics (but the host is fine). Working +around this in QEMU might be possible; if not, software virtualization should +work fine (it's just slower). -@itemize -@item -Download the patch from @uref{http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz,here} -@item -tar -xf Ehci-debug-gadget-patches.tar.gz (will create dir: usbdebug-gadget) -@item -Note that there are two patches (patch_1 and patch_2) for each of the two different version of the kernel (3.8 and 3.10). I will use 3.8. (If using kernel 3.12 patch_1 is not needed) -@item -cd kernel (note that this is one more level: you should be in $work_dir/kernel/kernel) -@item -Apply the patches: -@end itemize +On GM45 hardware (with libreboot), make sure that the @emph{kvm} and +@emph{kvm_intel} kernel modules are not loaded, when using QEMU. -@verbatim -git apply ../usbdebug-gadget/v3.8-debug-gadget/0001-usb-dbgp-gadget-Fix-re-connecting-after-USB-disconne.patch -git apply ../usbdebug-gadget/v3.8-debug-gadget/0002-usb-serial-gadget-no-TTY-hangup-on-USB-disconnect-WI.patch -; -make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- beaglebone_defconfig -j4@ -@end verbatim +The following errata datasheet from Intel might help with investigation: +@uref{http://download.intel.com/design/mobile/specupdt/320121.pdf,http://download.intel.com/design/mobile/specupdt/320121.pdf} -@itemize -@item -You should also apply the linux-libre @emph{deblob} script to turn it into linux-libre (deletes all the blobs from the linux kernel). @uref{http://www.fsfla.org/ikiwiki/selibre/linux-libre/,fsfla website} - see @uref{http://www.fsfla.org/svn/fsfla/software/linux-libre/scripts/,scripts}. -@item -Get your current BBB kernel config (from: /boot/config-<ver>) and copy it to your host as $work_dir/kernel/kernel/.config -@item -Set proper version number: -@itemize -@item -On your host, edit $work_dir/kernel/kernel/.config (the one you've just copied from BBB), find the line CONFIG_LOCALVERSION="<something or empty>" and change it to CONFIG_LOCALVERSION="-$lv", so it will look something like: CONFIG_LOCALVERSION="-bone70" -@end itemize +The T500 is almost identical to the X200, code-wise. See @ref{Lenovo ThinkPad +X200,x200}. @end itemize -@item -Also, make sure that: CONFIG_USB_G_DBGP=m (If not, make menuconfig, and set @@Device Drivers-> USB Support -> USB Gadget Support -> EHCI Debug Device Gadget=m -@item -Build the module: -@end itemize +@node LCD compatibility - T500 @c @subsubheading LCD compatibility Not all LCD +panels are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. -@verbatim -$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4 (is it possoble to build only the gadget modules) -$ mkdir ../tmp && make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- INSTALL_MOD_PATH=../tmp modules_install -@end verbatim +@node Descriptor and Gbe differences @c @subsubheading Descriptor and Gbe +differences See +@uref{../resources/misc/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt,descriptor_diff_t500_x200.txt} +and +@uref{../resources/misc/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt,gbe_diff_t500_x200.txt}. -@itemize -@item -on BBB, backup /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget (i.e. mv /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget $HOME) -@item -copy the freshly compiled usb/gadget dir to /lib/modules/3.8.13-bone70/kernel/drivers/usb -@item -restart BBB -@item -Remove all g_* modules (rmmod g_<>) -@item -modprobpe g_dbgp -@end itemize +The patches above are based on the output from ich9deblob on a factory.rom image +dumped from the T500 with a SOIC-8 4MiB flash chip. The patch re-creates the +X200 descriptor/gbe source, so the commands were something like:@* $ +@strong{diff -u t500gbe x200gbe}@* $ @strong{diff -u t500descriptor +x200descriptor} -@node Configure libreboot with EHCI debug -@c @subsubheading Configure libreboot with EHCI debug -Libreboot(coreboot) should be configured with debug turned on and to push debug messages to the EHCI debug port.@*If you've downloaded the binary distribution, you can check if it is properly configured in the following way: +ME VSCC table is in a different place and a different size on the T500. +Libreboot disables and removes the ME anyway, so it doesn't matter. -@itemize -@item -Go to the libreboot dist root directory cd $libreboot_bin -@item -Locate the rom image for your target (I will call it: $img_path) -@item -Running the following command will extract the config in a file ./my_config: -@end itemize +The very same descriptor/gbe used on the X200 (generated by @ref{ICH9 gen +utility,ich9gen}) was re-used on the T500, and it still worked. -@verbatim -./cbfstool/i686/cbfstool $img_path extract -n config -f ./my_config -@end verbatim +@node Hardware register dumps - T500 @c @subsubheading Hardware register dumps +The coreboot wiki @uref{http://www.coreboot.org/Motherboard_Porting_Guide,shows} +how to collect various logs useful in porting to new boards. Following are +outputs from the T500: + +@itemize @item T500 with @strong{Macronix MX25L3205D} flash chip (4MiB, SOIC-8) +and Lenovo BIOS 3.13 7VET83WW (EC firmware 1.06): @itemize @item +@uref{../resources/misc/dumps/t500log/,t500log/} @end itemize -@itemize -@item -Make sure that the following params in the config are set as following: @end itemize -@verbatim -CONFIG_USBDEBUG=y (Generic Drivers -> USB 2.0 EHCI debug dongle support) -CONFIG_USBDEBUG_IN_ROMSTAGE=y (Generic Drivers -> Enable early (pre-RAM) usbdebug) -CONFIG_USBDEBUG_HCD_INDEX=<HCD Index of usb controller - see below> (Generic Drivers -> Index for EHCI controller to use with usbdebug) -CONFIG_USBDEBUG_DEFAULT_PORT=<USB Debug port - see below> (Generic Drivers -> Default USB port to use as Debug Port) -@end verbatim -The following three are behind radio button in the menu. Only the first one @xref{2-ehci-ref,,2}, should be = y +@node Apple Macbook1-1 @subsubsection Information about the macbook1,1 There is +an Apple laptop called the macbook1,1 from 2006 which uses the same i945 chipset +as the ThinkPad X60/T60. A developer ported the @ref{Apple +Macbook2-1,MacBook2@,1} to coreboot, the ROM images also work on the macbook1,1. -@verbatim -USBDEBUG_DONGLE_STD=y (Generic Drivers -> Type of dongle (Net20DC or compatible) -> Net20DC or compatible) -CONFIG_USBDEBUG_DONGLE_BEAGLEBONE=n (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone) -CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=n (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone Black) -@end verbatim +You can refer to @ref{Apple Macbook2-1,MacBook2@,1} for most of this. Macbook2,1 +laptops come with Core 2 Duo processors which support 64-bit operating systems +(and 32-bit). The MacBook1,1 uses Core Duo processors (supports 32-bit OS but +not 64-bit), and it is believed that this is the only difference. -@anchor{2-ehci-ref} -The g_dbgp module on BeagleBone Black (Rev. C) reports it self as Net20DC, the other options are for older BB(B) - ver1. This is documented @uref{https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/,here} (also tested/verified). +It is believed that all models are compatible, listed here: @itemize @item +@uref{http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1,http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1} +@end itemize -Then:@* +Specifically (Order No. / Model No. / CPU): -@verbatim -CONFIG_CONSOLE_USB=y (Console -> USB dongle console output) -@end verbatim +@itemize @item MA255LL/A / A1181 (EMC 2092) / Core Duo T2500 @strong{(tested - +working)} @item MA254LL/A / A1181 (EMC 2092) / Core Duo T2400 @strong{(tested - +working)} @item MA472LL/A / A1181 (EMC 2092) / Core Duo T2500 (untested) @end +itemize -Also Debugging ---> Output verbose XYZ ) (@strong{FIXME} somebody verify these): +Also of interest: @ref{How to build the ROM images,config_macbook21}. -@verbatim -CONFIG_DEBUG_CBFS=y (Output verbose CBFS debug messages ) -CONFIG_HAVE_DEBUG_RAM_SETUP=y (??? What/where is this) -CONFIG_DEBUG_RAM_SETUP=y (Output verbose RAM init debug messages) -CONFIG_DEBUG_SMI=y (Output verbose SMI debug messages) -CONFIG_DEBUG_ACPI=y (Output verbose ACPI debug messages ) -CONFIG_DEBUG_USBDEBUG=y (Output verbose USB 2.0 EHCI debug dongle messages) -@end verbatim +Unbricking: @uref{https://www.ifixit.com/Device/MacBook_Core_2_Duo,this page +shows disassembly guides} and mono's page (see @ref{Apple +Macbook2-1,MacBook2@,1}) shows the location of the SPI flash chip on the +motherboard. +@uref{https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529,How +to remove the motherboard}. -If some of the above mentioned configuration options are not as specified, you have to configure and compile libreboot yourself. Please refer to the doc(@strong{FIXME: link} about compiling libreboot. +No method is yet known for flashing in GNU/Linux while the Apple firmware is +running. You will need to disassemble the system and flash externally. Reading +from flash seems to work. For external flashing, refer to @ref{How to program an +SPI flash chip with BeagleBone Black,bbb_setup}. -@node Selecting HCD Index and USB Debug port -@c @subsubheading Selecting HCD Index and USB Debug port -This applies (and works) only if the USB controller that supports debug (found in the first section) is from Intel.@*If the PCI ID of the port you found in the first section is 0000:00:1a.0 or 0000:00:1d.0 , you are ok. Otherwise you have to try without guarantee that will work. -If the externally exposed port is on a bus with PCI ID == 0000:00:1a.0 then for CONFIG_USBDEBUG_HCD_INDEX choose 2, otherwise choose 0 . -For CONFIG_USBDEBUG_DEFAULT_PORT choose the port from the first section that correspond to the PCI ID +@node Apple Macbook2-1 @subsubsection Information about the macbook2,1 There is +an Apple laptop called the macbook2,1 from late 2006 or early 2007 that uses the +same i945 chipset as the ThinkPad X60 and ThinkPad T60. A developer ported +coreboot to their macbook2,1, and now libreboot can run on it. -Notes:@*The above is based on the implementation of coreboot/src/southbridge/intel/common/usb_debug.c : pci_ehci_dbg_dev() .@*This is enough as it applies for the supported GM45/G45 Thinkpads. coreboot support some other contollers too, but they are irellevent for libreboot (for now). +Mono Moosbart is the person who wrote the port for macbook2,1. Referenced below +are copies (up to date at the time of writing, 20140630) of the pages that this +person wrote when porting coreboot to the macbook2,1. They are included here in +case the main site goes down for whatever reason, since they include a lot of +useful information. -@itemize -@item -On T500 (with switchable GPU) the debug ports for both intel controllers is exposed. -@item -On x200t the debug ports for both intel controllers is exposed. -@end itemize +Backups created using wget:@* @strong{$ wget -m -p -E -k -K -np +http://macbook.donderklumpen.de/}@* @strong{$ wget -m -p -E -k -K -np +http://macbook.donderklumpen.de/coreboot/}@* Use @strong{-e robots=off} if using +this trick for other sites and the site restricts using robots.txt -@node How to get the debug logs -@c @subsubheading How to get the debug logs -@itemize -@item -Plug the USB cable in the target's debug port (the one you found in step 1) and BBB's mini-B USB -@item -Make sure no other then g_dbgp of the g_* modules is loaded on your BBB -@item -On the BBB: +@strong{Links to wget backups (and the backups themselves) of Mono's pages (see +above) removed temporarily. Mono has given me permission to distribute them, but +I need to ask this person to tell me what license these works fall under first. +Otherwise, the above URLs should be fine. NOTE TO SELF: REMOVE THIS WHEN DONE} +@menu +* Installing GNU/Linux distributions on Apple EFI firmware:: Information about +* coreboot:: coreboot wiki page:: Compatible models:: +@end menu + +@node Installing GNU/Linux distributions on Apple EFI firmware @c @subsubheading +Installing GNU/Linux distributions (on Apple EFI firmware) @itemize @item +Parabola GNU/Linux installation on a macbook2,1 with Apple EFI firmware (this is +a copy of Mono's page, see above) @c ADD REF??? @end itemize + +How to boot an ISO: burn it to a CD (like you would normally) and hold down the +Alt/Control key while booting. The bootloader will detect the GNU/Linux CD as +'Windows' (because Apple doesn't think GNU/Linux exists). Install it like you +normally would. When you boot up again, hold Alt/Control once more. The +installation (on the HDD) will once again be seen as 'Windows'. (it's not +actually Windows, but Apple likes to think that Apple and Microsoft are all that +exist.) Now to install libreboot, follow @ref{MacBook2-1 +install,flashrom_macbook21}. + +@node Information about coreboot @c @subsubheading Information about coreboot +@itemize @item Coreboot on the macbook2,1 (this is a copy of Mono's page, see +above) @end itemize + +@node coreboot wiki page @c @subsubheading coreboot wiki page @itemize @item +@uref{http://www.coreboot.org/Board:apple/macbook21,http://www.coreboot.org/Board:apple/macbook21} @end itemize -@verbatim -stty -icrnl -inlcr -F /dev/ttyGS0 -cat /dev/ttyGS0 -@end verbatim +@node Compatible models @c @subsubheading Compatible models It is believed that +all models are compatible, listed here: -@itemize -@item -Power on the target with libreboot -@item -You should see debug logs comming on your BBB console +@itemize @item +@uref{http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook2,1,http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook2,1} @end itemize -Note that this is not permanent on BBB, if you reboot it, you have to rmmod g_* and modprobe g_dbgp +Specifically (Order No. / Model No. / CPU): + +@itemize @item MA699LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T5600 +@strong{(tested - working)} @item MA701LL/A / A1181 (EMC 2121) / Intel Core 2 +Duo T7200 @strong{(tested - working)} @item MB061LL/A / A1181 (EMC 2139) / Intel +Core 2 Duo T7200 (untested) @item MA700LL/A / A1181 (EMC 2121) / Intel Core 2 +Duo T7200 @strong{(tested - working)} @item MB063LL/A / A1181 (EMC 2139) / Intel +Core 2 Duo T7400 (untested) @item MB062LL/A / A1181 (EMC 2139) / Intel Core 2 +Duo T7400 @strong{(tested - working)} @end itemize -@node Enable EHCI Debug on the target's kernel -@c @subsubheading Enable EHCI Debug on the target's kernel (optional, recommended) -You have to know how to compile kernel for your target. +Also of interest: @ref{How to build the ROM images,config_macbook21}. -@enumerate -@item -Check if early debugging is already enabled: grep CONFIG_EARLY_PRINTK_DBGP /boot/config-<ver> -@item -If enabled, you do not have to compile the kernel (skip this step). Otherwise, prepare kernel source for your distribution and select (Kernel hacking -> Early printk via EHCI debug port). Compile and install the new kernel. -@item -Edit your grub configuration and add following to the kernel parameters @xref{20-ehci-ref,,20}, @xref{21-ehci-ref,21},: earlyprintk=dbgp,keep. Also, try: earlyprintk=dbgp<N>,keep where N is the debug port id if the first does not work. @c TYPO: kenel > kernel -@end enumerate +Unbricking: @uref{https://www.ifixit.com/Device/MacBook_Core_2_Duo,this page +shows disassembly guides} and mono's page (see above) shows the location of the +SPI flash chip on the motherboard. +@uref{https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529,How +to remove the motherboard}. + +For external flashing, refer to @ref{How to program an SPI flash chip with +BeagleBone Black,bbb_setup}. + +You need to replace OS X with GNU/Linux before flashing libreboot. (OSX won't +run at all in libreboot). + +There are some issues with this system (compared to other computers that +libreboot supports): + +This is an apple laptop, so it comes with OS X: it has an Apple keyboard, which +means that certain keys are missing: insert, del, home, end, pgup, pgdown. There +is also one mouse button only. Battery life is poor compared to X60/T60 (for +now). It also has other issues: for example, the Apple logo on the back is a +hole, exposing the backlight, which means that it glows. You should cover it up. + +The system does get a bit hotter compared to when running the original firmware. +It is certainly hotter than an X60/T60. The heat issues have been partially +fixed by the following patch (now merged in libreboot): +@uref{http://review.coreboot.org/#/c/7923/,http://review.coreboot.org/#/c/7923/}. + +@strong{The MacBook2,1 comes with a webcam, which does not work without +proprietary software. Also, webcams are a security risk; cover it up! Or remove +it.} + +A user reported that they could get better response from the touchpad with the +following in their xorg.conf: + +@verbatim Section "InputClass" Identifier "Synaptics Touchpad" Driver +"synaptics" MatchIsTouchpad "on" MatchDevicePath "/dev/input/event*" Driver +"synaptics" +# The next two values determine how much pressure one needs for tapping, moving +# the cursor and other events. + Option "FingerLow" "10" Option "FingerHigh" "15" +# Do not emulate mouse buttons in the touchpad corners. + Option "RTCornerButton" "0" Option "RBCornerButton" "0" Option "LTCornerButton" + "0" Option "LBCornerButton" "0" +# One finger tap = left-click + Option "TapButton1" "1" +# Two fingers tap = right-click + Option "TapButton2" "3" +# Three fingers tap = middle-mouse + Option "TapButton3" "2" +# Try to not count the palm of the hand landing on the touchpad as a tap. Not +# sure if helps. + Option "PalmDetect" "1" +# The following modifies how long and how fast scrolling continues after lifting +# the finger when scrolling + Option "CoastingSpeed" "20" Option "CoastingFriction" "200" +# Smaller number means that the finger has to travel less distance for it to +# count as cursor movement. Larger number prevents cursor shaking. + Option "HorizHysteresis" "10" Option "VertHysteresis" "10" +# Prevent two-finger scrolling. Very jerky movement + Option "HorizTwoFingerScroll" "0" Option "VertTwoFingerScroll" "0" +# Use edge scrolling + Option "HorizEdgeScroll" "1" Option "VertEdgeScroll" "1" EndSection @end + verbatim -@node References -@c @subsubheading References -@c NOTE: Many of these are not referenced above. -@enumerate -@item @anchor{10-ehci-ref} -@uref{http://www.coreboot.org/EHCI_Debug_Port,EHCI Debug Port} +A user reported that the above is only for linux kernel 3.15 or lower. For newer +kernels, the touchpad works fine out of the box, except middle tapping. -@item @anchor{11-ehci-ref} -@uref{https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/,coreboot EHCI debug gadget demonstration} +A user submitted a utility to enable 3-finger tap on this laptop. It's available +at @emph{resources/utilities/macbook21-three-finger-tap} in the libreboot git +repository. The script is for GNOME, confirmed to work in Trisquel 7. -@item @anchor{12-ehci-ref} -@uref{http://www.coreboot.org/EHCI_Gadget_Debug,EHCI Gadget Debug} -@item @anchor{13-ehci-ref} -@uref{http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz,Ehci-debug-gadget-patches.tar.gz} +@node Recommended wifi chipsets @subsection Recommended wifi chipsets The +following are known to work well: @itemize @item +@uref{http://h-node.org/search/results/en/1/search/wifi/ar9285,Atheros AR5B95} +(chipset: Atheros AR9285); mini PCI-E. Most of these are half-height, so you +will need a half>full height mini PCI express adapter/bracket. @item +@uref{http://h-node.org/wifi/view/en/116/Atheros-Communications-Inc--AR928X-Wireless-Network-Adapter--PCI-Express---rev-01-,Atheros +AR928X} chipset; mini PCI-E. Most of these are half-height, so you will need a +half>full height mini PCI express adapter/bracket @item Unex DNUA-93F (chipset: +@uref{http://h-node.org/search/results/en/1/search/wifi/ar9271,Atheros AR9271}); +USB. @item Any of the chipsets listed at +@uref{https://www.fsf.org/resources/hw/endorsement/respects-your-freedom,https://www.fsf.org/resources/hw/endorsement/respects-your-freedom} +@item Any of the chipsets listed at +@uref{http://h-node.org/wifi/catalogue/en/1/1/undef/undef/yes?,http://h-node.org/wifi/catalogue/en/1/1/undef/undef/yes?} +@end itemize -@item @anchor{14-ehci-ref} -@uref{http://wiki.beyondlogic.org/index.php/BeagleBoneBlack_Building_Kernel,Compiling the BeagleBone Black Kernel} +The following was mentioned (on IRC), but it's unknown to the libreboot project +if these work with linux-libre kernel (TODO: test): -@item @anchor{15-ehci-ref} -@uref{http://dumb-looks-free.blogspot.ca/2014/06/beaglebone-black-bbb-compile-kernel.html} +@itemize @item ar5bhb116 ar9382 ABGN @item [0200]: Qualcomm Atheros AR242x / +AR542x Wireless Network Adapter (PCI-Express) [168c:001c] @end itemize -@item @anchor{16-ehci-ref} -@uref{http://dumb-looks-free.blogspot.fr/2014/06/beaglebone-black-bbb-kernal-headers.html} -@item @anchor{17-ehci-ref} -@uref{http://elinux.org/Building_BBB_Kernel,Building BBB Kernel} +@node GM45 chipsets - remove the ME @subsection GM45 chipsets: remove the ME +(manageability engine) This sections relates to disabling and removing the ME +(Intel @strong{M}anagement @strong{E}ngine) on GM45. This was originally done on +the ThinkPad X200, and later adapted for the ThinkPad R400/T400/T500. It can in +principle be done on any GM45 or GS45 system. -@item @anchor{18-ehci-ref} -@uref{http://komposter.com.ua/documents/USB-2.0-Debug-Port%28John-Keys%29.pdf} +The ME is a blob that typically must be left inside the flash chip (in the ME +region, as outlined by the default descriptor). On GM45, it is possible to +remove it without any ill effects. All other parts of coreboot on GM45 systems +(provided GMA MHD4500 / Intel graphics) can be blob-free, so removing the ME was +the last obstacle to make GM45 a feasible target in libreboot (the systems can +also work without the microcode blobs). -@item @anchor{19-ehci-ref} -@uref{http://cs.usfca.edu/~cruse/cs698s10/,Exploring USB at the Hardware/Software Interface} +The ME is removed and disabled in libreboot by modifying the descriptor. More +info about this can be found in the ich9deblob/ich9gen source code in +resources/utilities/ich9deblob/ in libreboot, or more generally on this page. -@item @anchor{20-ehci-ref} -@uref{https://www.kernel.org/doc/Documentation/x86/earlyprintk.txt} +More information about the ME can be found at +@uref{http://www.coreboot.org/Intel_Management_Engine,http://www.coreboot.org/Intel_Management_Engine} +and @uref{http://me.bios.io/Main_Page,http://me.bios.io/Main_Page}. -@item @anchor{21-ehci-ref} -@uref{https://wiki.ubuntu.com/Kernel/Debugging/USBearlyprintk} +Another project recently found: +@uref{http://io.smashthestack.org/me/,http://io.smashthestack.org/me/} -@strong{TODO}: +@menu +* ICH9 gen utility:: ICH9 deblob utility:: demefactory utility:: Notes - GM45 ME +* removal:: +@end menu -@enumerate -@item -grub does not send messages to EHCI debug. Investigate. -@item -The section ``Configure libreboot with EHCI debug'' can be skipped/simplified if a common configuration works for all relevant targets is selected as defualt -@item -Patch and compule g_dbgp on BBB instead cross-compile -@item -Find a simple way to send debug messages from targets userland -@end enumerate -@end enumerate +@node ICH9 gen utility @subsubsection ICH9 gen utility It is no longer necessary +to use @ref{ICH9 deblob utility,ich9deblob} to generate a deblobbed +descriptor+gbe image for GM45 targets. ich9gen is a small utility within +ich9deblob that can generate them from scratch, without a factory.bin dump. +ich9gen executables can be found under ./ich9deblob/ statically compiled in +libreboot_util. If you are using src or git, build ich9gen from source with:@* $ +@strong{./build module ich9deblob}@* The executable will appear under +resources/utilities/ich9deblob/ +Run:@* $ @strong{./ich9gen} -@node KGPE-D16 -@subsubsection Initial flashing instructions for KGPE-D16 +Running ich9gen this way (without any arguments) generates a default +descriptor+gbe image with a generic MAC address. You probably don't want to use +the generic one; the ROM images in libreboot contain a descriptor+gbe image by +default (already inserted) just to prevent or mitigate the risk of bricking your +laptop, but with the generic MAC address (the libreboot project does not know +what your real MAC address is). + +You can find out your MAC address from @strong{ip addr} or @strong{ifconfig} in +GNU/Linux. Alternatively, if you are running libreboot already (with the correct +MAC address in your ROM), dump it (flashrom -r) and read the first 6 bytes from +position 0x1000 (or 0x2000) in a hex editor (or, rename it to factory.rom and +run it in ich9deblob: in the newly created mkgbe.c will be the individual bytes +of your MAC address). If you are currently running the stock firmware and +haven't installed libreboot yet, you can also run that through ich9deblob to get +the mac address. + +An even simpler way to get the MAC address would be to read what's on the little +sticker on the bottom/base of the laptop. + +On GM45 laptops that use flash descriptors, the MAC address or the onboard +ethernet chipset is flashed (inside the ROM image). You should generate a +descriptor+gbe image with your own MAC address inside (with the Gbe checksum +updated to match). Run:@* $ @strong{./ich9gen --macaddress XX:XX:XX:XX:XX:XX}@* +(replace the XX chars with the hexadecimal chars in the MAC address that you +want) -@strong{Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules..} +Two new files will be created: -This guide is for those who want libreboot on their ASUS KGPE-D16 motherboard, while they still have the proprietary ASUS BIOS present. This guide can also be followed (adapted) if you brick you board, to know how to recover. +@itemize @item @strong{ich9fdgbe_4m.bin}: this is for GM45 laptops with the 4MB +flash chip. @item @strong{ich9fdgbe_8m.bin}: this is for GM45 laptops with the +8MB flash chip. @item @strong{ich9fdgbe_16m.bin}: this is for GM45 laptops +with the 16MB flash chip. @end itemize -For more general information about this board, refer to @ref{ASUS KGPE-D16 motherboard,kgpe-d16}. +Assuming that your libreboot image is named @strong{libreboot.rom}, copy the +file to where @strong{libreboot.rom} is located and then insert the +descriptor+gbe file into the ROM image. For 16MiB flash chips:@* $ @strong{dd +if=ich9fdgbe_16m.bin of=libreboot.rom bs=1 count=12k conv=notrunc}@* For 8MiB +flash chips:@* $ @strong{dd if=ich9fdgbe_8m.bin of=libreboot.rom bs=1 count=12k +conv=notrunc}@* For 4MiB flash chips:@* $ @strong{dd if=ich9fdgbe_4m.bin +of=libreboot.rom bs=1 count=12k conv=notrunc}@* -TODO: show photos here, and other info. +Your libreboot.rom image is now ready to be flashed on the system. Refer back to +@ref{How to update/install,flashrom}. for how to flash it. @menu -* KGPE-D16 boards and full systems with libreboot preinstalled:: -* External programmer - KGPE-D16:: +* Write-protecting the flash chip:: @end menu -@node KGPE-D16 boards and full systems with libreboot preinstalled -@c @subsubheading KGPE-D16 boards (and full systems) with libreboot preinstalled -If you don't want to install libreboot yourself, companies exist that sell these boards with libreboot pre-installed, along with a free GNU/Linux distribution. +@node Write-protecting the flash chip @ifinfo @subsubheading Write-protecting +the flash chip @end ifinfo Look in +@emph{resources/utilities/ich9deblob/src/descriptor/descriptor.c} for the +following lines in the @emph{descriptorHostRegionsUnlocked} function: + +@verbatim descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = +0x1; descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; +descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; +descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; +descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; @end +verbatim + +Also look in @emph{resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.c} +for the following lines: + +@verbatim descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = +0x1; /* see ../descriptor/descriptor.c */ +descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; /* see +../descriptor/descriptor.c */ +descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; /* see +../descriptor/descriptor.c */ +descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; /* see +../descriptor/descriptor.c */ +descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; /* see +../descriptor/descriptor.c */ @end verbatim + +NOTE: When you write-protect the flash chip, re-flashing is no longer possible +unless you use dedicated external equipment, which also means disassembling the +laptop. The same equipment can also be used to remove the write-protection later +on, if you choose to do so. *Only* write-protect the chip if you have the right +equipment for external flashing later on; for example, see @ref{How to program +an SPI flash chip with BeagleBone Black,bbb_setup}. + +Change them all to 0x0, then re-compile ich9gen. After you have done that, +follow the notes in @ref{ICH9 deblob utility,ich9gen} to generate a new +descriptor+gbe image and insert that into your ROM image, then flash it. The +next time you boot, the flash chip will be read-only in software (hardware +re-flashing will still work, which you will need for re-flashing the chip after +write-protecting it, to clear the write protection or to flash yet another ROM +image with write protection set in the descriptor). + +Flashrom will tell you that you can still forcefully re-flash, using @emph{-p +internal:ich_spi_force=yes} but this won't actually work; it'll just brick your +laptop. -Check the @uref{../../suppliers,suppliers} page for more information. +For external flashing guides, refer to @ref{Installation}. + +@node ICH9 deblob utility @subsubsection ICH9 deblob utility @strong{This is no +longer strictly necessary. Libreboot ROM images for GM45 systems now contain the +12KiB descriptor+gbe generated from ich9gen, by default.} + +This was the tool originally used to disable the ME on X200 (later adapted for +other systems that use the GM45 chipset). @ref{ICH9 gen utility,ich9gen} now +supersedes it; ich9gen is better because it does not rely on dumping the +factory.rom image (whereas, ich9deblob does). + +This is what you will use to generate the deblobbed descriptor+gbe regions for +your libreboot ROM image. + +If you are working with libreboot_src (or git), you can find the source under +resources/utilities/ich9deblob/ and will already be compiled if you ran +@strong{./build module all} or @strong{./build module ich9deblob} from the main +directory (./), otherwise you can build it like so:@* $ @strong{./build module +ich9deblob}@* An executable file named @strong{ich9deblob} will now appear under +resources/utilities/ich9deblob/ + +If you are working with libreboot_util release archive, you can find the utility +included, statically compiled (for i686 and x86_64 on GNU/Linux) under +./ich9deblob/. + +Place the factory.rom from your system (can be obtained using the external +flashing guides for GM45 targets linked, @pxref{Installation}) in the directory +where you have your ich9deblob executable, then run the tool:@* $ +@strong{./ich9deblob} + +A 12kiB file named @strong{deblobbed_descriptor.bin} will now appear. +@strong{Keep this and the factory.rom stored in a safe location!} The first 4KiB +contains the descriptor data region for your system, and the next 8KiB contains +the gbe region (config data for your gigabit NIC). These 2 regions could +actually be separate files, but they are joined into 1 file in this case. + +A 4KiB file named @strong{deblobbed_4kdescriptor.bin} will alternatively appear, +if no GbE region was detected inside the ROM image. This is usually the case, +when a discrete NIC is used (eg Broadcom) instead of Intel. Only the Intel NICs +need a GbE region in the flash chip. + +Assuming that your libreboot image is named @strong{libreboot.rom}, copy the +@strong{deblobbed_descriptor.bin} file to where @strong{libreboot.rom} is +located and then run:@* $ @strong{dd if=deblobbed_descriptor.bin +of=libreboot.rom bs=1 count=12k conv=notrunc} + +Alternatively, if you got a the @strong{deblobbed_4kdescriptor.bin} file (no GbE +defined), do this: $ @strong{dd if=deblobbed_4kdescriptor.bin of=libreboot.rom +bs=1 count=4k conv=notrunc} -@node External programmer - KGPE-D16 -@c @subsubheading External programmer -Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for a guide on how to set up an external SPI programmer. +The utility will also generate 4 additional files: -The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, which you take out and then re-flash with libreboot, using the programmer. @strong{DO NOT} remove the chip with your hands. Use a chip extractor tool. +@itemize @item mkdescriptor.c @item mkdescriptor.h @item mkgbe.c @item mkgbe.h +@end itemize +These are C source files that can re-generate the very same Gbe and Descriptor +structs (from ich9deblob/ich9gen). To use these, place them in src/ich9gen/ in +ich9deblob, then re-build. The newly built @strong{ich9gen} executable will be +able to re-create the very same 12KiB file from scratch, based on the C structs, +this time @strong{without} the need for a factory.rom dump! +You should now have a @strong{libreboot.rom} image containing the correct 4K +descriptor and 8K gbe regions, which will then be safe to flash. Refer back to +@ref{How to update/install,flashrom}. for how to flash it. +@node demefactory utility @subsubsection demefactory utility This takes a +factory.rom dump and disables the ME/TPM, but leaves the region intact. It also +sets all regions read-write. -@node KCMA-D8 -@subsubsection Initial flashing instructions for KCMA-D8 -@strong{Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules..} +The ME interferes with flash read/write in flashrom, and the default descriptor +locks some regions. The idea is that doing this will remove all of those +restrictions. -This guide is for those who want libreboot on their ASUS KGPE-D16 motherboard, while they still have the proprietary ASUS BIOS present. This guide can also be followed (adapted) if you brick you board, to know how to recover. +Simply run (with factory.rom in the same directory):@* $ @strong{./demefactory} -For more general information about this board, refer to @ref{ASUS KCMA-D8 motherboard,kcma-d8}. +It will generate a 4KiB descriptor file (only the descriptor, no GbE). Insert +that into a factory.rom image (NOTE: do this on a copy of it. Keep the original +factory.rom stored safely somewhere):@* $ @strong{dd +if=demefactory_4kdescriptor.bin of=factory_nome.rom bs=1 count=4k conv=notrunc} -TODO: show photos here, and other info. +TODO: test this.@* TODO: lenovobios (GM45 thinkpads) still write-protects parts +of the flash. Modify the assembly code inside. Note: the factory.rom (BIOS +region) from lenovobios is in a compressed format, which you have to extract. +bios_extract upstream won't work, but the following was said in #coreboot on +freenode IRC: + +@verbatim <roxfan> vimuser: try bios_extract with ffv patch +http://patchwork.coreboot.org/patch/3444/ <roxfan> or +https://github.com/coreboot/bios_extract/blob/master/phoenix_extract.py <roxfan> +what are you looking for specifically, btw? + +0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only. 0x84: +0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked. @end verbatim + +Use-case: a factory.rom image modified in this way would theoretically have no +flash protections whatsoever, making it easy to quickly switch between +factory/libreboot in software, without ever having to disassemble and re-flash +externally unless you brick the device. + +demefactory is part of the ich9deblob src, found at +@emph{resources/utilities/ich9deblob/} + +@node Notes - GM45 ME removal @subsubsection Notes The sections below are +adapted from (mostly) IRC logs related to early development getting the ME +removed on GM45. They are useful for background information. This could not have +been done without sgsit's help. @menu -* KCMA-D8 boards and full systems with libreboot preinstalled:: -* External programmer - KCMA-D8:: +* Early notes:: Flash chips:: Early development notes:: GBE gigabit ethernet +* region in SPI flash:: GBE region - change MAC address:: Flash descriptor +* region:: platform data partition in boot flash factoryrom / lenovo bios:: @end menu -@node KCMA-D8 boards and full systems with libreboot preinstalled -@c @subsubheading KCMA-D8 boards (and full systems) with libreboot preinstalled -@c NOTE: I added this section from ./install/kgpe-d16.texi because it was linked to but nonexistent on website -If you don't want to install libreboot yourself, companies exist that sell these boards with libreboot pre-installed, along with a free GNU/Linux distribution. +@node Early notes @ifinfo @subsubheading Early notes @end ifinfo @itemize @item +@uref{http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf,http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf} +page 230 mentions about descriptor and non-descriptor mode (which wipes out gbe +and ME/AMT). @item textstrikeout@{@strong{See reference to HDA_SDO (disable +descriptor security)@}} strap connected GPIO33 pin is it on ICH9-M (X200). +HDA_SDO applies to later chipsets (series 6 or higher). Disabling descriptor +security also disables the ethernet according to sgsit. sgsit's method involves +use of 'soft straps' (see IRC logs below) instead of disabling the descriptor. +@c ADD STRIKEOUT @item @strong{and the location of GPIO33 on the x200s: (was an +external link. Putting it here instead)} +@uref{../resources/images/x200/gpio33_location.jpg,../resources/images/x200/gpio33_location.jpg} +- it's above the number 7 on TP37 (which is above the big intel chip at the +bottom) @item The ME datasheet may not be for the mobile chipsets but it doesn't +vary that much. This one gives some detail and covers QM67 which is what the +X201 uses: +@uref{http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf,http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf} +@end itemize + +@node Flash chips @ifinfo @subsubheading Flash chips @end ifinfo @itemize @item +Schematics for X200 laptop: +@uref{http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf,http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf} +@strong{textstrikeout@{- Page 20 and page 9 refer to SDA_HDO or SDA_HDOUT@}} +only on series 6 or higher chipsets. ICH9-M (X200) does it with a strap +connected to GPIO33 pin (see IRC notes below)@* - According to page 29, the X200 +can have any of the following flash chips: @itemize @item ATMEL AT26DF321-SU +72.26321.A01 - this is a 32Mb (4MiB) chip @item MXIC (Macronix?) +MX25L3205DM2I-12G 72.25325.A01 - another 32Mb (4MiB) chip @item MXIC (Macronix?) +MX25L6405DMI-12G 41R0820AA - this is a 64Mb (8MiB) chip @item Winbond +W25X64VSFIG 41R0820BA - another 64Mb (8MiB) chip @end itemize + +sgsit says that the X200s with the 64Mb flash chips are (probably) the ones with +AMT (alongside the ME), whereas the 32Mb chips contain only the ME. @item +Schematics for X200s laptop: +@uref{http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf,http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf}. +@end itemize + +@node Early development notes @ifinfo @subsubheading Early development notes +@end ifinfo -Check the @uref{../../suppliers,suppliers} page for more information. +@verbatim -@node External programmer - KCMA-D8 -@c @subsubheading External programmer -Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for a guide on how to set up an external SPI programmer. +Start (hex) End (hex) Length (hex) Area Name ----------- --------- +------------ --------- 00000000 003FFFFF 00400000 Flash Image + +00000000 00000FFF 00001000 Descriptor Region 00000004 0000000F +0000000C Descriptor Map 00000010 0000001B 0000000C Component +Section 00000040 0000004F 00000010 Region Section 00000060 +0000006B 0000000C Master Access Section 00000060 00000063 +00000004 CPU/BIOS 00000064 00000067 00000004 +Manageability Engine (ME) 00000068 0000006B 00000004 GbE LAN +00000100 00000103 00000004 ICH Strap 0 00000104 00000107 +00000004 ICH Strap 1 00000200 00000203 00000004 MCH Strap 0 +00000EFC 00000EFF 00000004 Descriptor Map 2 00000ED0 00000EF7 +00000028 ME VSCC Table 00000ED0 00000ED7 00000008 Flash +device 1 00000ED8 00000EDF 00000008 Flash device 2 00000EE0 +00000EE7 00000008 Flash device 3 00000EE8 00000EEF 00000008 +Flash device 4 00000EF0 00000EF7 00000008 Flash device 5 +00000F00 00000FFF 00000100 OEM Section 00001000 001F5FFF +001F5000 ME Region 001F6000 001F7FFF 00002000 GbE Region 001F8000 +001FFFFF 00008000 PDR Region 00200000 003FFFFF 00200000 BIOS +Region + +Start (hex) End (hex) Length (hex) Area Name ----------- --------- +------------ --------- 00000000 003FFFFF 00400000 Flash Image + +00000000 00000FFF 00001000 Descriptor Region 00000004 0000000F +0000000C Descriptor Map 00000010 0000001B 0000000C Component +Section 00000040 0000004F 00000010 Region Section 00000060 +0000006B 0000000C Master Access Section 00000060 00000063 +00000004 CPU/BIOS 00000064 00000067 00000004 +Manageability Engine (ME) 00000068 0000006B 00000004 GbE LAN +00000100 00000103 00000004 ICH Strap 0 00000104 00000107 +00000004 ICH Strap 1 00000200 00000203 00000004 MCH Strap 0 +00000ED0 00000EF7 00000028 ME VSCC Table 00000ED0 00000ED7 +00000008 Flash device 1 00000ED8 00000EDF 00000008 +Flash device 2 00000EE0 00000EE7 00000008 Flash device 3 +00000EE8 00000EEF 00000008 Flash device 4 00000EF0 00000EF7 +00000008 Flash device 5 00000EFC 00000EFF 00000004 +Descriptor Map 2 00000F00 00000FFF 00000100 OEM Section 00001000 +00002FFF 00002000 GbE Region 00003000 00202FFF 00200000 BIOS +Region + +Build Settings -------------- Flash Erase Size = 0x1000 -The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, which you take out and then re-flash with libreboot, using the programmer. @strong{DO NOT} remove the chip with your hands. Use a chip extractor tool. +@end verbatim +It's a utility called 'Flash Image Tool' for ME 4.x that was used for this. You +drag a complete image into in and the utility decomposes the various components, +allowing you to set soft straps. +This tool is proprietary, for Windows only, but was used to deblob the X200. End +justified means, and the utility is no longer needed since the ich9deblob +utility (documented on this page) can now be used to create deblobbed +descriptors. -@node ThinkPad X60 Recovery Guide -@subsubsection ThinkPad X60: Recovery guide +@node GBE gigabit ethernet region in SPI flash @ifinfo @subsubheading GBE +(gigabit ethernet) region in SPI flash @end ifinfo Of the 8K, about 95% is 0xFF. +The data is the gbe region is fully documented in this public datasheet: +@uref{http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf,http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf} -This section documents how to recover from a bad flash that prevents your ThinkPad X60 from booting. +The only actual content found was: -Types of brick: +@verbatim -@menu -* Bucts not reset - X60:: -* Bad rom or user error - X60:: -@end menu +00 1F 1F 1F 1F 1F 00 08 FF FF 83 10 FF FF FF FF 08 10 FF FF +C3 10 EE 20 AA 17 F5 10 86 80 00 00 01 0D 00 00 00 00 05 06 +20 30 00 0A 00 00 8B 8D 02 06 40 2B 43 00 00 00 F5 10 AD BA +F5 10 BF 10 AD BA CB 10 AD BA AD BA 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 40 +28 12 07 40 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF +FF FF FF FF FF FF D9 F0 20 60 1F 00 02 00 13 00 00 80 1D 00 +FF 00 16 00 DD CC 18 00 11 20 17 00 DD DD 18 00 12 20 17 00 +00 80 1D 00 00 00 1F @end verbatim + +The first part is the MAC address set to all 0x1F. It's repeated haly way +through the 8K area, and the rest is all 0xFF. This is all documented in the +datasheet. + +The GBe region starts at 0x20A000 bytes from the *end* of a factory image and is +0x2000 bytes long. In libreboot (deblobbed) the descriptor is set to put gbe +directly after the initial 4K flash descriptor. So the first 4K of the ROM is +the descriptor, and then the next 8K is the gbe region. @c @menu @c * GBE +region change MAC address:: @c @end menu + +@node GBE region - change MAC address @ifinfo @subsubheading GBE region: change +MAC address @end ifinfo According to the datasheet, it's supposed to add up to +0xBABA but can actually be others on the X200. +@uref{https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums,https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums} + +@emph{"One of those engineers loves classic rock music, so they selected +0xBABA"} + +In honour of the song @emph{Baba O'Reilly} by @emph{The Who} apparently. We're +not making this stuff up... + +0x3ABA, 0x34BA, 0x40BA and more have been observed in the main Gbe regions on +the X200 factory.rom dumps. The checksums of the backup regions match BABA, +however. + +By default, the X200 (as shipped by Lenovo) actually has an invalid main gbe +checksum. The backup gbe region is correct, and is what these systems default +to. Basically, you should do what you need on the *backup* gbe region, and then +correct the main one by copying from the backup. -@node Bucts not reset - X60 -@c @subsubheading Brick type 1: bucts not reset. -You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.@*@* In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:@* @image{../resources/images/x60_unbrick/0004,,,,jpg}@*@* *Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):@* dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k@* dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump@* dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc@* (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, using those instructions: @uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}. +Look at resources/utilities/ich9deblob/ich9deblob.c. -@node Bad rom or user error - X60 -@c @subsubheading Brick type 2: Bad rom (or user error), system won't boot -In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. +@itemize @item Add the first 0x3F 16bit numbers (unsigned) of the GBe descriptor +together (this includes the checksum value) and that has to add up to 0xBABA. In +other words, the checksum is 0xBABA minus the total of the first 0x3E 16bit +numbers (unsigned), ignoring any overflow. @end itemize -"Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). +@node Flash descriptor region @ifinfo @subsubheading Flash descriptor region +@end ifinfo +@uref{http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf,http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf} +from page 850 onwards. This explains everything that is in the flash descriptor, +which can be used to understand what libreboot is doing about modifying it. -Remove those screws:@* @image{../resources/images/x60_unbrick/0000,,,,jpg} @c IMAGES +How to deblob: -Push the keyboard forward (carefully):@* @image{../resources/images/x60_unbrick/0001,,,,jpg} +@itemize @item patch the number of regions present in the descriptor from 5 - 3 +@item originally descriptor + bios + me + gbe + platform @item modified = +descriptor + bios + gbe @item the next stage is to patch the part of the +descriptor which defines the start and end point of each section @item then cut +out the gbe region and insert it just after the region @item all this can be +substantiated with public docs (ICH9 datasheet) @item the final part is flipping +2 bits. Halting the ME via 1 MCH soft strap and 1 ICH soft strap @item the part +of the descriptor described there gives the base address and length of each +region (bits 12:24 of each address) @item to disable a region, you set the base +address to 0xFFF and the length to 0 @item and you change the number of regions +from 4 (zero based) to 2 @end itemize + +There's an interesting parameter called 'ME Alternate disable', which allows the +ME to only handle hardware errata in the southbridge, but disables any other +functionality. This is similar to the 'ignition' in the 5 series and higher but +using the standard firmware instead of a small 128K version. Useless for +libreboot, though. + +To deblob GM45, you chop out the platform and ME regions and correct the +addresses in flReg1-4. Then you set meDisable to 1 in ICHSTRAP0 and MCHSTRAP0. -Lift the keyboard up and disconnect it from the board:@* @image{../resources/images/x60_unbrick/0002,,,,jpg} +How to patch the descriptor from the factory.rom dump -Grab the right-hand side of the chassis and force it off (gently) and pry up the rest of the chassis:@* @image{../resources/images/x60_unbrick/0003,,,,jpg} +@itemize @item map the first 4k into the struct (minus the gbe region) @item set +NR in FLMAP0 to 2 (from 4) @item adjust BASE and LIMIT in flReg1,2,3,4 to +reflect the new location of each region (or remove them in the case of Platform +and ME) @item set meDisable to 1/true in ICHSTRAP0 and MCHSTRAP0 @item extract +the 8k GBe region and append that to the end of the 4k descriptor @item output +the 12k concatenated chunk @item Then it can be dd'd into the first 12K part of +a coreboot image. @item the GBe region always starts 0x20A000 bytes from the +end of the ROM @end itemize -You should now have this:@* @image{../resources/images/x60_unbrick/0004,,,,jpg} +This means that libreboot's descriptor region will simply define the following +regions: -Disconnect the wifi antenna cables, the modem cable and the speaker:@* @image{../resources/images/x60_unbrick/0005,,,,jpg} +@itemize @item descriptor (4K) @item gbe (8K) @item bios (rest of flash chip. +CBFS also set to occupy this whole size) @end itemize -Unroute the cables along their path, carefully lifting the tape that holds them in place. Then, disconnect the modem cable (other end) and power connection and unroute all the cables so that they dangle by the monitor hinge on the right-hand side:@* @image{../resources/images/x60_unbrick/0006,,,,jpg} +The data in the descriptor region is little endian, and it represents bits 24:12 +of the address (bits 12-24, written this way since bit 24 is nearer to left than +bit 12 in the binary representation). -Disconnect the monitor from the motherboard, and unroute the grey antenna cable, carefully lifting the tape that holds it into place:@* @image{../resources/images/x60_unbrick/0008,,,,jpg} +So, @emph{x << 12 = address} -Carefully lift the remaining tape and unroute the left antenna cable so that it is loose:@* @image{../resources/images/x60_unbrick/0009,,,,jpg} +If it's in descriptor mode, then the first 4 bytes will be 5A A5 F0 0F. -Remove the screw that is highlighted (do NOT remove the other one; it holds part of the heatsink (other side) into place):@* @image{../resources/images/x60_unbrick/0011,,,,jpg} +@node platform data partition in boot flash factoryrom / lenovo bios @ifinfo +@subsubheading platform data partition in boot flash (factory.rom / lenovo bios) +@end ifinfo Basically useless for libreboot, since it appears to be a blob. +Removing it didn't cause any issues in libreboot. -Remove those screws:@* @image{../resources/images/x60_unbrick/0012,,,,jpg} +This is a 32K region from the factory image. It could be data (non-functional) +that the original Lenovo BIOS used, but we don't know. -Carefully remove the plate, like so:@* @image{../resources/images/x60_unbrick/0013,,,,jpg} +It has only a 448 byte fragment different from 0x00 or 0xFF. -Remove the SATA connector:@* @image{../resources/images/x60_unbrick/0014,,,,jpg} -Now remove the motherboard (gently) and cast the lcd/chassis aside:@* @image{../resources/images/x60_unbrick/0015,,,,jpg} +@node LCD compatibility on GM45 laptops @subsection LCD compatibility on GM45 +laptops On the T400 and T500 (maybe others), some of the higher resolution +panels (e.g. 1440x900, 1680x1050, 1920x1200) fail in libreboot. -Lift back that tape and hold it with something. Highlighted is the SPI flash chip:@* @image{../resources/images/x60_unbrick/0016,,,,jpg} +@strong{All X200/X200S/X200T LCD panels are believed to be compatible.} -Now wire up the BBB and the Pomona with your PSU.@* Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to setup the BBB for flashing.@* @strong{Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60: if you don't have or don't want to use an external PSU, then make sure not to connect the 3.3v leads mentioned in the guide; instead, connect the AC adapter (the one that normally charges your battery) so that the board has power (but don't boot it up)} @image{../resources/images/x60_unbrick/0017,,,,jpg}@* Correlate the following with the BBB guide linked above: +@menu +* The problem:: Current workaround:: Differences in dmesg:: +@end menu -@verbatim -POMONA 5250: -=== golden finger and wifi switch ==== - 18 - - 1 - 22 - - NC ---------- audio jacks are on this end - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip -=== CPU fan === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim -Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was used):@* @image{../resources/images/x60/th_bbb_flashing,,,,jpg} +@node The problem @subsubsection The problem In some cases, backlight turns on +during boot, sometimes not. In all cases, no display is shown in GRUB, nor in +GNU/Linux. -Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, libreboot also distributes flashrom source code which can be built. +@node Current workaround @subsubsection Current workaround Libreboot (git, and +releases after 20150518) now automatically detect whether to use single or dual +link LVDS configuration. If you're using an older version, use the instructions +below. In practise, this means that you'll get a visual display when booting +GNU/Linux, but not in GRUB (payload). -SSH'd into the BBB:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom} +The i915 module in the Linux kernel also provides an option to set the LVDS link +configuration. i915.lvds_channel_mode:Specify LVDS channel mode (0=probe BIOS +[default], 1=single-channel, 2=dual-channel) (int) - from /sbin/modinfo i915 - +use @strong{i915.lvds_channel_mode=2} as a kernel option in grub.cfg. -It should be @strong{Verifying flash... VERIFIED} at the end. If flashrom complains about multiple flash chip definitions detected, then choose one of them following the instructions in the output. +@node Differences in dmesg @subsubsection Differences in dmesg (kernel parameter +added) +@uref{https://01.org/linuxgraphics/documentation/how-report-bugs,https://01.org/linuxgraphics/documentation/how-report-bugs} -Remove the programmer and put it away somewhere. Put back the tape and press firmly over it:@* @image{../resources/images/x60_unbrick/0026,,,,jpg} +These panels all work in the original firmware, so the idea is to see what +differences there are in how coreboot handles them. -Your empty chassis:@* @image{../resources/images/x60_unbrick/0027,,,,jpg} +@uref{http://www.coreboot.org/pipermail/coreboot/attachments/20150712/d2e214bb/attachment-0002.txt,dmesg +with coreboot-libre} (coreboot) - See: @emph{[drm:intel_lvds_init] detected +single-link lvds configuration} -Put the motherboard back in:@* @image{../resources/images/x60_unbrick/0028,,,,jpg} +@uref{http://www.coreboot.org/pipermail/coreboot/attachments/20150712/d2e214bb/attachment-0003.txt,dmesg +with lenovobios} (lenovobios) - For the same line, it says dual-channel lvds +configuration. @menu +* EDID:: +@end menu -Reconnect SATA:@* @image{../resources/images/x60_unbrick/0029,,,,jpg} +@node EDID @ifinfo @subsubheading EDID @end ifinfo One T500 had a screen +(1920x1200) that is currently incompatible. Working to fix it. EDID: + +@verbatim user@user-ThinkPad-T500:~/Desktop$ sudo i2cdump -y 2 0x50 No size +specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e +f 0123456789abcdef 00: XX ff ff ff ff ff ff 00 30 ae 55 40 00 00 00 00 +X.......0?U@.... 10: 00 11 01 03 80 21 15 78 ea ba 70 98 59 52 8c 28 +.????!?x??p?YR?( 20: 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 +%PT...?????????? 30: 01 01 01 01 01 01 e7 3a 80 8c 70 b0 14 40 1e 50 +???????:??p??@?P 40: 24 00 4b cf 10 00 00 19 16 31 80 8c 70 b0 14 40 +$.K??..??1??p??@ 50: 1e 50 24 00 4b cf 10 00 00 19 00 00 00 0f 00 d1 +?P$.K??..?...?.? 60: 0a 32 d1 0a 28 11 01 00 32 0c 00 00 00 00 00 fe +?2??(??.2?.....? 70: 00 4c 50 31 35 34 57 55 31 2d 54 4c 42 31 00 9a +.LP154WU1-TLB1.? 80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ 90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ @end verbatim + +What happens: backlight turns on at boot, then turns off. At no point is there a +working visual display. -Put the plate back and re-insert those screws:@* @image{../resources/images/x60_unbrick/0030,,,,jpg} +Another incompatible screen (EDID) 1680 x 1050 with the same issue: -Re-route that antenna cable around the fan and apply the tape:@* @image{../resources/images/x60_unbrick/0031,,,,jpg} +@verbatim EDID: 00 ff ff ff ff ff ff 00 30 ae 53 40 00 00 00 00 00 11 01 03 80 +21 15 78 ea cd 75 91 55 4f 8b 26 21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 +01 01 01 01 01 01 a8 2f 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 b7 27 90 +e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 00 00 00 0f 00 b3 0a 32 b3 0a 28 14 +01 00 4c a3 50 33 00 00 00 fe 00 4c 54 4e 31 35 34 50 33 2d 4c 30 32 0a 00 7e +Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 30 +ae 53 40 00 00 00 00 00 11 version: 01 03 basic params: 80 21 15 78 +ea chroma info: cd 75 91 55 4f 8b 26 21 50 54 established: 00 00 00 +standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: +a8 2f 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 descriptor 2: b7 27 90 +e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 descriptor 3: 00 00 00 0f 00 b3 +0a 32 b3 0a 28 14 01 00 4c a3 50 33 descriptor 4: 00 00 00 fe 00 4c 54 4e 31 +35 34 50 33 2d 4c 30 32 0a extensions: 00 checksum: 7e + +Manufacturer: LEN Model 4053 Serial Number 0 Made week 0 of 2007 EDID version: +1.3 Digital display Maximum image size: 33 cm x 21 cm Gamma: 220% Check DPMS +levels DPMS levels: Standby Suspend Off Supported color formats: RGB 4:4:4, +YCrCb 4:2:2 First detailed timing is preferred timing Established timings +supported: Standard timings supported: Detailed timings Hex of detail: +a82f90e0601a1040204013004bcf10000019 Did detailed timing Detailed mode (IN HEX): +Clock 122000 KHz, 14b mm x cf mm 0690 06b0 06f0 0770 hborder 0 041a 041b 041e +042a vborder 0 -hsync -vsync Hex of detail: b72790e0601a1040204013004bcf10000019 +Detailed mode (IN HEX): Clock 122000 KHz, 14b mm x cf mm 0690 06b0 06f0 0770 +hborder 0 041a 041b 041e 042a vborder 0 -hsync -vsync Hex of detail: +0000000f00b30a32b30a281401004ca35033 Manufacturer-specified data, tag 15 Hex of +detail: 000000fe004c544e31353450332d4c30320a ASCII string: LTN154P3-L02 Checksum +Checksum: 0x7e (valid) WARNING: EDID block does NOT fully conform to EDID 1.3. +Missing name descriptor Missing monitor ranges bringing up panel at resolution +1680 x 1050 Borders 0 x 0 Blank 224 x 16 Sync 64 x 3 Front porch 32 x 1 Spread +spectrum clock Single channel Polarities 1, 1 Data M1=2132104, N1=8388608 Link +frequency 270000 kHz Link M1=236900, N1=524288 Pixel N=9, M1=24, M2=8, P1=1 +Pixel clock 243809 kHz waiting for panel powerup panel powered up @end verbatim -Route the cable here and then (not shown, due to error on my part) reconnect the monitor cable to the motherboard and re-insert the screws:@* @image{../resources/images/x60_unbrick/0032,,,,jpg} +Another incompatible (T400) screen: -Re-insert that screw:@* @image{../resources/images/x60_unbrick/0033,,,,jpg} +@verbatim No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 +9 a b c d e f 0123456789abcdef 00: XX ff ff ff ff ff ff 00 30 ae 33 40 +00 00 00 00 X.......0?3@.... 10: 00 0f 01 03 80 1e 13 78 ea cd 75 91 55 4f +8b 26 .??????x??u?UO?& 20: 21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 +!PT...?????????? 30: 01 01 01 01 01 01 b0 27 a0 60 51 84 2d 30 30 20 +???????'?`Q?-00 40: 36 00 2f be 10 00 00 19 d5 1f a0 40 51 84 1a 30 +6./??..????@Q??0 50: 30 20 36 00 2f be 10 00 00 19 00 00 00 0f 00 90 0 +6./??..?...?.? 60: 0a 32 90 0a 28 14 01 00 4c a3 42 44 00 00 00 fe +?2??(??.L?BD...? 70: 00 4c 54 4e 31 34 31 57 44 2d 4c 30 35 0a 00 32 +.LTN141WD-L05?.2 80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ 90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ @end verbatim + +For comparison, here is a working display (T400 screen, but was connected to a +T500. Some T500 displays also work, but no EDID available on this page yet): + +@verbatim EDID: 00 ff ff ff ff ff ff 00 30 ae 31 40 00 00 00 00 00 12 01 03 80 +1e 13 78 ea b3 85 95 58 53 8a 28 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 +01 01 01 01 01 01 26 1b 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 8b 16 00 +7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 00 00 00 0f 00 81 0a 32 81 0a 28 14 +01 00 30 e4 28 01 00 00 00 fe 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 00 d8 +Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 30 +ae 31 40 00 00 00 00 00 12 version: 01 03 basic params: 80 1e 13 78 +ea chroma info: b3 85 95 58 53 8a 28 25 50 54 established: 00 00 00 +standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: +26 1b 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 descriptor 2: 8b 16 00 +7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 descriptor 3: 00 00 00 0f 00 81 +0a 32 81 0a 28 14 01 00 30 e4 28 01 descriptor 4: 00 00 00 fe 00 4c 50 31 34 +31 57 58 33 2d 54 4c 52 31 extensions: 00 checksum: d8 + +Manufacturer: LEN Model 4031 Serial Number 0 Made week 0 of 2008 EDID version: +1.3 Digital display Maximum image size: 30 cm x 19 cm Gamma: 220% Check DPMS +levels DPMS levels: Standby Suspend Off Supported color formats: RGB 4:4:4, +YCrCb 4:2:2 First detailed timing is preferred timing Established timings +supported: Standard timings supported: Detailed timings Hex of detail: +261b007d502016303020360030be10000018 Did detailed timing Detailed mode (IN HEX): +Clock 69500 KHz, 130 mm x be mm 0500 0530 0550 057d hborder 0 0320 0323 0329 +0336 vborder 0 -hsync -vsync Hex of detail: 8b16007d502016303020360030be10000018 +Detailed mode (IN HEX): Clock 69500 KHz, 130 mm x be mm 0500 0530 0550 057d +hborder 0 0320 0323 0329 0336 vborder 0 -hsync -vsync Hex of detail: +0000000f00810a32810a2814010030e42801 Manufacturer-specified data, tag 15 Hex of +detail: 000000fe004c503134315758332d544c5231 ASCII string: LP141WX3-TLR1 +Checksum Checksum: 0xd8 (valid) WARNING: EDID block does NOT fully conform to +EDID 1.3. Missing name descriptor Missing monitor ranges bringing up panel at +resolution 1280 x 800 Borders 0 x 0 Blank 125 x 22 Sync 32 x 6 Front porch 48 x +3 Spread spectrum clock Single channel Polarities 1, 1 Data M1=1214600, +N1=8388608 Link frequency 270000 kHz Link M1=134955, N1=524288 Pixel N=10, +M1=14, M2=11, P1=1 Pixel clock 138857 kHz waiting for panel powerup panel +powered up @end verbatim -Route the black antenna cable like so:@* @image{../resources/images/x60_unbrick/0034,,,,jpg} +Another compatible T400 screen: -Tuck it in neatly like so:@* @image{../resources/images/x60_unbrick/0035,,,,jpg} +@verbatim trisquel@trisquel:~$ sudo i2cdump -y 2 0x50 No size specified (using +byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f +0123456789abcdef 00: 00 ff ff ff ff ff ff 00 30 ae 31 40 00 00 00 00 +........0?1@.... 10: 00 12 01 03 80 1e 13 78 ea b3 85 95 58 53 8a 28 +.??????x????XS?( 20: 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 +%PT...?????????? 30: 01 01 01 01 01 01 26 1b 00 7d 50 20 16 30 30 20 +??????&?.}P ?00 40: 36 00 30 be 10 00 00 18 8b 16 00 7d 50 20 16 30 +6.0??..???.}P ?0 50: 30 20 36 00 30 be 10 00 00 18 00 00 00 0f 00 81 0 +6.0??..?...?.? 60: 0a 32 81 0a 28 14 01 00 30 e4 28 01 00 00 00 fe +?2??(??.0?(?...? 70: 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 00 d8 +.LP141WX3-TLR1.? 80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ 90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff +................ @end verbatim -Route the modem cable like so:@* @image{../resources/images/x60_unbrick/0036,,,,jpg} -Connect modem cable to board and tuck it in neatly like so:@* @image{../resources/images/x60_unbrick/0037,,,,jpg} -Route the power connection and connect it to the board like so:@* @image{../resources/images/x60_unbrick/0038,,,,jpg} -Route the antenna and modem cables neatly like so:@* @image{../resources/images/x60_unbrick/0039,,,,jpg} -Connect the wifi antenna cables. At the start of the tutorial, this system had an Intel wifi chip. Here you see I've replaced it with an Atheros AR5B95 (supports 802.11n and can be used without blobs):@* @image{../resources/images/x60_unbrick/0040,,,,jpg} +@node Installation @section Installing libreboot This section relates to +installing libreboot on supported targets. -Connect the modem cable:@* @image{../resources/images/x60_unbrick/0041,,,,jpg} +NOTE: if running flashrom -p internal for software based flashing, and you get +an error related to /dev/mem access, you should reboot with iomem=relaxed kernel +parameter before running flashrom, or use a kernel that has CONFIG_STRICT_DEVMEM +not enabled. -Connect the speaker:@* @image{../resources/images/x60_unbrick/0042,,,,jpg} +@c ADD itemize block here to show subsections? -You should now have this:@* @image{../resources/images/x60_unbrick/0043,,,,jpg} +@menu +* Software methods:: Hardware methods:: +@end menu -Re-connect the upper chassis:@* @image{../resources/images/x60_unbrick/0044,,,,jpg} -Re-connect the keyboard:@* @image{../resources/images/x60_unbrick/0045,,,,jpg} +@node Software methods @subsection Software methods -Re-insert the screws that you removed earlier:@* @image{../resources/images/x60_unbrick/0046,,,,jpg} -Power on!@* @image{../resources/images/x60_unbrick/0047,,,,jpg} +@menu +* List of ROM images in libreboot:: Pre-compiled images for user convenience +* QEMU:: ROM images for QEMU How to +* update/install:: If you are already running libreboot or +* coreboot ThinkPad X60/T60 install:: Initial installation guide if +* running proprietary firmware MacBook2-1 install:: Initial +* installation guide if running proprietary firmware ASUS Chromebook C201 +* install:: Installing Libreboot internally, from the device +@end menu @c QUESTION: Should the device-specific instructions be moved to their +own nodes on this level? -Trisquel live USB menu (using the GRUB ISOLINUX parser):@* @image{../resources/images/x60_unbrick/0048,,,,jpg} -Trisquel live desktop:@* @image{../resources/images/x60_unbrick/0049,,,,jpg} +@node List of ROM images in libreboot @subsubsection List of ROM images in +libreboot Libreboot distributes pre-compiled ROM images, built from the +libreboot source code. These images are provided for user convenience, so that +they don't have to build anything from source on their own. +The ROM images in each archive use the following at the end of the file name, if +they are built with the GRUB payload: @strong{_@emph{keymap}_@emph{mode}.rom} +Available @emph{modes}: @strong{vesafb} or @strong{txtmode}. The @emph{vesafb} +ROM images are recommended, in most cases; @emph{txtmode} ROM images come with +MemTest86+, which requires text-mode instead of the usual framebuffer used by +coreboot native graphics initialization. -@node ThinkPad X60 Tablet Recovery Guide -@subsubsection ThinkPad X60 Tablet Recovery Guide -This section documents how to recover from a bad flash that prevents your ThinkPad X60 Tablet from booting. +@emph{keymap} can be one of several keymaps that keyboard supports (there are +quite a few), which affects the keyboard layout configuration that is used in +GRUB. It doesn't matter which ROM image you choose here, as far as the keymap in +GNU/Linux is concerned. -Types of brick: +Keymaps are named appropriately according to each keyboard layout support in +GRUB. To learn how these keymaps are created, see @ref{GRUB keyboard layouts - +for reference,grub_keyboard}. -@menu -* Bucts not reset - X60 Tablet:: -* Bad rom or user error - X60 Tablet:: -@end menu +@node QEMU @subsubsection ROM images for QEMU Libreboot comes with ROM images +built for QEMU, by default: -@node Bucts not reset - X60 Tablet -@c @subsubheading Brick type 1: bucts not reset. -You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.@*@* In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:@* @image{../resources/images/x60t_unbrick/0008,,,,JPG}@*@* *Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):@* dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k@* dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump@* dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc@* (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, using those instructions: @uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}. +Examples of how to use libreboot ROM images in QEMU: -@node Bad rom or user error - X60 Tablet -@c @subsubheading Brick type 2: Bad rom (or user error), system won't boot -In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. +@itemize @item $ @strong{qemu-system-i386 -M q35 -m 512 -bios +qemu_q35_ich9_keymap_mode.rom} @item $ @strong{qemu-system-i386 -M pc -m 512 +-bios qemu_i440fx_piix4_keymap_mode.rom} @end itemize -"Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). +You can optionally specify the @strong{-serial stdio} argument, so that QEMU +will emulate a serial terminal on the standard input/output (most likely your +terminal emulator or TTY). -@image{../resources/images/x60t_unbrick/0000,,,,JPG} +Other arguments are available for QEMU. The manual will contain more +information. -Remove those screws:@* @image{../resources/images/x60t_unbrick/0001,,,,JPG} -Remove the HDD:@* @image{../resources/images/x60t_unbrick/0002,,,,JPG} +@node How to update/install @subsubsection How to update or install libreboot +(if you are already running libreboot or coreboot) -Push keyboard forward to loosen it:@* @image{../resources/images/x60t_unbrick/0003,,,,JPG} +On all current targets, updating libreboot can be accomplished without +disassembly and, therefore, without having to externally re-flash using any +dedicated hardware. In other words, you can do everything entirely in software, +directly from the OS that is running on your libreboot system. -Lift:@* @image{../resources/images/x60t_unbrick/0004,,,,JPG} +@strong{If you are using libreboot_src or git, then make sure that you built the +sources first (see @ref{How to build the ROM images,build}).} -Remove those:@* @image{../resources/images/x60t_unbrick/0005,,,,JPG} +Look at the @ref{List of ROM images in libreboot,list of ROM images} to see +which image is compatible with your device. @menu +* Are you currently running the original proprietary firmware?:: ASUS +* KFSN4-DRE?:: ASUS KGPE-D16?:: ASUS KCMA-D8?:: Are you currently running +* libreboot or coreboot?:: MAC address on GM45 X200/R400/T400/T500:: Flash chip +* size:: All good?:: +@end menu -@image{../resources/images/x60t_unbrick/0006,,,,JPG} +@node Are you currently running the original proprietary firmware? @c +@subsubheading Are you currently running the original, proprietary firmware? If +you are currently running the proprietary firmware (not libreboot or coreboot), +then the flashing instructions for your system are going to be different. -Also remove that (marked) and unroute the antenna cables:@* @image{../resources/images/x60t_unbrick/0007,,,,JPG} +X60/T60 users running the proprietary firmware should refer to @ref{ThinkPad +X60/T60 install,flashrom_lenovobios}. MacBook2,1 users running Apple EFI should +refer to @ref{MacBook2-1 install,flashrom_macbook21}. -For some X60T laptops, you have to unroute those too:@* @image{../resources/images/x60t_unbrick/0010,,,,JPG} +X200 users, refer to @ref{ThinkPad X200/X200S/X200T,x200_external}, R400 users +refer to @ref{ThinkPad R400,r400_external}, T400 users refer to @ref{ThinkPad +T400,t400_external}, T500 users refer to @ref{ThinkPad T500,t500_external}. -Remove the LCD extend board screws. Also remove those screws (see blue marks) and remove/unroute the cables and remove the metal plate:@* @image{../resources/images/x60t_unbrick/0008,,,,JPG} +@node ASUS KFSN4-DRE? @c @subsubheading ASUS KFSN4-DRE? Internal flashing +should work just fine, even if you are currently booting the proprietary +firmware. -Remove that screw and then remove the board:@* @image{../resources/images/x60t_unbrick/0009,,,,JPG} +Libreboot currently lacks documentation for externally re-flashing an LPC flash +chip. However, these boards have the flash chip inside of a PLCC socket, and it +is possible to hot-swap the chips. If you want to back up your known-working +image, simply hot-swap the chip for one that is the same capacity, after having +dumped a copy of the current firmware (flashrom -p internal -r +yourchosenname.rom), and then flash that chip with the known-working image. +Check whether the system still boots, and if it does, then it should be safe to +flash the new image (because you now have a backup of the old image). -Now wire up the BBB and the Pomona with your PSU.@* Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to setup the BBB for flashing.@* @strong{Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60 Tablet: if you don't have or don't want to use an external PSU, then make sure not to connect the 3.3v leads mentioned in the guide; instead, connect the AC adapter (the one that normally charges your battery) so that the board has power (but don't boot it up)} @image{../resources/images/x60t_unbrick/0011,,,,JPG}@* Correlate the following with the BBB guide linked above: +Keeping at least one spare LPC PLCC chip with working firmware on it is highly +recommended, in case of bricks. -@verbatim -POMONA 5250: -=== golden finger and wifi switch ==== - 18 - - 1 - 22 - - NC ---------- audio jacks are on this end - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip -=== CPU fan === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim +@strong{DO NOT hot-swap the chip with your bare hands. Use a PLCC chip +extractor. These can be found online. See +@uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} -Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was used):@* @image{../resources/images/x60/th_bbb_flashing,,,,jpg} +Do check the HCL entry: @ref{ASUS KFSN4-DRE motherboard,kfsn4-dre-hcl}. -Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, libreboot also distributes flashrom source code which can be built. +@node ASUS KGPE-D16? @c @subsubheading ASUS KGPE-D16? If you have the +proprietary BIOS, you need to flash libreboot externally. See +@ref{KGPE-D16,kgpe-d16}. -SSH'd into the BBB:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom} +If you already have coreboot or libreboot installed, without write protection on +the flash chip, then you can do it in software (otherwise, see link above). -It should be @strong{Verifying flash... VERIFIED} at the end. If flashrom complains about multiple flash chip definitions detected, then choose one of them following the instructions in the output. +@strong{DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip +extractor. These can be found online. See +@uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} -Reverse the steps to re-assemble your system. +Do check the HCL entry: @ref{ASUS KGPE-D16 motherboard,kgpe-d16-hcl}. +@node ASUS KCMA-D8? @c @subsubheading ASUS KCMA-D8? If you have the +proprietary BIOS, you need to flash libreboot externally. See +@ref{KCMA-D8,kcma-d8}. +If you already have coreboot or libreboot installed, without write protection on +the flash chip, then you can do it in software (otherwise, see link above). -@node ThinkPad T60 Recovery Guide -@subsubsection ThinkPad T60 Recovery Guide -This section documents how to recover from a bad flash that prevents your ThinkPad T60 from booting. +@strong{DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip +extractor. These can be found online. See +@uref{http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools,http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools}} -Types of brick: +Do check the HCL entry: @ref{ASUS KCMA-D8 motherboard,kcma-d8-hcl} -@menu -* Bucts not reset - T60:: -* Bad rom or user error - T60:: -@end menu +@node Are you currently running libreboot or coreboot? @c @subsubheading Are +you currently running libreboot (or coreboot)? X60/T60 users should be fine +with this guide. If you write-protected the flash chip, please refer to +@ref{ThinkPad X60 Recovery Guide,x60_unbrick}, @ref{ThinkPad X60 Tablet Recovery +Guide,x60tablet_unbrick} or @ref{ThinkPad T60 Recovery Guide,t60_unbrick}. +@emph{This probably does not apply to you. Most people do not write-protect the +flash chip, so you probably didn't either.} + +Similarly, it is possible to write-protect the flash chip in coreboot or +libreboot on GM45 laptops (X200/R400/T400/T500). If you did this, then you will +need to use the links above for flashing, treating your laptop as though it +currently has the proprietary firmware (because write-protected SPI flash +requires external re-flashing, as is also the case when running the proprietary +firmware). -@node Bucts not reset - T60 -@c @subsubheading Brick type 1: bucts not reset. -You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.@*@* In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:@* @image{../resources/images/t60_dev/0006,,,,JPG}@*@* *Those dd commands should be applied to all newly compiled T60 ROM images (the ROM images in libreboot binary archives already have this applied!):@* dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k@* dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump@* dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc@* (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, using those instructions: @uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}. (it says x60, but instructions for t60 are identical) +If you did not write-protect the flash chip, or it came to you without any +write-protection (@strong{@emph{libreboot does not write-protect the flash chip +by default, so this probably applies to you}}), read on! -@node Bad rom or user error - T60 -@c @subsubheading bad rom (or user error), system won't boot -In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. +@node MAC address on GM45 X200/R400/T400/T500 @c @subsubheading MAC address on +GM45 (X200/R400/T400/T500) @strong{Users of the X200/R400/T400/T500 take note:} +The MAC address for the onboard ethernet chipset is located inside the flash +chip. Libreboot ROM images for these laptops contain a generic MAC address by +default (00:F5:F0:40:71:FE), but this is not what you want. @emph{Make sure to +change the MAC address inside the ROM image, before flashing it. The +instructions on @ref{ICH9 gen utility,ich9gen} show how to do this.} -"Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). +It is important that you change the default MAC address, before flashing. It +will be printed on a sticker at the bottom of the laptop, or it will be printed +on a sticker next to or underneath the RAM. Alternatively, and assuming that +your current firmware has the correct MAC address in it, you can get it from +your OS. -Remove those screws and remove the HDD:@* @image{../resources/images/t60_dev/0001,,,,JPG} @image{../resources/images/t60_dev/0002,,,,JPG} +@node Flash chip size @c @subsubheading Flash chip size Use this to find out:@* +# @strong{dmidecode | grep ROM\ Size} -Lift off the palm rest:@* @image{../resources/images/t60_dev/0003,,,,JPG} +@node All good? @c @subsubheading All good? Excellent! Moving on... -Lift up the keyboard, pull it back a bit, flip it over like that and then disconnect it from the board:@* @image{../resources/images/t60_dev/0004,,,,JPG} @image{../resources/images/t60_dev/0005,,,,JPG} @image{../resources/images/t60_dev/0006,,,,JPG} +Download the @emph{libreboot_util.tar.xz} archive, and extract it. Inside, you +will find a directory called @emph{flashrom}. This contains statically compiled +executable files of the @emph{flashrom} utility, which you will use to re-flash +your libreboot system. -Gently wedge both sides loose:@* @image{../resources/images/t60_dev/0007,,,,JPG} @image{../resources/images/t60_dev/0008,,,,JPG} +Simply use @emph{cd} on your terminal, to switch to the @emph{libreboot_util} +directory. Inside, there is a script called @emph{flash}, which will detect what +CPU architecture you have (e.g. i686, x86_64) and use the appropriate +executable. It is also possible for you to build these executables from the +libreboot source code archives. -Remove that cable from the position:@* @image{../resources/images/t60_dev/0009,,,,JPG} @image{../resources/images/t60_dev/0010,,,,JPG} +How to update the flash chip contents:@* $ @strong{sudo ./flash update @ref{List +of ROM images in libreboot,yourrom.rom}} -Now remove that bezel. Remove wifi, nvram battery and speaker connector (also remove 56k modem, on the left of wifi):@* @image{../resources/images/t60_dev/0011,,,,JPG} +Ocassionally, coreboot changes the name of a given board. If flashrom complains +about a board mismatch, but you are sure that you chose the correct ROM image, +then run this alternative command:@* $ @strong{sudo ./flash forceupdate +@ref{List of ROM images in libreboot,yourrom.rom}} -Remove those screws:@* @image{../resources/images/t60_dev/0012,,,,JPG} +You should see @strong{"Verifying flash... VERIFIED."} written at the end of the +flashrom output. @strong{Shut down} after you see this, and then boot up again +after a few seconds. -Disconnect the power jack:@* @image{../resources/images/t60_dev/0013,,,,JPG} -Remove nvram battery:@* @image{../resources/images/t60_dev/0014,,,,JPG} +@node ThinkPad X60/T60 install @subsubsection ThinkPad X60/T60: Initial +installation guide (if running the proprietary firmware) @strong{This is for the +ThinkPad X60 and T60 while running Lenovo BIOS. If you already have coreboot or +libreboot running, then go to @ref{How to update/install,flashrom} instead!} -Disconnect cable (for 56k modem) and disconnect the other cable:@* @image{../resources/images/t60_dev/0015,,,,JPG} @image{../resources/images/t60_dev/0016,,,,JPG} +@strong{If you are flashing a Lenovo ThinkPad T60, be sure to read +@ref{Supported T60 list,supported_t60_list}} -Disconnect speaker cable:@* @image{../resources/images/t60_dev/0017,,,,JPG} +@strong{If you are using libreboot_src or git, then make sure that you built the +sources first (see @ref{How to build the ROM images,build}).} -Disconnect the other end of the 56k modem cable:@* @image{../resources/images/t60_dev/0018,,,,JPG} +@strong{Warning: this guide will not instruct the user how to backup the +original Lenovo BIOS firmware. These backups are tied to each system, and will +not work on any other. For that, please refer to +@uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}.} -Make sure you removed it:@* @image{../resources/images/t60_dev/0019,,,,JPG} +@strong{If you're using libreboot 20150518, note that there is a mistake in the +flashing script. do this: @emph{rm -f patch && wget -O flash +http://git.savannah.gnu.org/cgit/libreboot.git/plain/flash?id=910b212e90c6f9c57025e1c7b0c08897af787496 +&& chmod +x flash}} -Unscrew those:@* @image{../resources/images/t60_dev/0020,,,,JPG} +The first half of the procedure is as follows:@* $ @strong{sudo ./flash +i945lenovo_firstflash @ref{List of ROM images in libreboot,yourrom.rom}.} -Make sure you removed those:@* @image{../resources/images/t60_dev/0021,,,,JPG} +You should see within the output the following:@* @strong{"Updated BUC.TS=1 - +64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are swapped"}. -Disconnect LCD cable from board:@* @image{../resources/images/t60_dev/0022,,,,JPG} +You should also see within the output the following:@* @strong{"Your flash chip +is in an unknown state"}, @strong{"FAILED"} and @strong{"DO NOT REBOOT OR +POWEROFF"}@* Seeing this means that the operation was a @strong{resounding} +success! @strong{DON'T PANIC}. -Remove those screws then remove the LCD assembly:@* @image{../resources/images/t60_dev/0023,,,,JPG} @image{../resources/images/t60_dev/0024,,,,JPG} @image{../resources/images/t60_dev/0025,,,,JPG} +See this link for more details: +@uref{http://thread.gmane.org/gmane.linux.bios.flashrom/575,http://thread.gmane.org/gmane.linux.bios.flashrom/575}. -Once again, make sure you removed those:@* @image{../resources/images/t60_dev/0026,,,,JPG} +If the above is what you see, then @strong{SHUT DOWN}. Wait a few seconds, and +then boot; libreboot is running, but there is a 2nd procedure @strong{*needed*} +(see below). -Remove the shielding containing the motherboard, then flip it over. Remove these screws, placing them on a steady surface in the same layout as they were in before you removed them. Also, you should mark each screw hole after removing the screw (a permanent marker pen will do), this is so that you have a point of reference when re-assembling the system:@* @image{../resources/images/t60_dev/0027,,,,JPG} @image{../resources/images/t60_dev/0028,,,,JPG} @image{../resources/images/t60_dev/0029,,,,JPG} @image{../resources/images/t60_dev/0031,,,,JPG} @image{../resources/images/t60_dev/0032,,,,JPG} @image{../resources/images/t60_dev/0033,,,,JPG} +When you have booted up again, you must also do this:@* $ @strong{sudo ./flash +i945lenovo_secondflash @ref{List of ROM images in libreboot,yourrom.rom}} -Now wire up the BBB and the Pomona with your PSU.@* Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to setup the BBB for flashing.@* @strong{Note, the guide mentions a 3.3v DC PSU but you don't need this on the T60: if you don't have or don't want to use an external PSU, then make sure not to connect the 3.3v leads mentioned in the guide; instead, connect the AC adapter (the one that normally charges your battery) so that the board has power (but don't boot it up)}@* @image{../resources/images/t60_dev/0030,,,,JPG}@* Correlate the following with the BBB guide linked above: +If flashing fails at this stage, try the following:@* $ @strong{sudo +./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w @ref{List of +ROM images in libreboot,yourrom.rom}} -@verbatim -POMONA 5250: -=== DVD drive ==== - 18 - - 1 - 22 - - NC ---- RAM is on this end - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip -=== audio jacks === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim +You should see within the output the following:@* @strong{"Updated BUC.TS=0 - +128kb address range 0xFFFE0000-0xFFFFFFFF is untranslated"} -Connect the pomona from the BBB to the flash chip. No pics unfortunately. (use the text diagram above). +You should also see within the output the following:@* @strong{"Verifying +flash... VERIFIED."} -Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, libreboot also distributes flashrom source code which can be built. -SSH'd into the BBB:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom} +@node MacBook2-1 install @subsubsection MacBook2,1: Initial installation guide +(if running the proprietary firmware) @strong{If you have a MacBook1,1, refer to +@ref{Apple Macbook1-1,macbook1-1} for flashing instructions.} -It should be @strong{Verifying flash... VERIFIED} at the end. If flashrom complains about multiple flash chip definitions detected, then choose one of them following the instructions in the output. +@strong{This is for the MacBook2,1 while running Apple EFI firmware. If you +already have coreboot or libreboot running, then go to @ref{How to +update/install,flashrom} instead!} -Put those screws back:@* @image{../resources/images/t60_dev/0047,,,,JPG} +Be sure to read the information in @ref{Apple Macbook2-1,macbook2-1}. -Put it back into lower chassis:@* @image{../resources/images/t60_dev/0048,,,,JPG} +@strong{Warning: this guide will not instruct the user how to backup the +original Apple EFI firmware. For that, please refer to +@uref{http://www.coreboot.org/Board:apple/macbook21,http://www.coreboot.org/Board:apple/macbook21}.} -Attach LCD and insert screws (also, attach the lcd cable to the board):@* @image{../resources/images/t60_dev/0049,,,,JPG} +@strong{If you are using libreboot_src or git, then make sure that you built the +sources first (see @ref{How to build the ROM images,build}).} -Insert those screws:@* @image{../resources/images/t60_dev/0050,,,,JPG} +Look at the @ref{List of ROM images in libreboot,list of ROM images} to see +which image is compatible with your device. -On the CPU (and there is another chip south-east to it, sorry forgot to take pic) clean off the old thermal paste (with the alcohol) and apply new (Artic Silver 5 is good, others are good too) you should also clean the heatsink the same way@* @image{../resources/images/t60_dev/0051,,,,JPG} +Use this flashing script, to install libreboot:@* $ @strong{sudo ./flash +i945apple_firstflash @ref{List of ROM images in libreboot,yourrom.rom}} -Attach the heatsink and install the screws (also, make sure to install the AC jack as highlighted):@* @image{../resources/images/t60_dev/0052,,,,JPG} +You should also see within the output the following:@* @strong{"Verifying +flash... VERIFIED."} -Reinstall that upper bezel:@* @image{../resources/images/t60_dev/0053,,,,JPG} +Shut down. -Do that:@* @image{../resources/images/t60_dev/0054,,,,JPG} @image{../resources/images/t60_dev/0055,,,,JPG} -Re-attach modem, wifi, (wwan?), and all necessary cables. Sorry, forgot to take pics. Look at previous removal steps to see where they go back to. +@node ASUS Chromebook C201 install @subsubsection ASUS Chromebook C201 +installation guide -Attach keyboard and install nvram battery:@* @image{../resources/images/t60_dev/0056,,,,JPG} @image{../resources/images/t60_dev/0057,,,,JPG} +These instructions are for installing Libreboot to the ASUS Chromebook C201. +Since the device ships with Coreboot, the installation instructions are the same +before and after flashing Libreboot for the first time. -Place keyboard and (sorry, forgot to take pics) reinstall the palmrest and insert screws on the underside:@* @image{../resources/images/t60_dev/0058,,,,JPG} +@strong{DO NOT BUY THIS LAPTOP YET!!!!!!!!!!! This is intended mainly for +developers at the moment (libreboot developers, and developers of libre +GNU/Linux distributions). This laptop currently has @emph{zero} support from +libre distros. Parabola theoretically supports it, by installing Arch first and +then migrating to Parabola using the migration guide on the Parabola wiki, but +it's not very well tested and does not have many packages - in our opinion, +Parabola does not really support this laptop. There are also several issues. +Read @ref{ASUS Chromebook C201,this page} for more information. This laptop can +still be used reasonably, in freedom, but it requires a lot of work. Most users +will be disappointed.} -It lives!@* @image{../resources/images/t60_dev/0071,,,,JPG} @image{../resources/images/t60_dev/0072,,,,JPG} @image{../resources/images/t60_dev/0073,,,,JPG} +@strong{If you are using libreboot_src or git, then make sure that you built the +sources first (see @ref{How to build the ROM images,build}).} -Always stress test ('stress -c 2' and xsensors. below 90C is ok) when replacing cpu paste/heatsink:@* @image{../resources/images/t60_dev/0074,,,,JPG} +Look at the @ref{List of ROM images in libreboot,list of ROM images} to see +which image is compatible with your device. +Libreboot can be installed internally from the device, with sufficient +privileges. The installation process requires using @strong{Google's modified +version of flashrom}, that has support for reflashing the Chromebook's SPI +flash. Otherwise, flashing externally will work with the upstream flashrom +version. -@node ThinkPad X200/X200S/X200T -@subsubsection Flashing the X200 with a BeagleBone Black -Initial flashing instructions for X200. +@strong{Google's modified version of flashrom} is free software and its source +code is made available by Google: +@uref{https://chromium.googlesource.com/chromiumos/third_party/flashrom/,flashrom}.@* +It is not distributed along with Libreboot yet. However, it is preinstalled on +the device, with ChromeOS. -This guide is for those who want libreboot on their ThinkPad X200 while they still have the original Lenovo BIOS present. This guide can also be followed (adapted) if you brick your X200, to know how to recover. +Installing Libreboot internally requires sufficient privileges on the system +installed on the device.@* When the device has ChromeOS installed (as it does +initially), it is necessary to gain root privileges in ChromeOS, to be able to +access a root shell. @menu -* X200 laptops with libreboot pre-installed:: -* Flash chip size - X200:: -* MAC address - X200:: -* Initial BBB configuration - X200:: -* The procedure - X200:: -* Wifi - X200:: -* WWAN - X200:: -* Memory - X200:: -* Booting - X200:: -* X200S and X200 Tablet users GPIO33 trick will not work:: +* Gaining root privileges on ChromeOS:: Preparing the device for the +* installation:: Installing Libreboot to the SPI flash:: @end menu -@node X200 laptops with libreboot pre-installed -@c @subsubheading X200 laptops with libreboot pre-installed -If you don't want to install libreboot yourself, companies exist that sell these laptops with libreboot pre-installed, along with a free GNU/Linux distribution. +@node Gaining root privileges on ChromeOS @c @subsubheading Gaining root +privileges on ChromeOS -Check the @uref{../../suppliers,suppliers} page for more information. +In order to gain root privileges on ChromeOS, developer mode has to be enabled +from the recovery mode screen and debugging features have to be enabled in +ChromeOS. -@node Flash chip size - X200 -@c @subsubheading Flash chip size - X200 -Use this to find out:@* # @strong{dmidecode | grep ROM\ Size} +Instructions to access the @ref{Recovery mode screen,recovery mode screen} and +@ref{Enabling developer mode,enabling developer mode} are available on the page +dedicated to @ref{Depthcharge,depthcharge}. -The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of the motherboard (this requires removal of the motherboard). @strong{Not all X200S/X200T are supported; see @ref{X200S and X200 Tablet,x200s}.} +Once developer mode is enabled, the device will boot to the @ref{Developer mode +screen,developer mode screen}. ChromeOS can be booted by waiting for 30 seconds +(the delay is shortened in Libreboot) or by pressing @strong{Ctrl + D} +After the system has booted, root access can be enabled by clicking on the +@strong{Enable debugging features} link. A confirmation dialog will ask whether +to proceed.@* After confirming by clicking @strong{Proceed}, the device will +reboot and ask for the root password to set. Finally, the operation has to be +confirmed by clicking @strong{Enable}. -@node MAC address - X200 -@c @subsubheading MAC address - X200 -On the X200/X200S/X200T, the MAC address for the onboard gigabit ethernet chipset is stored inside the flash chip, along with other configuration data. +After setting the root password, it becomes possible to log-in as root. A tty +prompt can be obtained by pressing @strong{Ctrl + Alt + Next}. The @strong{Next} +key is the one on the top left of the keyboard. -Keep a note of the MAC address before disassembly; this is very important, because you will need to insert this into the libreboot ROM image before flashing it. It will be written in one of these locations: +@node Preparing the device for the installation @c @subsubheading Preparing the +device for the installation Before installing Libreboot on the device, both its +software and hardware has to be prepared to allow the installation procedure and +to ensure that security features don't get in the way. -@image{../resources/images/x200/disassembly/0002,,,,jpg} @image{../resources/images/x200/disassembly/0001,,,,jpg} +@menu +* Configuring verified boot parameters:: Removing the write protect screw:: +@end menu -@node Initial BBB configuration - X200 -@c @subsubheading Initial BBB configuration - X200 -Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to set up the BBB for flashing. +@node Configuring verified boot parameters @c @subsubheading Configuring +verified boot parameters It is recommended to have access to the @ref{Developer +mode screen,developer mode screen} and to @ref{Configuring verified boot +parameters for depthcharge,configure the following verified boot parameters}: + +@itemize @item Kernels signature verification: @emph{disabled} @item External +media boot: @emph{enabled} @end itemize + +Those changes can be reverted later, when the device is known to be in a working +state. + +@node Removing the write protect screw @c @subsubheading Removing the write +protect screw Since part of the SPI flash is write-protected by a screw, it is +necessary to remove the screw to remove the write protection and allow writing +Libreboot to the @emph{read-only} part of the flash. + +To access the screw, the device has to be opened. There are 8 screws to remove +from the bottom of the device, as shown on the picture below. Two are hidden +under the top pads. After removing the screws, the keyboard plastic part can be +carefully detached from the rest. @strong{Beware: there are cables attached to +it!} It is advised to flip the keyboard plastic part over, as shown on the +picture below. The write protect screw is located next to the SPI flash chip, +circled in red in the picture below. It has to be removed. + +@uref{../resources/images/c201/screws.jpg,@image{../resources/images/c201/screws,,,Screws,jpg}} +@uref{../resources/images/c201/wp-screw.jpg,@image{../resources/images/c201/wp-screw,,,WP +screw,jpg}} + +The write protect screw can be put back in place later, when the device is known +to be in a working state. + +@node Installing Libreboot to the SPI flash @c @subsubheading Installing +Libreboot to the SPI flash The SPI flash (that holds Libreboot) is divided into +various partitions that are used to implement parts of the CrOS security system. +Libreboot is installed in the @emph{read-only} coreboot partition, that becomes +writable after removing the write-protect screw. @menu +* Installing Libreboot internally from the device:: Installing Libreboot +* externally with a SPI flash programmer:: +@end menu -The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +@node Installing Libreboot internally from the device @c @subsubheading +Installing Libreboot internally, from the device Before installing Libreboot to +the SPI flash internally, the device has to be reassembled. -@verbatim -POMONA 5252 (correlate with the BBB guide) -=== front (display) on your X200 ==== - NC - - 21 - 1 - - 17 - NC - - NC - NC - - NC - NC - - NC - NC - - NC - 18 - - 3.3V (PSU) - 22 - - NC - this is pin 1 on the flash chip -=== back (palmrest) on your X200 === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -Here is a photo of the SOIC-16 flash chip. Pins are labelled: - -@end verbatim +All the files from the @strong{veyron_speedy} release (or build) have to be +transferred to the device. -The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +The following operations have to be executed with root privileges on the device +(e.g. using the @emph{root} account). In addition, the +@strong{cros-flash-replace} script has to be made executable:@* # @strong{chmod +a+x cros-flash-replace}@* -@verbatim -POMONA 5250 (correlate with the BBB guide) -=== left side of the X200 (where the VGA port is) ==== - 18 - - 1 - 22 - - NC - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip. in front of it is the screen. -=== right side of the X200 (where the audio jacks are) === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -Here is a photo of the SOIC-8 flash chip. The pins are labelled: - - -Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16 -chip on those pins? -@end verbatim +The SPI flash has to be read first:@* # @strong{flashrom -p host -r flash.img}@* +@strong{Note: it might be a good idea to copy the produced flash.img file at +this point and store it outside of the device for backup purposes.} -@strong{On the X200S and X200 Tablet the flash chip is underneath the board, in a WSON package. The pinout is very much the same as a SOIC-8, except you need to solder (there are no clips available).@* The following image shows how this is done:}@* @image{../resources/images/x200/wson_soldered,,,,jpg} @* In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead. Check the list of SOIC-8 flash chips at @ref{Flash chips,flashchips} but do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case, the X201 SOIC-8 flash chip (Macronix 25L6445E) might work. +Then, the @strong{cros-flash-replace} script has to be executed as such:@* # +@strong{./cros-flash-replace flash.img coreboot ro-frid}@* If any error is +shown, it is definitely a bad idea to go further than this point. -@node The procedure - X200 -@c @subsubheading The procedure - X200 -This section is for the X200. This does not apply to the X200S or X200 Tablet (for those systems, you have to remove the motherboard completely, since the flash chip is on the other side of the board). +The resulting flash image can then be flashed back:@* # @strong{flashrom -p host +-w flash.img}@* -Remove these screws:@* @image{../resources/images/x200/disassembly/0003,,,,jpg} +You should also see within the output the following:@* @strong{"Verifying +flash... VERIFIED."} -Push the keyboard forward, gently, then lift it off and disconnect it from the board:@* @image{../resources/images/x200/disassembly/0004,,,,jpg} @image{../resources/images/x200/disassembly/0005,,,,jpg} +Shut down. The device will now boot to Libreboot. -Pull the palm rest off, lifting from the left and right side at the back of the palm rest:@* @image{../resources/images/x200/disassembly/0006,,,,jpg} +@node Installing Libreboot externally with a SPI flash programmer @c +@subsubheading Installing Libreboot externally, with a SPI flash programmer +Before installing Libreboot to the SPI flash internally, the device has to be +opened. -Lift back the tape that covers a part of the flash chip, and then connect the clip:@* @image{../resources/images/x200/disassembly/0007,,,,jpg} @image{../resources/images/x200/disassembly/0008,,,,jpg} +The SPI flash is located next to the write protect screw. Its layout is +indicated in the picture below. Note that it is not necessary to connect +@strong{WP#} since removing the screw already connects it to ground. Before +writing to the chip externally, the battery connector has to be detached. It is +located under the heat spreader, that has to be unscrewed from the rest of the +case. The battery connector is located on the right and has colorful cables, as +shown on the picture below. -On pin 2 of the BBB, where you have the ground (GND), connect the ground to your PSU:@* @image{../resources/images/x200/disassembly/0009,,,,jpg} @image{../resources/images/x200/disassembly/0010,,,,jpg} +@uref{../resources/images/c201/spi-flash-layout.jpg,@image{../resources/images/c201/spi-flash-layout,,,SPI +flash layout,jpg}} +@uref{../resources/images/c201/battery-connector.jpg,@image{../resources/images/c201/battery-connector,,,Battery +connector,jpg}} -Connect the 3.3V supply from your PSU to the flash chip (via the clip):@* @image{../resources/images/x200/disassembly/0011,,,,jpg} @image{../resources/images/x200/disassembly/0012,,,,jpg} +All the files from the @strong{veyron_speedy} release (or build) have to be +transferred to the host. -Of course, make sure that your PSU is also plugged in and turn on:@* @image{../resources/images/x200/disassembly/0013,,,,jpg} +The following operations have to be executed with root privileges on the host +(e.g. using the @emph{root} account). In addition, the +@strong{cros-flash-replace} script has to be made executable:@* # @strong{chmod +a+x cros-flash-replace}@* -This tutorial tells you to use an ATX PSU, for the 3.3V DC supply. The PSU used when taking these photos is actually not an ATX PSU, but a PSU that is designed specifically for providing 3.3V DC (an ATX PSU will also work):@* @image{../resources/images/x200/disassembly/0014,,,,jpg} +The SPI flash has to be read first (using the right spi programmer):@* # +@strong{flashrom -p @emph{programmer} -r flash.img}@* @strong{Note: it might be +a good idea to copy the produced flash.img file at this point and store it +outside of the device for backup purposes.} -Now, you should be ready to install libreboot. +Then, the @strong{cros-flash-replace} script has to be executed as such:@* # +@strong{./cros-flash-replace flash.img coreboot ro-frid}@* If any error is +shown, it is definitely a bad idea to go further than this point. -Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, libreboot also distributes flashrom source code which can be built. +The resulting flash image can then be flashed back (using the right spi +programmer):@* # @strong{flashrom -p @emph{programmer} -w flash.img}@* -Log in as root on your BBB, using the instructions in @ref{Accessing the operating system on the BBB,bbb_access}. +You should also see within the output the following:@* @strong{"Verifying +flash... VERIFIED."} -Test that flashrom works:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: +The device will now boot to Libreboot. -@verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. -Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" -Please specify which chip definition to use with the -c <chipname> option. -@end verbatim -How to backup factory.rom (change the -c option as neeed, for your flash chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the @strong{-c} option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware that could be replicated in coreboot and libreboot. -Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM image, this is not what you want. @strong{Make sure to always change the MAC address to one that is correct for your system.} -Now flash it:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} +@node Hardware methods @subsection Hardware methods -@image{../resources/images/x200/disassembly/0015,,,,jpg} +@menu +* How to program an SPI flash chip with BeagleBone Black:: GA-G41M-ES2L flashing +* tutorial:: Flashing Intel D510MO:: Configuring EHCI debugging on the +* BeagleBone Black:: KGPE-D16:: +* Needed if running proprietary firmware, or to unbrick KCMA-D8:: +* Needed if running proprietary firmware, or to unbrick ThinkPad X60 Recovery +* Guide:: ThinkPad X60 Tablet Recovery Guide:: ThinkPad T60 Recovery Guide:: +* ThinkPad X200/X200S/X200T:: Needed if +* running proprietary firmware, or to unbrick ThinkPad R400:: +* Needed if running proprietary firmware, or to unbrick ThinkPad T400:: +* Needed if running proprietary firmware, or to unbrick ThinkPad T500:: +* Needed if running proprietary firmware, or to unbrick +@end menu -You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the end, then it's flashed and should boot. If you see errors, try again (and again, and again); the message @strong{Chip content is identical to the requested image} is also an indication of a successful installation. -Example output from running the command (see above): +@node How to program an SPI flash chip with BeagleBone Black @subsubsection How +to program an SPI flash chip with the BeagleBone Black This document exists as a +guide for reading from or writing to an SPI flash chip with the BeagleBone +Black, using the @uref{http://flashrom.org/Flashrom,flashrom} software. A +BeagleBone Black, rev. C was used when creating this guide, but earlier +revisions may also work. -@verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Reading old flash chip contents... done. -Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 -ERASE FAILED! -Reading current flash chip contents... done. Looking for another erase function. -Erase/write done. -Verifying flash... VERIFIED. -@end verbatim +@menu +* Hardware requirements - BBB:: Setting up the 33V DC PSU:: Accessing the +* operating system on the BBB:: Setting up spidev on the BBB:: Connecting the +* Pomona 5250/5252:: Notes about stability:: +@end menu -@node Wifi - X200 -@c @subsubheading Wifi - X200 -The X200 typically comes with an Intel wifi chipset, which does not work without proprietary software. For a list of wifi chipsets that work without proprietary software, see @ref{Recommended wifi chipsets,recommended_wifi}. +@node Hardware requirements - BBB @c @subsubheading Hardware requirements +Shopping list (pictures of this hardware is shown later): -Some X200 laptops come with an Atheros chipset, but this is 802.11g only. +@itemize @item A @uref{http://flashrom.org,Flashrom}-compatible external SPI +programmer: @strong{BeagleBone Black}, sometimes referred to as 'BBB', (rev. C) +is highly recommended. You can buy one from +@uref{https://www.adafruit.com,Adafruit} (USA), +@uref{http://electrokit.com,Electrokit} (Sweden) or any of the distributors +listed @uref{http://beagleboard.org/black,here} (look below 'Purchase'). We +recommend this product because we know that it works well for our purposes and +doesn't require any non-free software. @item Electrical/insulative tape: cover +the entire bottom surface of the BBB (the part that rests on a surface). This +is important, when placing the BBB on top of a board so that nothing shorts. +Most hardware/electronics stores have this. Optionally, you can use the bottom +half of a @uref{http://www.hammondmfg.com/1593HAM.htm#BeagleBoneBlack,hammond +plastic enclosure}. @item Clip for connecting to the flash chip: if you have a +SOIC-16 flash chip (16 pins), you will need the @strong{Pomona 5252} or +equivalent. For SOIC-8 flash chips (8 pins), you will need the @strong{Pomona +5250} or equivalent. Do check which chip you have, before ordering a clip. +Also, you might as well buy two clips or more since they break easily. +@uref{http://farnell.com/,Farnell element 14} sells these and ships to many +countries. Some people find these clips difficult to get hold of, especially in +South America. If you know of any good suppliers, please contact the libreboot +project with the relevant information. @strong{If you can't get hold of a +pomona clip, some other clips might work, e.g. 3M, but they are not always +reliable. You can also directly solder the wires to the chip, if that suits +you; the clip is just for convenience, really.} @item @strong{External 3.3V DC +power supply}, for powering the flash chip: an ATX power supply / PSU (common on +Intel/AMD desktop computers) will work for this. A lab PSU (DC) will also work +(adjusted to 3.3V). @itemize @item Getting a multimeter might be worthwhile, to +verify that it's supplying 3.3V. @end itemize + +@item @strong{External 5V DC power supply} (barrel connector), for powering the +BBB: the latter can have power supplied via USB, but a dedicated power supply is +recommended. These should be easy to find in most places that sell electronics. +@strong{OPTIONAL. Only needed if not powering with the USB cable, or if you want +to use @ref{ Configuring EHCI debugging on the BeagleBone Black,EHCI debug}}. +@item @strong{Pin header / jumper cables} (2.54mm / 0.1" headers): you should +get male--male, male--female and female--female cables in 10cm size. Just get a +load of them. Other possible names for these cables/wires/leads are @itemize +@item flying leads @item dupont (or other brand names) @item breadboard cables +(since they are often used on breadboards). @end itemize + +@uref{https://www.adafruit.com,Adafruit} sell them, as do many others. +@strong{Some people find them difficult to buy. Please contact the libreboot +project if you know of any good sellers.} You might also be able to make these +cables yourself. For PSU connections, using long cables, e.g. 20cm, is fine, +and you can extend them longer than that if needed. @item @strong{Mini USB A-B +cable}: the BBB probably already comes with one. @strong{OPTIONAL---only needed +for @ref{ Configuring EHCI debugging on the BeagleBone Black,EHCI debug} or for +serial/SSH access without ethernet cable (g_multi kernel module)}. @item +@strong{FTDI TTL cable or debug board}: used for accessing the serial console on +the BBB. @uref{http://elinux.org/Beagleboard:BeagleBone_Black_Serial,This page} +contains a list. @strong{OPTIONAL---only needed for serial console on the BBB, +if not using SSH via ethernet cable.} @end itemize + +@node Setting up the 33V DC PSU @c @subsubheading Setting up the 3.3V DC PSU ATX +PSU pinouts can be read on +@uref{https://en.wikipedia.org/wiki/Power_supply_unit_%28computer%29#Wiring_diagrams,this +Wikipedia page}. + +You can use pin 1 or 2 (orange wire) on a 20-pin or 24-pin ATX PSU for 3.3V, and +any of the ground/earth sources (black cables) for ground. Short PS_ON# / Power +on (green wire; pin 16 on 24-pin ATX PSU, or pin 14 on a 20-pin ATX PSU) to a +ground (black; there is one right next to it) using a wire/paperclip/jumper, +then power on the PSU by grounding PS_ON# (this is also how an ATX motherboard +turns on a PSU). + +@strong{DO **NOT** use pin 4, 6, do **NOT** use pin 19 or 20 (on a 20-pin ATX +PSU), and DO **NOT** use pin 21, 22 or 23 (on a 24-pin ATX PSU). Those wires +(the red ones) are 5V, and they **WILL** kill your flash chip. ***NEVER*** +supply more than 3.3V to your flash chip (that is, if it's a 3.3V flash chip; 5V +and 1.8V SPI flash chips do exist, but they are rare. Always check what voltage +your chip takes. Most of them take 3.3V).} + +You only need one 3.3V supply and one ground for the flash chip, after grounding +PS_ON#. + +The male end of a 0.1" or 2.54mm header cable is not thick enough to remain +permanently connected to the ATX PSU on its own. When connecting header cables +to the connector on the ATX PSU, use a female end attached to a thicker piece of +wire (you could use a paper clip), or wedge the male end of the jumper cable +into the sides of the hole in the connector, instead of going through the +centre. -It is recommended that you install a new wifi chipset. This can only be done after installing libreboot, because the original firmware has a whitelist of approved chips, and it will refuse to boot if you use an 'unauthorized' wifi card. +Here is an example set up:@* @image{../resources/images/x200/psu33,,,,jpg} -The following photos show an Atheros AR5B95 being installed, to replace the Intel chip that this X200 came with:@* @image{../resources/images/x200/disassembly/0016,,,,jpg} @image{../resources/images/x200/disassembly/0017,,,,jpg} +@node Accessing the operating system on the BBB @c @subsubheading Accessing the +operating system on the BBB The operating system on your BBB will probably have +an SSH daemon running where the root account has no password. Use SSH to access +the operating system and set a root password. By default, the OS on your BBB +will most likely use DHCP, so it should already have an IP address. -@node WWAN - X200 -@c @subsubheading WWAN - X200 -If you have a WWAN/3G card and/or sim card reader, remove them permanently. The WWAN-3G card has proprietary firmware inside; the technology is identical to what is used in mobile phones, so it can also track your movements. +You will also be using the OS on your BBB for programming an SPI flash chip. -Not to be confused with wifi (wifi is fine). +@itemize @item Alternatives to SSH in case SSH fails:: -@node Memory - X200 -@c @subsubheading Memory - X200 -You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs (speed/size). Non-matching pairs won't work. You can also install a single module (meaning, one of the slots will be empty) in slot 0. +You can also use a serial FTDI debug board with GNU Screen, to access the serial +console.@* # @strong{screen /dev/ttyUSB0 115200}@* Here are some example +photos:@* @image{../resources/images/x200/ftdi,,,,jpg} +@image{../resources/images/x200/ftdi_port,,,,jpg}@* -NOTE: reports from some users indicate that non matching pairs might work (e.g. 1+2 GiB). +You can also connect the USB cable from the BBB to another computer and a new +network interface will appear, with its own IP address. This is directly +accessible from SSH, or screen:@* # @strong{screen /dev/ttyACM0 115200} -Make sure that the RAM you buy is the 2Rx8 density. +You can also access the uboot console, using the serial method instead of SSH. +@end itemize -@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be useful for RAM compatibility info -(note: coreboot raminit is different, so this page might be BS) +@node Setting up spidev on the BBB @c @subsubheading Setting up spidev on the +BBB Log on as root on the BBB, using either SSH or a serial console as defined +in @ref{Accessing the operating system on the BBB,bbb_access}. Make sure that +you have internet access on your BBB. + +Follow the instructions at +@uref{http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0,http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0} +up to (and excluding) the point where it tells you to modify uEnv.txt + +You need to update the software on the BBB first. If you have an element14 brand +BBB (sold by Premier Farnell plc. stores like Farnell element14, Newark +element14, and Embest), you may need to +@uref{https://groups.google.com/forum/?_escaped_fragment_=msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ#!msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ,work +around a bug} in the LED aging init script before you can update your software. +If you don't have a file named /etc/init.d/led_aging.sh, you can skip this step +and update your software as described below. Otherwise, replace the contents of +this file with: + +@verbatim #!/bin/sh -e ### BEGIN INIT INFO +# Provides: led_aging.sh Required-Start: $local_fs Required-Stop: +# $local_fs Default-Start: 2 3 4 5 Default-Stop: 0 1 6 +# Short-Description: Start LED aging Description: Starts LED aging +# (whatever that is) +### END INIT INFO -In this photo, 8GiB of RAM (2x4GiB) is installed:@* @image{../resources/images/x200/disassembly/0018,,,,jpg} +x=$(/bin/ps -ef | /bin/grep "[l]ed_acc") if [ ! -n "$x" -a -x /usr/bin/led_acc +]; then /usr/bin/led_acc & fi @end verbatim -@node Booting - X200 -@c @subsubheading Boot it! -You should see something like this: +Run @strong{apt-get update} and @strong{apt-get upgrade} then reboot the BBB, +before continuing. -@image{../resources/images/x200/disassembly/0019,,,,jpg} +Check that the firmware exists:@* # @strong{ls +/lib/firmware/BB-SPI0-01-00A0.*}@* Output: -Now @ref{GNU/Linux distributions,install GNU/Linux}. +@verbatim /lib/firmware/BB-SPI0-01-00A0.dtbo @end verbatim -@node X200S and X200 Tablet users GPIO33 trick will not work -@c @subsubheading X200S and X200 Tablet users: GPIO33 trick will not work. -sgsit found out about a pin called GPIO33, which can be grounded to disable the flashing protections by the descriptor and stop the ME from starting (which itself interferes with flashing attempts). The theory was proven correct; however, it is still useless in practise. +Then:@* # @strong{echo BB-SPI0-01 > /sys/devices/bone_capemgr.*/slots}@* # +@strong{cat /sys/devices/bone_capemgr.*/slots}@* Output: -Look just above the 7 in TP37 (that's GPIO33):@* @image{../resources/images/x200/gpio33_location,,,,jpg} +@verbatim 0: 54:PF--- 1: 55:PF--- 2: 56:PF--- 3: 57:PF--- 4: ff:P-O-L +Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G 5: ff:P-O-L +Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI 7: ff:P-O-L Override Board +Name,00A0,Override Manuf,BB-SPI0-01 @end verbatim -By default we would see this in lenovobios, when trying flashrom -p internal -w rom.rom: +Verify that the spidev device now exists:@* # @strong{ls -al /dev/spid*}@* +Output: -@verbatim -FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. -FREG2: Warning: Management Engine region (0x00001000-0x005f5fff) is locked. -@end verbatim +@verbatim crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0 @end verbatim -With GPIO33 grounded during boot, this disabled the flash protections as set by descriptor, and stopped the ME from starting. The output changed to: +Now the BBB is ready to be used for flashing. Make this persist across +reboots:@* In /etc/default/capemgr add @strong{CAPE=BB-SPI0-01} at the end (or +change the existing @strong{CAPE=} entry to say that, if an entry already +exists. -@verbatim -The Flash Descriptor Override Strap-Pin is set. Restrictions implied by -the Master Section of the flash descriptor are NOT in effect. Please note -that Protected Range (PR) restrictions still apply. -@end verbatim +Get flashrom from the libreboot_util release archive, or build it from +libreboot_src/git if you need to. An ARM binary (statically compiled) for +flashrom exists in libreboot_util releases. Put the flashrom binary on your BBB. -The part in bold is what got us. This was still observed: +You may also need ich9gen, if you will be flashing an ICH9-M laptop (such as the +X200). Get it from libreboot_util, or build it from libreboot_src, and put the +ARM binary for it on your BBB. -@verbatim -PR0: Warning: 0x007e0000-0x01ffffff is read-only. -PR4: Warning: 0x005f8000-0x005fffff is locked. -@end verbatim +Finally, get the ROM image that you would like to flash and put that on your +BBB. -It is actually possible to disable these protections. Lenovobios does, when updating the BIOS (proprietary one). One possible way to go about this would be to debug the BIOS update utility from Lenovo, to find out how it's disabling these protections. Some more research is available here: @uref{http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research,http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research} +Now test flashrom:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512}@* Output: -On a related note, libreboot has a utility that could help with investigating this: @ref{demefactory utility,demefactory} +@verbatim Calibrating delay loop... OK. No EEPROM/flash device found. Note: +flashrom can never write if the flash chip isn't found automatically. @end +verbatim +This means that it's working (the clip isn't connected to any flash chip, so the +error is fine). +@node Connecting the Pomona 5250/5252 @c @subsubheading Connecting the Pomona +5250/5252 Use this image for reference when connecting the pomona to the BBB: +@uref{http://beagleboard.org/Support/bone101#headers,http://beagleboard.org/Support/bone101#headers} +(D0 = MISO or connects to MISO). -@node ThinkPad R400 -@subsubsection Flashing the ThinkPad R400 with a BeagleBone Black -Initial flashing instructions for R400. +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-16 (clip: Pomona 5252): -This guide is for those who want libreboot on their ThinkPad R400 while they still have the original Lenovo BIOS present. This guide can also be followed (adapted) if you brick your R400, to know how to recover. +@verbatim NC - - 21 1 - - 17 NC +- - NC NC - - NC NC - - NC NC +- - NC 18 - - 3.3V (PSU) 22 - - NC - +this is pin 1 on the flash chip This is how you will connect. Numbers refer to +pin numbers on the BBB, on the plugs near the DC jack. -Before following this section, please make sure to setup your libreboot ROM properly first. Although ROM images are provided pre-built in libreboot, there are some modifications that you need to make to the one you chose before flashing. (instructions referenced later in this guide) +You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# +and WP#. On some systems they are held high, if the flash chip is attached to +the board. If you're flashing a chip that isn't connected to a board, you'll +almost certainly have to connect them. -@menu -* Libreboot T400:: -* Serial port - R400:: -* LCD compatibly - R400:: -* A note about CPUs - R400:: -* A note about GPUs - R400:: -* CPU paste required - R400:: -* Flash chip size - R400:: -* MAC address - R400:: -* Initial BBB configuration - R400:: -* Disassembly - R400:: -* Thermal paste - IMPORTANT - R400:: -* Wifi - R400:: -* WWAN - R400:: -* Memory - R400:: -* Booting - R400:: -@end menu +SOIC16 pinout (more info available online, or in the datasheet for your flash +chip): HOLD 1-16 SCK VDD 2-15 MOSI N/C 3-14 N/C N/C 4-13 N/C N/C +5-12 N/C N/C 6-11 N/C SS 7-10 GND MISO 8-9 WP @end verbatim -@node Libreboot T400 -@c @subsubheading Libreboot T400 -You may also be interested in the smaller, more portable @ref{ThinkPad T400,Libreboot T400}. +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-8 (clip: Pomona 5250): -@node Serial port - R400 -@c @subsubheading Serial port -EHCI debug might not be needed. It has been reported that the docking station for this laptop has a serial port, so it might be possible to use that instead. +@verbatim 18 - - 1 22 - - NC NC +- - 21 3.3V (PSU) - - 17 - this is pin 1 on the flash chip This +is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs +near the DC jack. -@node LCD compatibly - R400 -@c @subsubheading LCD compatibly -Not all LCD panels are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. +You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# +and WP#. On some systems they are held high, if the flash chip is attached to +the board. If you're flashing a chip that isn't connected to a board, you'll +almost certainly have to connect them. -@node A note about CPUs - R400 -@c @subsubheading A note about CPUs -@uref{http://www.thinkwiki.org/wiki/Category:R400,ThinkWiki} has a list of CPUs for this system. The Core 2 Duo P8400 and P8600 are believed to work in libreboot. The Core 2 Duo T9600 was confirmed to work, so the T9400 probably also works. @strong{The Core 2 Duo T5870/5670 and Celeron M 575/585 are untested!} -@itemize -@item -Quad-core CPUs -@itemize @minus -@item -Incompatible. Do not use. -@end itemize -@end itemize +SOIC8 pinout (more info available online, or in the datasheet for your flash +chip): SS 1-8 VDD MISO 2-7 HOLD WP 3-6 SCK GND 4-5 MOSI @end verbatim -@node A note about GPUs - R400 -@c @subsubheading A note about GPUs -Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this is referred to as "switchable graphics". In the @emph{BIOS setup} program for lenovobios, you can specify that the system will use one or the other (but not both). +@strong{NC = no connection} -Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so native graphics initialization works all the same. +@strong{DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is +connected to the flash chip.} -@node CPU paste required - R400 -@c @subsubheading CPU paste required -See @xref{paste-r400,,paste}. +@strong{You also need to connect the BLACK wire (ground/earth) from the 3.3V PSU +to pin 2 on the BBB (P9 header). It is safe to install this now (that is, before +you connect the pomona to the flash chip); in fact, you should.} -@node Flash chip size - R400 -@c @subsubheading Flash chip size -Use this to find out:@* # @strong{dmidecode | grep ROM\ Size}@* +if you need to extend the 3.3v psu leads, just use the same colour M-F leads, +@strong{but} keep all other leads short (10cm or less) -@node MAC address - R400 -@c @subsubheading MAC address -On the R400, the MAC address for the onboard gigabit ethernet chipset is stored inside the flash chip, along with other configuration data. +You should now have something that looks like this:@* +@image{../resources/images/x200/5252_bbb0,,,,jpg} +@image{../resources/images/x200/5252_bbb1,,,,jpg} -Keep a note of the MAC address before disassembly; this is very important, because you will need to insert this into the libreboot ROM image before flashing it. It will be written in one of these locations: -@image{../resources/images/t400/macaddress0,,,,jpg} @image{../resources/images/t400/macaddress1,,,,jpg} @image{../resources/images/x200/disassembly/0001,,,,jpg} +@node Notes about stability @c @subsubheading Notes about stability +@uref{http://flashrom.org/ISP,http://flashrom.org/ISP} is what we typically do +in libreboot, though not always. That page has some notes about using resistors +to affect stability. Currently, we use spispeed=512 (512kHz) but it is possible +to use higher speeds while maintaining stability. -@node Initial BBB configuration - R400 -@c @subsubheading Initial BBB configuration -Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to setup the BBB for flashing. +tty0_ in #libreboot was able to get better flashing speeds with the following +configuration: -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +@itemize @item "coax" with 0.1 mm core and aluminum foley (from my kitchen), add +100 Ohm resistors (serial) @item put heatshrink above the foley, for: CS, CLK, +D0, D1 @item Twisted pair used as core (in case more capacitors are needed) +@item See this image: +@uref{http://i.imgur.com/qHGxKpj.jpg,http://i.imgur.com/qHGxKpj.jpg} @item He +was able to flash at 50MHz (lower speeds are also fine). @end itemize -@verbatim -POMONA 5252 (correlate with the BBB guide) -=== ethernet jack and VGA port ==== - NC - - 21 - 1 - - 17 - NC - - NC - NC - - NC - NC - - NC - NC - - NC - 18 - - 3.3V (PSU) - 22 - - NC - this is pin 1 on the flash chip -=== SATA port === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): -@verbatim -POMONA 5250 (correlate with the BBB guide) -=== RAM slots ==== - 18 - - 1 - 22 - - NC - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip -=== slot where the AC jack is connected === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim +@node GA-G41M-ES2L flashing tutorial @subsubsection GA-G41M-ES2L flashing +tutorial This guide is for those who want libreboot on their Intel GA-G41M-ES2L +motherboard while they still have the original BIOS present. + +@menu +* Flash chip size - GA-G41M-ES2L:: Flashing instructions - GA-G41M-ES2L:: +@end menu + +@node Flash chip size - GA-G41M-ES2L @ifinfo @subsubheading Flash chip size @end +ifinfo Use this to find out:@* # @strong{dmidecode | grep ROM\ Size} + +@node Flashing instructions - GA-G41M-ES2L @ifinfo @subsubheading Flashing +instructions - GA-G41M-ES2L @end ifinfo Refer to @ref{How to program an SPI +flash chip with BeagleBone Black,bbb_setup} for how to set up the BBB for +flashing it externally, if you want to do that. -@node Disassembly - R400 -@c @subsubheading Disassembly -Remove all screws:@* @image{../resources/images/r400/0000,,,,jpg}@* Remove the HDD and optical drive:@* @image{../resources/images/r400/0001,,,,jpg}@* Remove the hinge screws:@* @image{../resources/images/r400/0002,,,,jpg} @image{../resources/images/r400/0003,,,,jpg} +Internal flashing is possible. Boot with proprietary BIOS and GNU/Linux, and run +the latest version of flashrom. This board has 2 flash chips, one is a backup. -Remove the palm rest and keyboard:@* @image{../resources/images/r400/0004,,,,jpg} @image{../resources/images/r400/0005,,,,jpg} +Flash the first chip: ./flashrom -p internal:dualbiosindex=0 -w libreboot.rom -Remove these screws, and then remove the bezel:@* @image{../resources/images/r400/0006,,,,jpg} @image{../resources/images/r400/0007,,,,jpg} +Flash the second chip: ./flashrom -p internal:dualbiosindex=1 -w libreboot.rom -Remove the speaker screws, but don't remove the speakers yet (just set them loose):@* @image{../resources/images/r400/0008,,,,jpg} @image{../resources/images/r400/0009,,,,jpg} @image{../resources/images/r400/0010,,,,jpg} +NOTE: You need the latest version of flashrom. Just grab it on flashrom.org from +their SVN or Git repos. -Remove these screws, and then remove the metal plate:@* @image{../resources/images/r400/0011,,,,jpg} @image{../resources/images/r400/0012,,,,jpg} @image{../resources/images/r400/0013,,,,jpg} +That's all! -Remove the antennas from the wifi card, and then start unrouting them:@* @image{../resources/images/r400/0014,,,,jpg} @image{../resources/images/r400/0015,,,,jpg} @image{../resources/images/r400/0016,,,,jpg} @image{../resources/images/r400/0017,,,,jpg} @image{../resources/images/r400/0018,,,,jpg} @image{../resources/images/r400/0019,,,,jpg} +Do refer to the @ref{Hardware compatibility,compatibility page} for more +information about this board. -Disconnect the LCD cable from the motherboard:@* @image{../resources/images/r400/0020,,,,jpg} @image{../resources/images/r400/0021,,,,jpg} @image{../resources/images/r400/0022,,,,jpg} @image{../resources/images/r400/0023,,,,jpg} -Remove the hinge screws, and then remove the LCD panel:@* @image{../resources/images/r400/0024,,,,jpg} @image{../resources/images/r400/0025,,,,jpg} @image{../resources/images/r400/0026,,,,jpg} @image{../resources/images/r400/0027,,,,jpg} +@node Flashing Intel D510MO @subsubsection Flashing Intel D510MO D510MO flashing +tutorial -Remove this:@* @image{../resources/images/r400/0028,,,,jpg} @image{../resources/images/r400/0029,,,,jpg} +This guide is for those who want libreboot on their Intel D510MO motherboard +while they still have the original BIOS present. -Remove this long cable (there are 3 connections):@* @image{../resources/images/r400/0030,,,,jpg} @image{../resources/images/r400/0031,,,,jpg} @image{../resources/images/r400/0032,,,,jpg} @image{../resources/images/r400/0033,,,,jpg} +@menu +* Flash chip size - D510MO:: Flashing instructions - D510MO:: +@end menu -Disconnect the speaker cable, and remove the speakers:@* @image{../resources/images/r400/0034,,,,jpg} +@node Flash chip size - D510MO @c @subsubheading Flash chip size Use this to +find out:@* # @strong{dmidecode | grep ROM\ Size} -Remove the heatsink screws, remove the fan and then remove the heatsink/fan:@* @image{../resources/images/r400/0035,,,,jpg} @image{../resources/images/r400/0036,,,,jpg} @image{../resources/images/r400/0037,,,,jpg} @image{../resources/images/r400/0038,,,,jpg} +@node Flashing instructions - D510MO @c @subsubheading Flashing instructions - +D510MO @image{../resources/images/d510mo/d510mo,,,,jpg} -Remove the NVRAM battery:@* @image{../resources/images/r400/0039,,,,jpg} @image{../resources/images/r400/0040,,,,jpg} +Use this image for reference, then refer to @ref{How to program an SPI flash +chip with BeagleBone Black,bbb_setup} for how to set up the BBB for flashing it. -Remove this screw:@* @image{../resources/images/r400/0041,,,,jpg} @image{../resources/images/r400/0042,,,,jpg} +Do refer to the @ref{Hardware compatibility,compatibility page} for more +information about this board. -Disconnect the AC jack:@* @image{../resources/images/r400/0043,,,,jpg} @image{../resources/images/r400/0044,,,,jpg} -Remove this screw and then remove what is under it:@* @image{../resources/images/r400/0045,,,,jpg} -Remove this:@* @image{../resources/images/r400/0046,,,,jpg} -Lift the motherboard (which is still inside the cage) from the side on the right, removing it completely:@* @image{../resources/images/r400/0047,,,,jpg} @image{../resources/images/r400/0048,,,,jpg} +@node Configuring EHCI debugging on the BeagleBone Black @subsubsection EHCI +debugging on the BeagleBone Black -Remove all screws, marking each hole so that you know where to re-insert them. You should place the screws in a layout corresponding to the order that they were in before removal: @image{../resources/images/r400/0049,,,,jpg} @image{../resources/images/r400/0050,,,,jpg} +If your computer does not boot after installing libreboot, it is very useful to +get debug logs from it, from the payload (grub) and/or the kernel (if gets to +there). All of them stream debug logs on the available serial (RS-232) by +default. However, most of todays laptops lack RS-232 port. The other option is +to stream the logs to USB EHCI debug port. -Remove the motherboard from the cage, and the SPI flash chip will be next to the memory slots:@* @image{../resources/images/r400/0051,,,,jpg} @image{../resources/images/r400/0052,,,,jpg} +This section explains step-by-step how to setup BBB as a ``USB EHCI debug +dongle'' and configure libreboot and the linux kernel to stream logs to it +(TODO: grub). -Connect your programmer, then connect GND and 3.3V@* @image{../resources/images/t400/0065,,,,jpg} @image{../resources/images/t400/0066,,,,jpg} @image{../resources/images/t400/0067,,,,jpg} @image{../resources/images/t400/0069,,,,jpg} @image{../resources/images/t400/0070,,,,jpg} @image{../resources/images/t400/0071,,,,jpg} +I will refer to three computers: -A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is also fine:@* @image{../resources/images/t400/0072,,,,jpg} +@itemize @item @strong{host} - this is the computer you use, have tools, +compiler, Internet, etc @item @strong{BBB} - Beaglebone Black (rev. B or higher, +i use rev. C) @item @strong{target} - the computer you are trying to install +liberboot @end itemize -Of course, make sure to turn on your PSU:@* @image{../resources/images/x200/disassembly/0013,,,,jpg} +@menu +* Find USB port on the target that supports EHCI debug:: Initial setup of BBB to +* act as EHCI debug dongle:: Patch BBB's g_dbgp module:: +* Optional, but highly recommended Configure libreboot with EHCI debug:: +* Selecting HCD Index and USB Debug port:: How to get the debug logs:: Enable +* EHCI Debug on the target's kernel:: Optional , but recommended References:: +@end menu -Now, you should be ready to install libreboot. -Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, libreboot also distributes flashrom source code which can be built. +@node Find USB port on the target that supports EHCI debug @c @subsubheading +Find USB port on the target that supports EHCI debug Not all USB controllers +support EHCI debug (see: +@uref{http://www.coreboot.org/EHCI_Debug_Port#Hardware_capability,EHCI Debug +Port} ). Even more, if a USB controller supports EHCI debug, it is available +only @strong{on a single port} that might or might not be exposed externally. + +@itemize @item You need running OS (GNU/Linux) on your target for this step (If +you've flashed libreboot and it does not boot, you have to flush back the stock +bios) @item You need USB memory stick (the data on it will not be touched). +@item The EHCI debugging can not be done through external hub, BBB must be +connected directly to the debug port of the controller (so, no hubs) @end +itemize + +@itemize @item Download @xref{1-ehci-ref,,1}, +@uref{http://www.coreboot.org/pipermail/coreboot/attachments/20080909/ae11c291/attachment.sh,this} +shell script. @end itemize + +@enumerate @item Plug the usb stick in the first available usb port @item Run +the script, you will get output similar to following: @item The buses the +support debug are Bus 3 (0000:00:1a.0) on Port 1 and Bus 4 (0000:00:1d.0) on +port 2. Your usb stick is plugged on Bus 1, Port 3 @item Repeat the steps, +plugging the USB stick in the next available port @item Go through all available +ports and remember(write down) those for which bus/port of the usb stick matches +one of the bus/port that support debug (bold). @end enumerate + +Remember (write down) for each port (external plug) you found that supports +debug: @strong{PCI device id, the bus id, the port number, and the physical +location of the usb plug.} -Log in as root on your BBB, using the instructions in @ref{Accessing the operating system on the BBB,bbb_access}. +If you do not find a match, you can not get debug over EHCI. Sorry. -Test that flashrom works:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: +@anchor{1-ehci-ref} The guys from coreboot were talking about including the +script in coreboot distribution (check the status). -@verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. -Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" -Please specify which chip definition to use with the -c <chipname> option. -@end verbatim +@node Initial setup of BBB to act as EHCI debug dongle @c @subsubheading Initial +setup of BBB to act as EHCI debug dongle BBB must be powered with a barrel power +connector since the mini-B USB plug will be used for the EHCI debug stream. So +you will need: -How to backup factory.rom (change the -c option as neeed, for your flash chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the @strong{-c} option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware that could be replicated in coreboot and libreboot. +@itemize @item power supply (5V, 2A(10W) is sufficient). @item an extra usb +cable: A to mini-B @end itemize -Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM image, this is not what you want. @strong{Make sure to always change the MAC address to one that is correct for your system.} +(On BBB) The linux kernel includes module (g_dbgp that enables one of the usb +ports on a computer to behave as EHCI debug dongle. Make sure you have this +module available on your BBB (Debian 7.8 that comes with BBB should have it), if +not, you should compile it yourself (see next section): -Now flash it:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} +@verbatim ls /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget/g_dbgp.ko @end +verbatim -@image{../resources/images/x200/disassembly/0015,,,,jpg} +Unload all other g_* modules: -You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the end, then it's flashed and should boot. If you see errors, try again (and again, and again); the message @strong{Chip content is identical to the requested image} is also an indication of a successful installation. +@verbatim +# lsmod rmmod g_multi +... @end verbatim -Example output from running the command (see above): +Then load g_dbgp : @verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Reading old flash chip contents... done. -Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 -ERASE FAILED! -Reading current flash chip contents... done. Looking for another erase function. -Erase/write done. -Verifying flash... VERIFIED. +# modprobe g_dbgp lsmod # should show that g_dbgp is loaded, and no other g_* @end verbatim -@node Thermal paste - IMPORTANT - R400 -@c @subsubheading Thermal paste (IMPORTANT) -@anchor{paste-r400} -Because part of this procedure involved removing the heatsink, you will need to apply new paste. Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. +Plug the mini-B side of the USB cable in your BBB and the A side in your target. +Then one of the usb devices on your target (with lsusb ) should be: -When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. +@verbatim Bus 001 Device 024: ID 0525:c0de Netchip Technology, Inc. @end +verbatim -@image{../resources/images/t400/paste,,,,jpg} - -NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. Other guides online detail the proper application procedure. +If you see the device on the target, you are good to continue to the next step. -@node Wifi - R400 -@c @subsubheading Wifi -The R400 typically comes with an Intel wifi chipset, which does not work without proprietary software. For a list of wifi chipsets that work without proprietary software, see @ref{Recommended wifi chipsets,recommended_wifi}. +@node Patch BBB's g_dbgp module @c @subsubheading Patch BBB's g_dbgp module +(optional, but highly recommended) For the reasons why you need this, see: +@uref{http://www.coreboot.org/EHCI_Gadget_Debug,EHCI Gadget Debug}.@*Make sure +that you have cross compiling environment for arm-linux-gnueabihf setup on your +@emph{host}. + +@itemize @item On BBB: uname -r - this will give you version number like +3.8.13-bone70 (I will refer to this as: $mav.$miv-$lv: where mav=3.8, miv=13, +lv=bone70 @item Get the BBB kernel ready on your host for cross-compiling: @end +itemize + +@verbatim $ cd $work_dir $ git clone https://github.com/beagleboard/kernel.git $ +cd kernel $ git checkout $mav (see above) $ ./patch.sh $ wget +http://arago-project.org/git/projects/?p=am33x-cm3.git\;a=blob_plain\;f=bin/am335x-pm-firmware.bin\;hb=HEAD +-O kernel/firmware/am335x-pm-firmware.bin $ cp configs/beaglebone +kernel/arch/arm/configs/beaglebone_defconfig @end verbatim + +@itemize @item Download the patch from +@uref{http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz,here} +@item tar -xf Ehci-debug-gadget-patches.tar.gz (will create dir: +usbdebug-gadget) @item Note that there are two patches (patch_1 and patch_2) for +each of the two different version of the kernel (3.8 and 3.10). I will use 3.8. +(If using kernel 3.12 patch_1 is not needed) @item cd kernel (note that this is +one more level: you should be in $work_dir/kernel/kernel) @item Apply the +patches: @end itemize + +@verbatim git apply +../usbdebug-gadget/v3.8-debug-gadget/0001-usb-dbgp-gadget-Fix-re-connecting-after-USB-disconne.patch +git apply +../usbdebug-gadget/v3.8-debug-gadget/0002-usb-serial-gadget-no-TTY-hangup-on-USB-disconnect-WI.patch +; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- beaglebone_defconfig -j4@ +@end verbatim -Some R400 laptops might come with an Atheros chipset, but this is 802.11g only. +@itemize @item You should also apply the linux-libre @emph{deblob} script to +turn it into linux-libre (deletes all the blobs from the linux kernel). +@uref{http://www.fsfla.org/ikiwiki/selibre/linux-libre/,fsfla website} - see +@uref{http://www.fsfla.org/svn/fsfla/software/linux-libre/scripts/,scripts}. +@item Get your current BBB kernel config (from: /boot/config-<ver>) and copy it +to your host as $work_dir/kernel/kernel/.config @item Set proper version number: +@itemize @item On your host, edit $work_dir/kernel/kernel/.config (the one +you've just copied from BBB), find the line CONFIG_LOCALVERSION="<something or +empty>" and change it to CONFIG_LOCALVERSION="-$lv", so it will look something +like: CONFIG_LOCALVERSION="-bone70" @end itemize + +@item Also, make sure that: CONFIG_USB_G_DBGP=m (If not, make menuconfig, and +set @@Device Drivers-> USB Support -> USB Gadget Support -> EHCI Debug Device +Gadget=m @item Build the module: @end itemize + +@verbatim $ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4 (is it possoble +to build only the gadget modules) $ mkdir ../tmp && make ARCH=arm +CROSS_COMPILE=arm-linux-gnueabihf- INSTALL_MOD_PATH=../tmp modules_install @end +verbatim + +@itemize @item on BBB, backup +/lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget (i.e. mv +/lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget $HOME) @item copy the +freshly compiled usb/gadget dir to /lib/modules/3.8.13-bone70/kernel/drivers/usb +@item restart BBB @item Remove all g_* modules (rmmod g_<>) @item modprobpe +g_dbgp @end itemize + +@node Configure libreboot with EHCI debug @c @subsubheading Configure libreboot +with EHCI debug Libreboot(coreboot) should be configured with debug turned on +and to push debug messages to the EHCI debug port.@*If you've downloaded the +binary distribution, you can check if it is properly configured in the following +way: + +@itemize @item Go to the libreboot dist root directory cd $libreboot_bin @item +Locate the rom image for your target (I will call it: $img_path) @item Running +the following command will extract the config in a file ./my_config: @end +itemize + +@verbatim ./cbfstool/i686/cbfstool $img_path extract -n config -f ./my_config +@end verbatim -It is recommended that you install a new wifi chipset. This can only be done after installing libreboot, because the original firmware has a whitelist of approved chips, and it will refuse to boot if you use an 'unauthorized' wifi card. +@itemize @item Make sure that the following params in the config are set as +following: @end itemize -The following photos show an Atheros AR5B95 being installed, to replace the Intel chip that this R400 came with:@* @image{../resources/images/t400/0012,,,,jpg} @image{../resources/images/t400/ar5b95,,,,jpg} +@verbatim CONFIG_USBDEBUG=y (Generic Drivers -> USB 2.0 EHCI debug dongle +support) CONFIG_USBDEBUG_IN_ROMSTAGE=y (Generic Drivers -> Enable early +(pre-RAM) usbdebug) CONFIG_USBDEBUG_HCD_INDEX=<HCD Index of usb controller - see +below> (Generic Drivers -> Index for EHCI controller to use with usbdebug) +CONFIG_USBDEBUG_DEFAULT_PORT=<USB Debug port - see below> (Generic Drivers -> +Default USB port to use as Debug Port) @end verbatim -@node WWAN - R400 -@c @subsubheading WWAN -If you have a WWAN/3G card and/or sim card reader, remove them permanently. The WWAN-3G card has proprietary firmware inside; the technology is identical to what is used in mobile phones, so it can also track your movements. +The following three are behind radio button in the menu. Only the first one +@xref{2-ehci-ref,,2}, should be = y -Not to be confused with wifi (wifi is fine). +@verbatim USBDEBUG_DONGLE_STD=y (Generic Drivers -> Type +of dongle (Net20DC or compatible) -> Net20DC or compatible) +CONFIG_USBDEBUG_DONGLE_BEAGLEBONE=n (Generic Drivers -> Type of dongle +(Net20DC or compatible) -> BeagleBone) CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=n +(Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone Black) +@end verbatim -@node Memory - R400 -@c @subsubheading Memory -You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs (speed/size). Non-matching pairs won't work. You can also install a single module (meaning, one of the slots will be empty) in slot 0. +@anchor{2-ehci-ref} The g_dbgp module on BeagleBone Black (Rev. C) reports it +self as Net20DC, the other options are for older BB(B) - ver1. This is +documented +@uref{https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/,here} (also +tested/verified). -Make sure that the RAM you buy is the 2Rx8 density. +Then:@* -@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be useful for RAM compatibility info -(note: coreboot raminit is different, so this page might be BS) +@verbatim CONFIG_CONSOLE_USB=y (Console -> USB dongle console output) @end +verbatim -The following photo shows 8GiB (2x4GiB) of RAM installed:@* @image{../resources/images/t400/memory,,,,jpg} +Also Debugging ---> Output verbose XYZ ) (@strong{FIXME} somebody verify these): -@node Booting - R400 -@c @subsubheading Boot it! -You should see something like this: +@verbatim CONFIG_DEBUG_CBFS=y (Output verbose CBFS debug messages ) +CONFIG_HAVE_DEBUG_RAM_SETUP=y (??? What/where is this) CONFIG_DEBUG_RAM_SETUP=y +(Output verbose RAM init debug messages) CONFIG_DEBUG_SMI=y (Output verbose +SMI debug messages) CONFIG_DEBUG_ACPI=y (Output verbose ACPI debug messages +) CONFIG_DEBUG_USBDEBUG=y (Output verbose USB 2.0 EHCI debug dongle messages) +@end verbatim -@image{../resources/images/t400/boot0,,,,jpg} @image{../resources/images/t400/boot1,,,,jpg} +If some of the above mentioned configuration options are not as specified, you +have to configure and compile libreboot yourself. Please refer to the +doc(@strong{FIXME: link} about compiling libreboot. -Now @ref{GNU/Linux distributions,install GNU/Linux}. +@node Selecting HCD Index and USB Debug port @c @subsubheading Selecting HCD +Index and USB Debug port This applies (and works) only if the USB controller +that supports debug (found in the first section) is from Intel.@*If the PCI ID +of the port you found in the first section is 0000:00:1a.0 or 0000:00:1d.0 , you +are ok. Otherwise you have to try without guarantee that will work. +If the externally exposed port is on a bus with PCI ID == 0000:00:1a.0 then for +CONFIG_USBDEBUG_HCD_INDEX choose 2, otherwise choose 0 . -@node ThinkPad T400 -@subsubsection Flashing the T400 with a BeagleBone Black -Initial flashing instructions for the ThinkPad T400. +For CONFIG_USBDEBUG_DEFAULT_PORT choose the port from the first section that +correspond to the PCI ID -This guide is for those who want libreboot on their ThinkPad T400 while they still have the original Lenovo BIOS present. This guide can also be followed (adapted) if you brick your T400, to know how to recover. +Notes:@*The above is based on the implementation of +coreboot/src/southbridge/intel/common/usb_debug.c : pci_ehci_dbg_dev() .@*This +is enough as it applies for the supported GM45/G45 Thinkpads. coreboot support +some other contollers too, but they are irellevent for libreboot (for now). -Before following this section, please make sure to setup your libreboot ROM properly first. Although ROM images are provided pre-built in libreboot, there are some modifications that you need to make to the one you chose before flashing. (instructions referenced later in this guide) +@itemize @item On T500 (with switchable GPU) the debug ports for both intel +controllers is exposed. @item On x200t the debug ports for both intel +controllers is exposed. @end itemize -@menu -* T400 laptops with libreboot pre-installed:: -* Serial port - T400:: -* LCD compatibly - T400:: -* A note about CPUs - T400:: -* A note about GPUs - T400:: -* CPU paste required - T400:: -* Flash chip size - T400:: -* MAC address - T400:: -* Initial BBB configuration - T400:: -* The procedure - T400:: -* Thermal paste - IMPORTANT - T400:: -* Wifi - T400:: -* WWAN - T400:: -* Memory - T400:: -* Booting - T400:: -@end menu +@node How to get the debug logs @c @subsubheading How to get the debug logs +@itemize @item Plug the USB cable in the target's debug port (the one you found +in step 1) and BBB's mini-B USB @item Make sure no other then g_dbgp of the g_* +modules is loaded on your BBB @item On the BBB: @end itemize -@node T400 laptops with libreboot pre-installed -@c @subsubheading T400 laptops with libreboot pre-installed -If you don't want to install libreboot yourself, companies exist that sell these laptops with libreboot pre-installed, along with a free GNU/Linux distribution. +@verbatim stty -icrnl -inlcr -F /dev/ttyGS0 cat /dev/ttyGS0 @end verbatim -@node Serial port - T400 -@c @subsubheading Serial port -EHCI debug might not be needed. It has been reported that the docking station for this laptop has a serial port, so it might be possible to use that instead. +@itemize @item Power on the target with libreboot @item You should see debug +logs comming on your BBB console @end itemize -@node LCD compatibly - T400 -@c @subsubheading LCD compatibly -Not all LCD panels are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. +Note that this is not permanent on BBB, if you reboot it, you have to rmmod g_* +and modprobe g_dbgp -@node A note about CPUs - T400 -@c @subsubheading A note about CPUs -@uref{http://www.thinkwiki.org/wiki/Category:T400,ThinkWiki} has a list of CPUs for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot. The T9600 was confirmed to work, so the T9500/T9550 probably also work. -@itemize -@item -Quad-core CPUs -@itemize @minus -@item -Incompatible. Do not use. -@end itemize -@end itemize +@node Enable EHCI Debug on the target's kernel @c @subsubheading Enable EHCI +Debug on the target's kernel (optional, recommended) You have to know how to +compile kernel for your target. -@node A note about GPUs - T400 -@c @subsubheading A note about GPUs -Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this is referred to as ``switchable graphics''. In the @emph{BIOS setup} program for lenovobios, you can specify that the system will use one or the other (but not both). +@enumerate @item Check if early debugging is already enabled: grep +CONFIG_EARLY_PRINTK_DBGP /boot/config-<ver> @item If enabled, you do not have to +compile the kernel (skip this step). Otherwise, prepare kernel source for your +distribution and select (Kernel hacking -> Early printk via EHCI debug port). +Compile and install the new kernel. @item Edit your grub configuration and add +following to the kernel parameters @xref{20-ehci-ref,,20}, +@xref{21-ehci-ref,21},: earlyprintk=dbgp,keep. Also, try: +earlyprintk=dbgp<N>,keep where N is the debug port id if the first does not +work. @c TYPO: kenel > kernel @end enumerate -Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so native graphics initialization works all the same. +@node References @c @subsubheading References @c NOTE: Many of these are not +referenced above. @enumerate @item @anchor{10-ehci-ref} +@uref{http://www.coreboot.org/EHCI_Debug_Port,EHCI Debug Port} -@node CPU paste required - T400 -@c @subsubheading CPU paste required -See @xref{paste-t400,,paste}. +@item @anchor{11-ehci-ref} +@uref{https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/,coreboot +EHCI debug gadget demonstration} -@node Flash chip size - T400 -@c @subsubheading Flash chip size -Use this to find out:@* # @strong{dmidecode | grep ROM\ Size}@* +@item @anchor{12-ehci-ref} @uref{http://www.coreboot.org/EHCI_Gadget_Debug,EHCI +Gadget Debug} -@node MAC address - T400 -@c @subsubheading MAC address -On the T400, the MAC address for the onboard gigabit ethernet chipset is stored inside the flash chip, along with other configuration data. +@item @anchor{13-ehci-ref} +@uref{http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz,Ehci-debug-gadget-patches.tar.gz} -Keep a note of the MAC address before disassembly; this is very important, because you will need to insert this into the libreboot ROM image before flashing it. It will be written in one of these locations: +@item @anchor{14-ehci-ref} +@uref{http://wiki.beyondlogic.org/index.php/BeagleBoneBlack_Building_Kernel,Compiling +the BeagleBone Black Kernel} -@image{../resources/images/t400/macaddress0,,,,jpg} @image{../resources/images/t400/macaddress1,,,,jpg} @image{../resources/images/x200/disassembly/0001,,,,jpg} +@item @anchor{15-ehci-ref} +@uref{http://dumb-looks-free.blogspot.ca/2014/06/beaglebone-black-bbb-compile-kernel.html} +@item @anchor{16-ehci-ref} +@uref{http://dumb-looks-free.blogspot.fr/2014/06/beaglebone-black-bbb-kernal-headers.html} -@node Initial BBB configuration - T400 -@c @subsubheading Initial BBB configuration -Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to configure the BBB for flashing. +@item @anchor{17-ehci-ref} @uref{http://elinux.org/Building_BBB_Kernel,Building +BBB Kernel} -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +@item @anchor{18-ehci-ref} +@uref{http://komposter.com.ua/documents/USB-2.0-Debug-Port%28John-Keys%29.pdf} -@verbatim -POMONA 5252 (correlate with the BBB guide) -=== ethernet jack and VGA port ==== - NC - - 21 - 1 - - 17 - NC - - NC - NC - - NC - NC - - NC - NC - - NC - 18 - - 3.3V (PSU) - 22 - - NC - this is pin 1 on the flash chip -=== SATA port === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim +@item @anchor{19-ehci-ref} @uref{http://cs.usfca.edu/~cruse/cs698s10/,Exploring +USB at the Hardware/Software Interface} -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +@item @anchor{20-ehci-ref} +@uref{https://www.kernel.org/doc/Documentation/x86/earlyprintk.txt} -@verbatim -POMONA 5250 (correlate with the BBB guide) -=== RAM slots ==== - 18 - - 1 - 22 - - NC - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip -=== slot where the AC jack is connected === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim +@item @anchor{21-ehci-ref} +@uref{https://wiki.ubuntu.com/Kernel/Debugging/USBearlyprintk} -@node The procedure - T400 -@c @subsubheading The procedure -Remove @emph{all} screws, placing them in the order that you removed them:@* @image{../resources/images/t400/0001,,,,jpg} @image{../resources/images/t400/0002,,,,jpg} +@strong{TODO}: -Remove those three screws then remove the rear bezel:@* @image{../resources/images/t400/0003,,,,jpg} @image{../resources/images/t400/0004,,,,jpg} @image{../resources/images/t400/0005,,,,jpg} @image{../resources/images/t400/0006,,,,jpg} +@enumerate @item grub does not send messages to EHCI debug. Investigate. @item +The section ``Configure libreboot with EHCI debug'' can be skipped/simplified if +a common configuration works for all relevant targets is selected as defualt +@item Patch and compule g_dbgp on BBB instead cross-compile @item Find a simple +way to send debug messages from targets userland @end enumerate @end enumerate -Remove the speakers:@* @image{../resources/images/t400/0007,,,,jpg} @image{../resources/images/t400/0008,,,,jpg} @image{../resources/images/t400/0009,,,,jpg} @image{../resources/images/t400/0010,,,,jpg} @image{../resources/images/t400/0011,,,,jpg} -Remove the wifi:@* @image{../resources/images/t400/0012,,,,jpg} @image{../resources/images/t400/0013,,,,jpg} -Remove this cable:@* @image{../resources/images/t400/0014,,,,jpg} @image{../resources/images/t400/0015,,,,jpg} @image{../resources/images/t400/0016,,,,jpg} @image{../resources/images/t400/0017,,,,jpg} @image{../resources/images/t400/0018,,,,jpg} +@node KGPE-D16 @subsubsection Initial flashing instructions for KGPE-D16 -Unroute those antenna wires:@* @image{../resources/images/t400/0019,,,,jpg} @image{../resources/images/t400/0020,,,,jpg} @image{../resources/images/t400/0021,,,,jpg} @image{../resources/images/t400/0022,,,,jpg} @image{../resources/images/t400/0023,,,,jpg} +@strong{Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules..} -Remove the LCD assembly:@* @image{../resources/images/t400/0024,,,,jpg} @image{../resources/images/t400/0025,,,,jpg} @image{../resources/images/t400/0026,,,,jpg} @image{../resources/images/t400/0027,,,,jpg} @image{../resources/images/t400/0028,,,,jpg} @image{../resources/images/t400/0029,,,,jpg} @image{../resources/images/t400/0030,,,,jpg} @image{../resources/images/t400/0031,,,,jpg} +This guide is for those who want libreboot on their ASUS KGPE-D16 motherboard, +while they still have the proprietary ASUS BIOS present. This guide can also be +followed (adapted) if you brick you board, to know how to recover. -Disconnect the NVRAM battery:@* @image{../resources/images/t400/0033,,,,jpg} +For more general information about this board, refer to @ref{ASUS KGPE-D16 +motherboard,kgpe-d16}. -Disconnect the fan:@* @image{../resources/images/t400/0034,,,,jpg} +TODO: show photos here, and other info. -Unscrew these:@* @image{../resources/images/t400/0035,,,,jpg} @image{../resources/images/t400/0036,,,,jpg} @image{../resources/images/t400/0037,,,,jpg} @image{../resources/images/t400/0038,,,,jpg} +@menu +* KGPE-D16 boards and full systems with libreboot preinstalled:: External +* programmer - KGPE-D16:: +@end menu -Unscrew the heatsink, then lift it off:@* @image{../resources/images/t400/0039,,,,jpg} @image{../resources/images/t400/0040,,,,jpg} +@node KGPE-D16 boards and full systems with libreboot preinstalled @c +@subsubheading KGPE-D16 boards (and full systems) with libreboot preinstalled If +you don't want to install libreboot yourself, companies exist that sell these +boards with libreboot pre-installed, along with a free GNU/Linux distribution. -Disconnect the power jack:@* @image{../resources/images/t400/0041,,,,jpg} @image{../resources/images/t400/0042,,,,jpg} +Check the @uref{../../suppliers,suppliers} page for more information. -Loosen this:@* @image{../resources/images/t400/0043,,,,jpg} +@node External programmer - KGPE-D16 @c @subsubheading External programmer Refer +to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for a +guide on how to set up an external SPI programmer. -Remove this:@* @image{../resources/images/t400/0044,,,,jpg} @image{../resources/images/t400/0045,,,,jpg} @image{../resources/images/t400/0046,,,,jpg} @image{../resources/images/t400/0047,,,,jpg} @image{../resources/images/t400/0048,,,,jpg} +The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, which +you take out and then re-flash with libreboot, using the programmer. @strong{DO +NOT} remove the chip with your hands. Use a chip extractor tool. -Unscrew these:@* @image{../resources/images/t400/0049,,,,jpg} @image{../resources/images/t400/0050,,,,jpg} -Remove this:@* @image{../resources/images/t400/0051,,,,jpg} @image{../resources/images/t400/0052,,,,jpg} -Unscrew this:@* @image{../resources/images/t400/0053,,,,jpg} -Remove the motherboard (the cage is still attached) from the right hand side, then lift it out:@* @image{../resources/images/t400/0054,,,,jpg} @image{../resources/images/t400/0055,,,,jpg} @image{../resources/images/t400/0056,,,,jpg} +@node KCMA-D8 @subsubsection Initial flashing instructions for KCMA-D8 +@strong{Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules..} -Remove these screws, placing the screws in the same layout and marking each screw hole (so that you know what ones to put the screws back into later): @image{../resources/images/t400/0057,,,,jpg} @image{../resources/images/t400/0058,,,,jpg} @image{../resources/images/t400/0059,,,,jpg} @image{../resources/images/t400/0060,,,,jpg} @image{../resources/images/t400/0061,,,,jpg} @image{../resources/images/t400/0062,,,,jpg} +This guide is for those who want libreboot on their ASUS KGPE-D16 motherboard, +while they still have the proprietary ASUS BIOS present. This guide can also be +followed (adapted) if you brick you board, to know how to recover. -Separate the motherboard:@* @image{../resources/images/t400/0063,,,,jpg} @image{../resources/images/t400/0064,,,,jpg} +For more general information about this board, refer to @ref{ASUS KCMA-D8 +motherboard,kcma-d8}. -Connect your programmer, then connect GND and 3.3V@* @image{../resources/images/t400/0065,,,,jpg} @image{../resources/images/t400/0066,,,,jpg} @image{../resources/images/t400/0067,,,,jpg} @image{../resources/images/t400/0069,,,,jpg} @image{../resources/images/t400/0070,,,,jpg} @image{../resources/images/t400/0071,,,,jpg} +TODO: show photos here, and other info. -A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is also fine:@* @image{../resources/images/t400/0072,,,,jpg} +@menu +* KCMA-D8 boards and full systems with libreboot preinstalled:: External +* programmer - KCMA-D8:: +@end menu -Of course, make sure to turn on your PSU:@* @image{../resources/images/x200/disassembly/0013,,,,jpg} +@node KCMA-D8 boards and full systems with libreboot preinstalled @c +@subsubheading KCMA-D8 boards (and full systems) with libreboot preinstalled @c +NOTE: I added this section from ./install/kgpe-d16.texi because it was linked to +but nonexistent on website If you don't want to install libreboot yourself, +companies exist that sell these boards with libreboot pre-installed, along with +a free GNU/Linux distribution. -Now, you should be ready to install libreboot. +Check the @uref{../../suppliers,suppliers} page for more information. -Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, libreboot also distributes flashrom source code which can be built. +@node External programmer - KCMA-D8 @c @subsubheading External programmer Refer +to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for a +guide on how to set up an external SPI programmer. -Log in as root on your BBB, using the instructions in @ref{Accessing the operating system on the BBB,bbb_access}. +The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, which +you take out and then re-flash with libreboot, using the programmer. @strong{DO +NOT} remove the chip with your hands. Use a chip extractor tool. -Test that flashrom works:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: -@verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. -Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" -Please specify which chip definition to use with the -c <chipname> option. -@end verbatim -How to backup factory.rom (change the -c option as neeed, for your flash chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the @strong{-c} option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware that could be replicated in coreboot and libreboot. +@node ThinkPad X60 Recovery Guide @subsubsection ThinkPad X60: Recovery guide -Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM image, this is not what you want. @strong{Make sure to always change the MAC address to one that is correct for your system.} +This section documents how to recover from a bad flash that prevents your +ThinkPad X60 from booting. -Now flash it:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} +Types of brick: -@image{../resources/images/x200/disassembly/0015,,,,jpg} +@menu +* Bucts not reset - X60:: Bad rom or user error - X60:: +@end menu -You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the end, then it's flashed and should boot. If you see errors, try again (and again, and again); the message @strong{Chip content is identical to the requested image} is also an indication of a successful installation. +@node Bucts not reset - X60 @c @subsubheading Brick type 1: bucts not reset. +You still have Lenovo BIOS, or you had libreboot running and you flashed another +ROM; and you had bucts 1 set and the ROM wasn't dd'd.* or if Lenovo BIOS was +present and libreboot wasn't flashed.@*@* In this case, unbricking is easy: +reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting +it back after a minute or two:@* +@image{../resources/images/x60_unbrick/0004,,,,jpg}@*@* *Those dd commands +should be applied to all newly compiled X60 ROM images (the ROM images in +libreboot binary archives already have this applied!):@* dd if=coreboot.rom +of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k@* dd +if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | +hexdump@* dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s +coreboot.rom) - 0x20000] count=64k conv=notrunc@* (doing this makes the ROM +suitable for use when flashing a system that still has Lenovo BIOS running, +using those instructions: +@uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}. + +@node Bad rom or user error - X60 @c @subsubheading Brick type 2: Bad rom (or +user error), system won't boot In this scenario, you compiled a ROM that had an +incorrect configuration, or there is an actual bug preventing your system from +booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while +Lenovo BIOS was running. In any case, your system is bricked and will not boot +at all. + +"Unbricking" means flashing a known-good (working) ROM. The problem: you can't +boot the system, making this difficult. In this situation, external hardware +(see hardware requirements above) is needed which can flash the SPI chip (where +libreboot resides). + +Remove those screws:@* @image{../resources/images/x60_unbrick/0000,,,,jpg} @c +IMAGES + +Push the keyboard forward (carefully):@* +@image{../resources/images/x60_unbrick/0001,,,,jpg} + +Lift the keyboard up and disconnect it from the board:@* +@image{../resources/images/x60_unbrick/0002,,,,jpg} + +Grab the right-hand side of the chassis and force it off (gently) and pry up the +rest of the chassis:@* @image{../resources/images/x60_unbrick/0003,,,,jpg} -Example output from running the command (see above): +You should now have this:@* @image{../resources/images/x60_unbrick/0004,,,,jpg} -@verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Reading old flash chip contents... done. -Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 -ERASE FAILED! -Reading current flash chip contents... done. Looking for another erase function. -Erase/write done. -Verifying flash... VERIFIED. -@end verbatim +Disconnect the wifi antenna cables, the modem cable and the speaker:@* +@image{../resources/images/x60_unbrick/0005,,,,jpg} -@node Thermal paste - IMPORTANT - T400 -@c @subsubheading Thermal paste (IMPORTANT) -@anchor{paste-t400} -Because part of this procedure involved removing the heatsink, you will need to apply new paste. Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. +Unroute the cables along their path, carefully lifting the tape that holds them +in place. Then, disconnect the modem cable (other end) and power connection and +unroute all the cables so that they dangle by the monitor hinge on the +right-hand side:@* @image{../resources/images/x60_unbrick/0006,,,,jpg} -When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. +Disconnect the monitor from the motherboard, and unroute the grey antenna cable, +carefully lifting the tape that holds it into place:@* +@image{../resources/images/x60_unbrick/0008,,,,jpg} -@image{../resources/images/t400/paste,,,,jpg} +Carefully lift the remaining tape and unroute the left antenna cable so that it +is loose:@* @image{../resources/images/x60_unbrick/0009,,,,jpg} -NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. Other guides online detail the proper application procedure. +Remove the screw that is highlighted (do NOT remove the other one; it holds part +of the heatsink (other side) into place):@* +@image{../resources/images/x60_unbrick/0011,,,,jpg} -@node Wifi - T400 -@c @subsubheading Wifi -The T400 typically comes with an Intel wifi chipset, which does not work without proprietary software. For a list of wifi chipsets that work without proprietary software, see @ref{Recommended wifi chipsets,recommended_wifi}. +Remove those screws:@* @image{../resources/images/x60_unbrick/0012,,,,jpg} -Some T400 laptops might come with an Atheros chipset, but this is 802.11g only. +Carefully remove the plate, like so:@* +@image{../resources/images/x60_unbrick/0013,,,,jpg} -It is recommended that you install a new wifi chipset. This can only be done after installing libreboot, because the original firmware has a whitelist of approved chips, and it will refuse to boot if you use an 'unauthorized' wifi card. +Remove the SATA connector:@* @image{../resources/images/x60_unbrick/0014,,,,jpg} -The following photos show an Atheros AR5B95 being installed, to replace the Intel chip that this T400 came with:@* @image{../resources/images/t400/0012,,,,jpg} @image{../resources/images/t400/ar5b95,,,,jpg} +Now remove the motherboard (gently) and cast the lcd/chassis aside:@* +@image{../resources/images/x60_unbrick/0015,,,,jpg} -@node WWAN - T400 -@c @subsubheading WWAN -If you have a WWAN/3G card and/or sim card reader, remove them permanently. The WWAN-3G card has proprietary firmware inside; the technology is identical to what is used in mobile phones, so it can also track your movements. +Lift back that tape and hold it with something. Highlighted is the SPI flash +chip:@* @image{../resources/images/x60_unbrick/0016,,,,jpg} -Not to be confused with wifi (wifi is fine). +Now wire up the BBB and the Pomona with your PSU.@* Refer to @ref{How to program +an SPI flash chip with BeagleBone Black,bbb_setup} for how to setup the BBB for +flashing.@* @strong{Note, the guide mentions a 3.3v DC PSU but you don't need +this on the X60: if you don't have or don't want to use an external PSU, then +make sure not to connect the 3.3v leads mentioned in the guide; instead, connect +the AC adapter (the one that normally charges your battery) so that the board +has power (but don't boot it up)} +@image{../resources/images/x60_unbrick/0017,,,,jpg}@* Correlate the following +with the BBB guide linked above: -@node Memory - T400 -@c @subsubheading Memory -You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs (speed/size). Non-matching pairs won't work. You can also install a single module (meaning, one of the slots will be empty) in slot 0. +@verbatim POMONA 5250: === golden finger and wifi switch ==== 18 - +- 1 22 - - NC ---------- audio jacks are +on this end NC - - 21 3.3V (PSU) - - 17 - this is +pin 1 on the flash chip === CPU fan === This is how you will connect. Numbers +refer to pin numbers on the BBB, on the plugs near the DC jack. @end verbatim -Make sure that the RAM you buy is the 2Rx8 density. +Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was +used):@* @image{../resources/images/x60/th_bbb_flashing,,,,jpg} -@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be useful for RAM compatibility info -(note: coreboot raminit is different, so this page might be BS) +Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. +Alternatively, libreboot also distributes flashrom source code which can be +built. -The following photo shows 8GiB (2x4GiB) of RAM installed:@* @image{../resources/images/t400/memory,,,,jpg} +SSH'd into the BBB:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom} -@node Booting - T400 -@c @subsubheading Boot it! -You should see something like this: +It should be @strong{Verifying flash... VERIFIED} at the end. If flashrom +complains about multiple flash chip definitions detected, then choose one of +them following the instructions in the output. -@image{../resources/images/t400/boot0,,,,jpg} @image{../resources/images/t400/boot1,,,,jpg} +Remove the programmer and put it away somewhere. Put back the tape and press +firmly over it:@* @image{../resources/images/x60_unbrick/0026,,,,jpg} -Now @ref{GNU/Linux distributions,install GNU/Linux}. +Your empty chassis:@* @image{../resources/images/x60_unbrick/0027,,,,jpg} +Put the motherboard back in:@* +@image{../resources/images/x60_unbrick/0028,,,,jpg} -@node ThinkPad T500 -@subsubsection Flashing the T500 with a BeagleBone Black -Initial flashing instructions for T500. +Reconnect SATA:@* @image{../resources/images/x60_unbrick/0029,,,,jpg} -This guide is for those who want libreboot on their ThinkPad T500 while they still have the original Lenovo BIOS present. This guide can also be followed (adapted) if you brick your T500, to know how to recover. +Put the plate back and re-insert those screws:@* +@image{../resources/images/x60_unbrick/0030,,,,jpg} -@menu -* Libreboot T400 - T500:: -* Serial port - T500:: -* LCD compatibly - T500:: -* A note about CPUs - T500:: -* A note about GPUs - T500:: -* CPU paste required - T500:: -* Flash chip size - T500:: -* MAC address - T500:: -* Initial BBB configuration - T500:: -* The procedure - T500:: -* Thermal paste - IMPORTANT - T500:: -* Wifi - T500:: -* WWAN - T500:: -* Memory - T500:: -* Booting - T500:: -@end menu +Re-route that antenna cable around the fan and apply the tape:@* +@image{../resources/images/x60_unbrick/0031,,,,jpg} -@node Libreboot T400 - T500 -@c @subsubheading Libreboot T400 -You may also be interested in the smaller, more portable @ref{ThinkPad T400,Libreboot T400}. +Route the cable here and then (not shown, due to error on my part) reconnect the +monitor cable to the motherboard and re-insert the screws:@* +@image{../resources/images/x60_unbrick/0032,,,,jpg} -@node Serial port - T500 -@c @subsubheading Serial port -EHCI debug might not be needed. It has been reported that the docking station for this laptop has a serial port, so it might be possible to use that instead. +Re-insert that screw:@* @image{../resources/images/x60_unbrick/0033,,,,jpg} -@node LCD compatibly - T500 -@c @subsubheading LCD compatibly -Not all LCD panels are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. +Route the black antenna cable like so:@* +@image{../resources/images/x60_unbrick/0034,,,,jpg} -@node A note about CPUs - T500 -@c @subsubheading A note about CPUs -@uref{http://www.thinkwiki.org/wiki/Category:T500,ThinkWiki} has a list of CPUs for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot. The T9600 was also tested on the T400 and confirmed working, so the T9400/T9500/T9550 probably also work, but they are untested. +Tuck it in neatly like so:@* @image{../resources/images/x60_unbrick/0035,,,,jpg} -@itemize -@item -Quad-core CPUs -@itemize @minus -@item -Incompatible. Do not use. -@end itemize -@end itemize +Route the modem cable like so:@* +@image{../resources/images/x60_unbrick/0036,,,,jpg} -@node A note about GPUs - T500 -@c @subsubheading A note about GPUs -Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this is referred to as "switchable graphics". In the @emph{BIOS setup} program for lenovobios, you can specify that the system will use one or the other (but not both). +Connect modem cable to board and tuck it in neatly like so:@* +@image{../resources/images/x60_unbrick/0037,,,,jpg} -Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so native graphics initialization works all the same. +Route the power connection and connect it to the board like so:@* +@image{../resources/images/x60_unbrick/0038,,,,jpg} -@node CPU paste required - T500 -@c @subsubheading CPU paste required -See @xref{paste-t500,,paste}. +Route the antenna and modem cables neatly like so:@* +@image{../resources/images/x60_unbrick/0039,,,,jpg} -@node Flash chip size - T500 -@c @subsubheading Flash chip size -Use this to find out:@* # @strong{dmidecode | grep ROM\ Size} +Connect the wifi antenna cables. At the start of the tutorial, this system had +an Intel wifi chip. Here you see I've replaced it with an Atheros AR5B95 +(supports 802.11n and can be used without blobs):@* +@image{../resources/images/x60_unbrick/0040,,,,jpg} -@node MAC address - T500 -@c @subsubheading MAC address -On the T500, the MAC address for the onboard gigabit ethernet chipset is stored inside the flash chip, along with other configuration data. +Connect the modem cable:@* @image{../resources/images/x60_unbrick/0041,,,,jpg} -Keep a note of the MAC address before disassembly; this is very important, because you will need to insert this into the libreboot ROM image before flashing it. It will be written in one of these locations: +Connect the speaker:@* @image{../resources/images/x60_unbrick/0042,,,,jpg} -@image{../resources/images/t400/macaddress0,,,,jpg} @image{../resources/images/t400/macaddress1,,,,jpg} @image{../resources/images/x200/disassembly/0001,,,,jpg} +You should now have this:@* @image{../resources/images/x60_unbrick/0043,,,,jpg} -@node Initial BBB configuration - T500 -@c @subsubheading Initial BBB configuration -Refer to @ref{How to program an SPI flash chip with BeagleBone Black,bbb_setup} for how to configure the BBB for flashing. +Re-connect the upper chassis:@* +@image{../resources/images/x60_unbrick/0044,,,,jpg} -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +Re-connect the keyboard:@* @image{../resources/images/x60_unbrick/0045,,,,jpg} -@verbatim -POMONA 5252 (correlate with the BBB guide) -=== ethernet jack and VGA port ==== - NC - - 21 - 1 - - 17 - NC - - NC - NC - - NC - NC - - NC - NC - - NC - 18 - - 3.3V (PSU) - 22 - - NC - this is pin 1 on the flash chip -=== SATA port === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim +Re-insert the screws that you removed earlier:@* +@image{../resources/images/x60_unbrick/0046,,,,jpg} -The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +Power on!@* @image{../resources/images/x60_unbrick/0047,,,,jpg} -@verbatim -POMONA 5250 (correlate with the BBB guide) -=== RAM slots ==== - 18 - - 1 - 22 - - NC - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip -=== slot where the AC jack is connected === -This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. -@end verbatim +Trisquel live USB menu (using the GRUB ISOLINUX parser):@* +@image{../resources/images/x60_unbrick/0048,,,,jpg} +Trisquel live desktop:@* @image{../resources/images/x60_unbrick/0049,,,,jpg} -@node The procedure - T500 -@c @subsubheading The procedure -Remove all screws:@* @image{../resources/images/t500/0000,,,,jpg}@* It is also advisable to, throughout the disassembly, place any screws and/or components that you removed in the same layout or arrangement. The follow photos demonstrate this:@* @image{../resources/images/t500/0001,,,,jpg} @image{../resources/images/t500/0002,,,,jpg} -Remove the HDD/SSD and optical drive:@* @image{../resources/images/t500/0003,,,,jpg} @image{../resources/images/t500/0004,,,,jpg} -Remove the palm rest:@* @image{../resources/images/t500/0005,,,,jpg} @image{../resources/images/t500/0006,,,,jpg} +@node ThinkPad X60 Tablet Recovery Guide @subsubsection ThinkPad X60 Tablet +Recovery Guide This section documents how to recover from a bad flash that +prevents your ThinkPad X60 Tablet from booting. -Remove the keyboard and rear bezel:@* @image{../resources/images/t500/0007,,,,jpg} @image{../resources/images/t500/0008,,,,jpg} @image{../resources/images/t500/0009,,,,jpg} @image{../resources/images/t500/0010,,,,jpg} @image{../resources/images/t500/0011,,,,jpg} @image{../resources/images/t500/0012,,,,jpg} +Types of brick: -If you have a WWAN/3G card and/or sim card reader, remove them permanently. The WWAN-3G card has proprietary firmware inside; the technology is identical to what is used in mobile phones, so it can also track your movements:@* @image{../resources/images/t500/0013,,,,jpg} @image{../resources/images/t500/0017,,,,jpg} @image{../resources/images/t500/0018,,,,jpg} +@menu +* Bucts not reset - X60 Tablet:: Bad rom or user error - X60 Tablet:: +@end menu -Remove this frame, and then remove the wifi chip:@* @image{../resources/images/t500/0014,,,,jpg} @image{../resources/images/t500/0015,,,,jpg} @image{../resources/images/t500/0016,,,,jpg} +@node Bucts not reset - X60 Tablet @c @subsubheading Brick type 1: bucts not +reset. You still have Lenovo BIOS, or you had libreboot running and you flashed +another ROM; and you had bucts 1 set and the ROM wasn't dd'd.* or if Lenovo BIOS +was present and libreboot wasn't flashed.@*@* In this case, unbricking is easy: +reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting +it back after a minute or two:@* +@image{../resources/images/x60t_unbrick/0008,,,,JPG}@*@* *Those dd commands +should be applied to all newly compiled X60 ROM images (the ROM images in +libreboot binary archives already have this applied!):@* dd if=coreboot.rom +of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k@* dd +if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | +hexdump@* dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s +coreboot.rom) - 0x20000] count=64k conv=notrunc@* (doing this makes the ROM +suitable for use when flashing a system that still has Lenovo BIOS running, +using those instructions: +@uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}. + +@node Bad rom or user error - X60 Tablet @c @subsubheading Brick type 2: Bad rom +(or user error), system won't boot In this scenario, you compiled a ROM that had +an incorrect configuration, or there is an actual bug preventing your system +from booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash +while Lenovo BIOS was running. In any case, your system is bricked and will not +boot at all. + +"Unbricking" means flashing a known-good (working) ROM. The problem: you can't +boot the system, making this difficult. In this situation, external hardware +(see hardware requirements above) is needed which can flash the SPI chip (where +libreboot resides). -Remove the speakers:@* @image{../resources/images/t500/0019,,,,jpg} @image{../resources/images/t500/0020,,,,jpg} @image{../resources/images/t500/0021,,,,jpg} @image{../resources/images/t500/0022,,,,jpg} @image{../resources/images/t500/0023,,,,jpg} @image{../resources/images/t500/0024,,,,jpg} @image{../resources/images/t500/0025,,,,jpg} +@image{../resources/images/x60t_unbrick/0000,,,,JPG} -Remove the NVRAM battery (already removed in this photo):@* @image{../resources/images/t500/0026,,,,jpg} +Remove those screws:@* @image{../resources/images/x60t_unbrick/0001,,,,JPG} -When you re-assemble, you will be replacing the wifi chip with another. These two screws don't hold anything together, but they are included in your system because the screw holes for half-height cards are a different size, so use these if you will be installing a half-height card:@* @image{../resources/images/t500/0027,,,,jpg} +Remove the HDD:@* @image{../resources/images/x60t_unbrick/0002,,,,JPG} -Unroute the antenna wires:@* @image{../resources/images/t500/0028,,,,jpg} @image{../resources/images/t500/0029,,,,jpg} @image{../resources/images/t500/0030,,,,jpg} @image{../resources/images/t500/0031,,,,jpg} +Push keyboard forward to loosen it:@* +@image{../resources/images/x60t_unbrick/0003,,,,JPG} -Disconnect the LCD cable from the motherboard:@* @image{../resources/images/t500/0032,,,,jpg} @image{../resources/images/t500/0033,,,,jpg} +Lift:@* @image{../resources/images/x60t_unbrick/0004,,,,JPG} -Remove the LCD assembly hinge screws, and then remove the LCD assembly:@* @image{../resources/images/t500/0034,,,,jpg} @image{../resources/images/t500/0035,,,,jpg} @image{../resources/images/t500/0036,,,,jpg} +Remove those:@* @image{../resources/images/x60t_unbrick/0005,,,,JPG} -Remove the fan and heatsink:@* @image{../resources/images/t500/0037,,,,jpg} @image{../resources/images/t500/0038,,,,jpg} @image{../resources/images/t500/0039,,,,jpg} +@image{../resources/images/x60t_unbrick/0006,,,,JPG} -Remove this screw:@* @image{../resources/images/t500/0040,,,,jpg} +Also remove that (marked) and unroute the antenna cables:@* +@image{../resources/images/x60t_unbrick/0007,,,,JPG} -Remove these cables, keeping note of how and in what arrangement they are connected:@* @image{../resources/images/t500/0041,,,,jpg} @image{../resources/images/t500/0042,,,,jpg} @image{../resources/images/t500/0043,,,,jpg} @image{../resources/images/t500/0044,,,,jpg} @image{../resources/images/t500/0045,,,,jpg} @image{../resources/images/t500/0046,,,,jpg} @image{../resources/images/t500/0047,,,,jpg} @image{../resources/images/t500/0048,,,,jpg} @image{../resources/images/t500/0049,,,,jpg} +For some X60T laptops, you have to unroute those too:@* +@image{../resources/images/x60t_unbrick/0010,,,,JPG} -Disconnect the power jack:@* @image{../resources/images/t500/0050,,,,jpg} @image{../resources/images/t500/0051,,,,jpg} +Remove the LCD extend board screws. Also remove those screws (see blue marks) +and remove/unroute the cables and remove the metal plate:@* +@image{../resources/images/x60t_unbrick/0008,,,,JPG} -Remove the motherboard and cage from the base (the marked hole is where those cables were routed through):@* @image{../resources/images/t500/0052,,,,jpg} @image{../resources/images/t500/0053,,,,jpg} +Remove that screw and then remove the board:@* +@image{../resources/images/x60t_unbrick/0009,,,,JPG} -Remove all screws, arranging them in the same layout when placing the screws on a surface and marking each screw hole (this is to reduce the possibility of putting them back in the wrong holes):@* @image{../resources/images/t500/0054,,,,jpg} @image{../resources/images/t500/0055,,,,jpg} +Now wire up the BBB and the Pomona with your PSU.@* Refer to @ref{How to program +an SPI flash chip with BeagleBone Black,bbb_setup} for how to setup the BBB for +flashing.@* @strong{Note, the guide mentions a 3.3v DC PSU but you don't need +this on the X60 Tablet: if you don't have or don't want to use an external PSU, +then make sure not to connect the 3.3v leads mentioned in the guide; instead, +connect the AC adapter (the one that normally charges your battery) so that the +board has power (but don't boot it up)} +@image{../resources/images/x60t_unbrick/0011,,,,JPG}@* Correlate the following +with the BBB guide linked above: -Also remove this:@* @image{../resources/images/t500/0056,,,,jpg} @image{../resources/images/t500/0057,,,,jpg} +@verbatim POMONA 5250: === golden finger and wifi switch ==== 18 - +- 1 22 - - NC ---------- audio jacks are +on this end NC - - 21 3.3V (PSU) - - 17 - this is +pin 1 on the flash chip === CPU fan === This is how you will connect. Numbers +refer to pin numbers on the BBB, on the plugs near the DC jack. @end verbatim -Separate the motherboard from the cage:@* @image{../resources/images/t500/0058,,,,jpg} @image{../resources/images/t500/0059,,,,jpg} +Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was +used):@* @image{../resources/images/x60/th_bbb_flashing,,,,jpg} -The flash chip is next to the memory slots. On this system, it was a SOIC-8 (4MiB or 32Mb) flash chip:@* @image{../resources/images/t500/0060,,,,jpg} +Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. +Alternatively, libreboot also distributes flashrom source code which can be +built. -Connect your programmer, then connect GND and 3.3V@* @image{../resources/images/t500/0061,,,,jpg}@* @image{../resources/images/t400/0067,,,,jpg} @image{../resources/images/t400/0069,,,,jpg} @image{../resources/images/t400/0070,,,,jpg} @image{../resources/images/t400/0071,,,,jpg} +SSH'd into the BBB:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom} -A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is also fine:@* @image{../resources/images/t400/0072,,,,jpg} +It should be @strong{Verifying flash... VERIFIED} at the end. If flashrom +complains about multiple flash chip definitions detected, then choose one of +them following the instructions in the output. -Of course, make sure to turn on your PSU:@* @image{../resources/images/x200/disassembly/0013,,,,jpg} +Reverse the steps to re-assemble your system. -Now, you should be ready to install libreboot. -Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, libreboot also distributes flashrom source code which can be built. -Log in as root on your BBB, using the instructions in @ref{Accessing the operating system on the BBB,bbb_access}. +@node ThinkPad T60 Recovery Guide @subsubsection ThinkPad T60 Recovery Guide +This section documents how to recover from a bad flash that prevents your +ThinkPad T60 from booting. -Test that flashrom works:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: +Types of brick: -@verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. -Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" -Please specify which chip definition to use with the -c <chipname> option. -@end verbatim +@menu +* Bucts not reset - T60:: Bad rom or user error - T60:: +@end menu -How to backup factory.rom (change the -c option as neeed, for your flash chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the @strong{-c} option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware that could be replicated in coreboot and libreboot. +@node Bucts not reset - T60 @c @subsubheading Brick type 1: bucts not reset. +You still have Lenovo BIOS, or you had libreboot running and you flashed another +ROM; and you had bucts 1 set and the ROM wasn't dd'd.* or if Lenovo BIOS was +present and libreboot wasn't flashed.@*@* In this case, unbricking is easy: +reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting +it back after a minute or two:@* +@image{../resources/images/t60_dev/0006,,,,JPG}@*@* *Those dd commands should be +applied to all newly compiled T60 ROM images (the ROM images in libreboot binary +archives already have this applied!):@* dd if=coreboot.rom of=top64k.bin bs=1 +skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k@* dd if=coreboot.rom bs=1 +skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump@* dd +if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] +count=64k conv=notrunc@* (doing this makes the ROM suitable for use when +flashing a system that still has Lenovo BIOS running, using those instructions: +@uref{http://www.coreboot.org/Board:lenovo/x60/Installation,http://www.coreboot.org/Board:lenovo/x60/Installation}. +(it says x60, but instructions for t60 are identical) + +@node Bad rom or user error - T60 @c @subsubheading bad rom (or user error), +system won't boot In this scenario, you compiled a ROM that had an incorrect +configuration, or there is an actual bug preventing your system from booting. +Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS +was running. In any case, your system is bricked and will not boot at all. + +"Unbricking" means flashing a known-good (working) ROM. The problem: you can't +boot the system, making this difficult. In this situation, external hardware +(see hardware requirements above) is needed which can flash the SPI chip (where +libreboot resides). + +Remove those screws and remove the HDD:@* +@image{../resources/images/t60_dev/0001,,,,JPG} +@image{../resources/images/t60_dev/0002,,,,JPG} -Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM image, this is not what you want. @strong{Make sure to always change the MAC address to one that is correct for your system.} +Lift off the palm rest:@* @image{../resources/images/t60_dev/0003,,,,JPG} -Now flash it:@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} +Lift up the keyboard, pull it back a bit, flip it over like that and then +disconnect it from the board:@* @image{../resources/images/t60_dev/0004,,,,JPG} +@image{../resources/images/t60_dev/0005,,,,JPG} +@image{../resources/images/t60_dev/0006,,,,JPG} -@image{../resources/images/x200/disassembly/0015,,,,jpg} +Gently wedge both sides loose:@* @image{../resources/images/t60_dev/0007,,,,JPG} +@image{../resources/images/t60_dev/0008,,,,JPG} -You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the end, then it's flashed and should boot. If you see errors, try again (and again, and again); the message @strong{Chip content is identical to the requested image} is also an indication of a successful installation. +Remove that cable from the position:@* +@image{../resources/images/t60_dev/0009,,,,JPG} +@image{../resources/images/t60_dev/0010,,,,JPG} -Example output from running the command (see above): +Now remove that bezel. Remove wifi, nvram battery and speaker connector (also +remove 56k modem, on the left of wifi):@* +@image{../resources/images/t60_dev/0011,,,,JPG} -@verbatim -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Reading old flash chip contents... done. -Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 -ERASE FAILED! -Reading current flash chip contents... done. Looking for another erase function. -Erase/write done. -Verifying flash... VERIFIED. -@end verbatim +Remove those screws:@* @image{../resources/images/t60_dev/0012,,,,JPG} +Disconnect the power jack:@* @image{../resources/images/t60_dev/0013,,,,JPG} -@node Thermal paste - IMPORTANT - T500 -@c @subsubheading Thermal paste (IMPORTANT) -@anchor{paste-t500} -Because part of this procedure involved removing the heatsink, you will need to apply new paste. Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. +Remove nvram battery:@* @image{../resources/images/t60_dev/0014,,,,JPG} -When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. +Disconnect cable (for 56k modem) and disconnect the other cable:@* +@image{../resources/images/t60_dev/0015,,,,JPG} +@image{../resources/images/t60_dev/0016,,,,JPG} -@image{../resources/images/t400/paste,,,,jpg} +Disconnect speaker cable:@* @image{../resources/images/t60_dev/0017,,,,JPG} -NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. Other guides online detail the proper application procedure. +Disconnect the other end of the 56k modem cable:@* +@image{../resources/images/t60_dev/0018,,,,JPG} -@node Wifi - T500 -@c @subsubheading Wifi -The T500 typically comes with an Intel wifi chipset, which does not work without proprietary software. For a list of wifi chipsets that work without proprietary software, see @ref{Recommended wifi chipsets,recommended_wifi}. +Make sure you removed it:@* @image{../resources/images/t60_dev/0019,,,,JPG} -Some T500 laptops might come with an Atheros chipset, but this is 802.11g only. +Unscrew those:@* @image{../resources/images/t60_dev/0020,,,,JPG} -It is recommended that you install a new wifi chipset. This can only be done after installing libreboot, because the original firmware has a whitelist of approved chips, and it will refuse to boot if you use an 'unauthorized' wifi card. +Make sure you removed those:@* @image{../resources/images/t60_dev/0021,,,,JPG} -The following photos show an Atheros AR5B95 being installed, to replace the Intel chip that this T500 came with:@* @image{../resources/images/t400/0012,,,,jpg} @image{../resources/images/t400/ar5b95,,,,jpg} +Disconnect LCD cable from board:@* +@image{../resources/images/t60_dev/0022,,,,JPG} + +Remove those screws then remove the LCD assembly:@* +@image{../resources/images/t60_dev/0023,,,,JPG} +@image{../resources/images/t60_dev/0024,,,,JPG} +@image{../resources/images/t60_dev/0025,,,,JPG} + +Once again, make sure you removed those:@* +@image{../resources/images/t60_dev/0026,,,,JPG} + +Remove the shielding containing the motherboard, then flip it over. Remove these +screws, placing them on a steady surface in the same layout as they were in +before you removed them. Also, you should mark each screw hole after removing +the screw (a permanent marker pen will do), this is so that you have a point of +reference when re-assembling the system:@* +@image{../resources/images/t60_dev/0027,,,,JPG} +@image{../resources/images/t60_dev/0028,,,,JPG} +@image{../resources/images/t60_dev/0029,,,,JPG} +@image{../resources/images/t60_dev/0031,,,,JPG} +@image{../resources/images/t60_dev/0032,,,,JPG} +@image{../resources/images/t60_dev/0033,,,,JPG} + +Now wire up the BBB and the Pomona with your PSU.@* Refer to @ref{How to program +an SPI flash chip with BeagleBone Black,bbb_setup} for how to setup the BBB for +flashing.@* @strong{Note, the guide mentions a 3.3v DC PSU but you don't need +this on the T60: if you don't have or don't want to use an external PSU, then +make sure not to connect the 3.3v leads mentioned in the guide; instead, connect +the AC adapter (the one that normally charges your battery) so that the board +has power (but don't boot it up)}@* +@image{../resources/images/t60_dev/0030,,,,JPG}@* Correlate the following with +the BBB guide linked above: + +@verbatim POMONA 5250: === DVD drive ==== 18 - - 1 22 +- - NC ---- RAM is on this end NC - - 21 +3.3V (PSU) - - 17 - this is pin 1 on the flash chip === audio jacks +=== This is how you will connect. Numbers refer to pin numbers on the BBB, on +the plugs near the DC jack. @end verbatim + +Connect the pomona from the BBB to the flash chip. No pics unfortunately. (use +the text diagram above). + +Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. +Alternatively, libreboot also distributes flashrom source code which can be +built. + +SSH'd into the BBB:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom} + +It should be @strong{Verifying flash... VERIFIED} at the end. If flashrom +complains about multiple flash chip definitions detected, then choose one of +them following the instructions in the output. -@node WWAN - T500 -@c @subsubheading WWAN -If you have a WWAN/3G card and/or sim card reader, remove them permanently. The WWAN-3G card has DMA, and proprietary firmware inside; the technology is identical to what is used in mobile phones, so it can also track your movements. +Put those screws back:@* @image{../resources/images/t60_dev/0047,,,,JPG} -Not to be confused with wifi (wifi is fine). +Put it back into lower chassis:@* +@image{../resources/images/t60_dev/0048,,,,JPG} -@node Memory - T500 -@c @subsubheading Memory -You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs (speed/size). Non-matching pairs won't work. You can also install a single module (meaning, one of the slots will be empty) in slot 0. +Attach LCD and insert screws (also, attach the lcd cable to the board):@* +@image{../resources/images/t60_dev/0049,,,,JPG} -Make sure that the RAM you buy is the 2Rx8 density. +Insert those screws:@* @image{../resources/images/t60_dev/0050,,,,JPG} -@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be useful for RAM compatibility info -(note: coreboot raminit is different, so this page might be BS) +On the CPU (and there is another chip south-east to it, sorry forgot to take +pic) clean off the old thermal paste (with the alcohol) and apply new (Artic +Silver 5 is good, others are good too) you should also clean the heatsink the +same way@* @image{../resources/images/t60_dev/0051,,,,JPG} -The following photo shows 8GiB (2x4GiB) of RAM installed:@* @image{../resources/images/t400/memory,,,,jpg} +Attach the heatsink and install the screws (also, make sure to install the AC +jack as highlighted):@* @image{../resources/images/t60_dev/0052,,,,JPG} -@node Booting - T500 -@c @subsubheading Boot it! -You should see something like this: +Reinstall that upper bezel:@* @image{../resources/images/t60_dev/0053,,,,JPG} -@image{../resources/images/t500/0062,,,,jpg} +Do that:@* @image{../resources/images/t60_dev/0054,,,,JPG} +@image{../resources/images/t60_dev/0055,,,,JPG} -Now @ref{GNU/Linux distributions,install GNU/Linux}. +Re-attach modem, wifi, (wwan?), and all necessary cables. Sorry, forgot to take +pics. Look at previous removal steps to see where they go back to. +Attach keyboard and install nvram battery:@* +@image{../resources/images/t60_dev/0056,,,,JPG} +@image{../resources/images/t60_dev/0057,,,,JPG} +Place keyboard and (sorry, forgot to take pics) reinstall the palmrest and +insert screws on the underside:@* +@image{../resources/images/t60_dev/0058,,,,JPG} +It lives!@* @image{../resources/images/t60_dev/0071,,,,JPG} +@image{../resources/images/t60_dev/0072,,,,JPG} +@image{../resources/images/t60_dev/0073,,,,JPG} +Always stress test ('stress -c 2' and xsensors. below 90C is ok) when replacing +cpu paste/heatsink:@* @image{../resources/images/t60_dev/0074,,,,JPG} -@node GNU/Linux distributions -@section GNU/Linux distributions -This section relates to dealing with GNU/Linux distributions: preparing bootable USB drives, changing the default GRUB menu and so on. +@node ThinkPad X200/X200S/X200T @subsubsection Flashing the X200 with a +BeagleBone Black Initial flashing instructions for X200. -@strong{This section is only for the *GRUB* payload. For depthcharge, instructions have yet to be written.} +This guide is for those who want libreboot on their ThinkPad X200 while they +still have the original Lenovo BIOS present. This guide can also be followed +(adapted) if you brick your X200, to know how to recover. @menu -* How to install GNU/Linux on a libreboot system:: -* How to replace the default GRUB configuration file on a libreboot system:: -* Writing a GRUB configuration file:: -* Installing Parabola GNU/Linux-libre with full disk encryption:: (Including /boot) -* Configuring Parabola post-install:: -* Installing Trisquel GNU/Linux-libre with full disk encryption:: (Including /boot) +* X200 laptops with libreboot pre-installed:: Flash chip size - X200:: MAC +* address - X200:: Initial BBB configuration - X200:: The procedure - X200:: +* Wifi - X200:: WWAN - X200:: Memory - X200:: Booting - X200:: X200S and X200 +* Tablet users GPIO33 trick will not work:: @end menu -@node How to install GNU/Linux on a libreboot system -@subsection How to install GNU/Linux on a libreboot system -This section relates to preparing, booting and installing a GNU/Linux distribution on your libreboot system, using nothing more than a USB flash drive (and @emph{dd}). - -@strong{This section is only for the GRUB payload. For depthcharge (used on CrOS devices in libreboot), instructions have yet to be written in the libreboot documentation.} +@node X200 laptops with libreboot pre-installed @c @subsubheading X200 laptops +with libreboot pre-installed If you don't want to install libreboot yourself, +companies exist that sell these laptops with libreboot pre-installed, along with +a free GNU/Linux distribution. -@menu -* Prepare the USB drive in GNU/Linux:: -* Installing GNU/Linux with full disk encryption:: -* GNU Guix System Distribution?:: -* Trisquel net install?:: -* Booting ISOLINUX images - automatic method:: -* Booting ISOLINUX images - manual method:: -* Troubleshooting GNU/Linux installation:: -@end menu +Check the @uref{../../suppliers,suppliers} page for more information. -@node Prepare the USB drive in GNU/Linux -@subsubsection Prepare the USB drive (in GNU/Linux) -Connect the USB drive. Check dmesg:@* @strong{$ dmesg}@* Check lsblk to confirm which drive it is:@* @strong{$ lsblk} +@node Flash chip size - X200 @c @subsubheading Flash chip size - X200 Use this +to find out:@* # @strong{dmidecode | grep ROM\ Size} -Check that it wasn't automatically mounted. If it was, unmount it. For example:@* @strong{$ sudo umount /dev/sdX*}@* @strong{# umount /dev/sdX*} +The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of the +motherboard (this requires removal of the motherboard). @strong{Not all +X200S/X200T are supported; see @ref{X200S and X200 Tablet,x200s}.} -dmesg told you what device it is. Overwrite the drive, writing your distro ISO to it with dd. For example:@* @strong{$ sudo dd if=gnulinux.iso of=/dev/sdX bs=8M; sync}@* @strong{# dd if=gnulinux.iso of=/dev/sdX bs=8M; sync} -You should now be able to boot the installer from your USB drive. Continue reading, for information about how to do that. +@node MAC address - X200 @c @subsubheading MAC address - X200 On the +X200/X200S/X200T, the MAC address for the onboard gigabit ethernet chipset is +stored inside the flash chip, along with other configuration data. -@node Installing GNU/Linux with full disk encryption -@subsubsection Installing GNU/Linux with full disk encryption -@itemize -@item -@ref{Installing Trisquel GNU/Linux-libre with full disk encryption,Installing Trisquel GNU/Linux with full disk encryption (including /boot)} -@item -@ref{Installing Parabola GNU/Linux-libre with full disk encryption,Installing Parabola GNU/Linux with full disk encryption (including /boot)} -@end itemize +Keep a note of the MAC address before disassembly; this is very important, +because you will need to insert this into the libreboot ROM image before +flashing it. It will be written in one of these locations: -@node GNU Guix System Distribution? -@subsubsection GNU Guix System Distribution? -The Guix installers use the GRUB bootloader, unlike most GNU/Linux installers which will likely use ISOLINUX. @c TYPO: uses > use +@image{../resources/images/x200/disassembly/0002,,,,jpg} +@image{../resources/images/x200/disassembly/0001,,,,jpg} -To boot the Guix live USB install, select @strong{@emph{Search for GRUB configuration (grub.cfg) outside of CBFS}} from the GRUB payload menu. After you have done that, a new menuentry will appear at the very bottom with text like @strong{@emph{Load Config from (usb0)}}; select that, and it should boot. +@node Initial BBB configuration - X200 @c @subsubheading Initial BBB +configuration - X200 Refer to @ref{How to program an SPI flash chip with +BeagleBone Black,bbb_setup} for how to set up the BBB for flashing. -Once you have installed Guix onto the main storage device, check @ref{1st option - don't re-flash,option1_dont_reflash} for hints on how to boot it. +The following shows how to connect the clip to the BBB (on the P9 header), for +SOIC-16 (clip: Pomona 5252): -GuixSD (Guix System Distribution) is highly recommended; it's part of GNU, and @uref{https://www.gnu.org/distros/free-distros.html,endorsed} by the Free Software Foundation. +@verbatim POMONA 5252 (correlate with the BBB guide) === front (display) on +your X200 ==== NC - - 21 1 - - 17 NC +- - NC NC - - NC NC - - NC NC +- - NC 18 - - 3.3V (PSU) 22 - - NC - + this is pin 1 on the flash chip === back (palmrest) on your X200 === + This is how you will connect. Numbers refer to pin numbers on the BBB, + on the plugs near the DC jack. Here is a photo of the SOIC-16 flash + chip. Pins are labelled: + +@end verbatim -@node Trisquel net install? -@subsubsection Trisquel net install? -Tip: don't use the official net install image. Download the full GNOME ISO (the ~1.5GiB one). In this ISO, there is still the capability to boot the net install, while it also provides an easy to use live system (which you can boot from USB). This ISO also works using @emph{syslinux_configfile -i} (the @emph{Parse ISOLINUX} menu entries in the default GRUB configuration that libreboot uses). +The following shows how to connect the clip to the BBB (on the P9 header), for +SOIC-8 (clip: Pomona 5250): + +@verbatim POMONA 5250 (correlate with the BBB guide) === left side of the X200 +(where the VGA port is) ==== 18 - - 1 22 - +- NC NC - - 21 3.3V (PSU) - - 17 - this is pin 1 +on the flash chip. in front of it is the screen. === right side of the X200 +(where the audio jacks are) === This is how you will connect. Numbers refer to +pin numbers on the BBB, on the plugs near the DC jack. Here is a photo of the +SOIC-8 flash chip. The pins are labelled: + + +Look at the pads in that photo, on the left and right. Those are for SOIC-16. +Would it be possible to remove the SOIC-8 and solder a SOIC-16 chip on those +pins? @end verbatim + +@strong{On the X200S and X200 Tablet the flash chip is underneath the board, in +a WSON package. The pinout is very much the same as a SOIC-8, except you need to +solder (there are no clips available).@* The following image shows how this is +done:}@* @image{../resources/images/x200/wson_soldered,,,,jpg} @* In this image, +a pin header was soldered onto the WSON. Another solution might be to de-solder +the WSON-8 chip and put a SOIC-8 there instead. Check the list of SOIC-8 flash +chips at @ref{Flash chips,flashchips} but do note that these are only 4MiB +(32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB +capacity in this case, the X201 SOIC-8 flash chip (Macronix 25L6445E) might +work. + +@node The procedure - X200 @c @subsubheading The procedure - X200 This section +is for the X200. This does not apply to the X200S or X200 Tablet (for those +systems, you have to remove the motherboard completely, since the flash chip is +on the other side of the board). -@node Booting ISOLINUX images - automatic method -@subsubsection Booting ISOLINUX images (automatic method) -Boot it in GRUB using the @emph{Parse ISOLINUX config (USB)} option. A new menu should appear in GRUB, showing the boot options for that distro; this is a GRUB menu, converted from the usual ISOLINUX menu provided by that distro. +Remove these screws:@* @image{../resources/images/x200/disassembly/0003,,,,jpg} -@node Booting ISOLINUX images - manual method -@subsubsection Booting ISOLINUX images (manual method) -@emph{These are generic instructions. They may or may not be correct for your distribution. You must adapt them appropriately, for whatever GNU/Linux distribution it is that you are trying to install.} +Push the keyboard forward, gently, then lift it off and disconnect it from the +board:@* @image{../resources/images/x200/disassembly/0004,,,,jpg} +@image{../resources/images/x200/disassembly/0005,,,,jpg} -If the ISOLINUX parser or @emph{Search for GRUB configuration} options won't work, then press C in GRUB to access the command line.@* grub> @strong{ls}@* Get the device from above output, eg (usb0). Example:@* grub> @strong{cat (usb0)/isolinux/isolinux.cfg}@* Either this will show the ISOLINUX menuentries for that ISO, or link to other .cfg files, for example /isolinux/foo.cfg.@* If it did that, then you do:@* grub> @strong{cat (usb0)/isolinux/foo.cfg}@* And so on, until you find the correct menuentries for ISOLINUX. @strong{The file @emph{/isolinux/foo.cfg} is a fictional example. Do not actually use this example, unless you actually have that file, if it is appropriate.} +Pull the palm rest off, lifting from the left and right side at the back of the +palm rest:@* @image{../resources/images/x200/disassembly/0006,,,,jpg} -For Trisquel (and other debian-based distros), there are typically menuentries listed in @emph{/isolinux/txt.cfg} or @emph{/isolinux/gtk.cfg}. For dual-architecture ISO images (i686 and x86_64), there may be separate files/directories for each architecture. Just keep searching through the image, until you find the correct ISOLINUX configuration file. +Lift back the tape that covers a part of the flash chip, and then connect the +clip:@* @image{../resources/images/x200/disassembly/0007,,,,jpg} +@image{../resources/images/x200/disassembly/0008,,,,jpg} -Now look at the ISOLINUX menuentry. It'll look like:@* @strong{kernel /path/to/kernel@* append PARAMETERS initrd=/path/to/initrd MAYBE_MORE_PARAMETERS@*} GRUB works the same way, but in it's own way. Example GRUB commands:@* grub> @strong{set root='usb0'}@* grub> @strong{linux /path/to/kernel PARAMETERS MAYBE_MORE_PARAMETERS}@* grub> @strong{initrd /path/to/initrd}@* grub> @strong{boot}@* Note: @emph{usb0} may be incorrect. Check the output of the @emph{ls} command in GRUB, to see a list of USB devices/partitions. Of course this will vary from distro to distro. If you did all of that correctly, then it should now be booting your USB drive in the way that you specified. +On pin 2 of the BBB, where you have the ground (GND), connect the ground to your +PSU:@* @image{../resources/images/x200/disassembly/0009,,,,jpg} +@image{../resources/images/x200/disassembly/0010,,,,jpg} +Connect the 3.3V supply from your PSU to the flash chip (via the clip):@* +@image{../resources/images/x200/disassembly/0011,,,,jpg} +@image{../resources/images/x200/disassembly/0012,,,,jpg} -@node Troubleshooting GNU/Linux installation -@subsubsection Troubleshooting GNU/Linux installation -Most of these issues occur when using libreboot with coreboot's 'text mode' instead of the coreboot framebuffer. This mode is useful for booting payloads like memtest86+ which expect text-mode, but for GNU/Linux distributions it can be problematic when they are trying to switch to a framebuffer because it doesn't exist. +Of course, make sure that your PSU is also plugged in and turn on:@* +@image{../resources/images/x200/disassembly/0013,,,,jpg} -In most cases, you should use the vesafb ROM images. Example filename: libreboot_ukdvorak_vesafb.rom. +This tutorial tells you to use an ATX PSU, for the 3.3V DC supply. The PSU used +when taking these photos is actually not an ATX PSU, but a PSU that is designed +specifically for providing 3.3V DC (an ATX PSU will also work):@* +@image{../resources/images/x200/disassembly/0014,,,,jpg} -@menu -* Parabola won't boot in text-mode:: -* Debian-installer graphical corruption in text-mode:: (Trisquel net install) -@end menu +Now, you should be ready to install libreboot. -@node Parabola won't boot in text-mode -@ifinfo -@subsubheading Parabola won't boot in text-mode -@end ifinfo -Use one of the ROM images with vesafb in the filename (uses coreboot framebuffer instead of text-mode). +Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. +Alternatively, libreboot also distributes flashrom source code which can be +built. + +Log in as root on your BBB, using the instructions in @ref{Accessing the +operating system on the BBB,bbb_access}. + +Test that flashrom works:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: + +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on +linux_spi. Multiple flash chip definitions match the detected chip(s): +"MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" Please specify +which chip definition to use with the -c <chipname> option. @end verbatim + +How to backup factory.rom (change the -c option as neeed, for your flash +chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r +factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 +-r factory1.rom}@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the +@strong{-c} option is not required in libreboot's patched flashrom, because the +redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now +compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, +then just copy one of them (the factory.rom) to a safe place (on a drive +connected to another system, not the BBB). This is useful for reverse +engineering work, if there is a desirable behaviour in the original firmware +that could be replicated in coreboot and libreboot. + +Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC +address inside the libreboot ROM image, before flashing it. Although there is a +default MAC address inside the ROM image, this is not what you want. +@strong{Make sure to always change the MAC address to one that is correct for +your system.} + +Now flash it:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} -@node Debian-installer graphical corruption in text-mode -@ifinfo -@subsubheading Debian-installer (trisquel net install) graphical corruption in text-mode -@end ifinfo -When using the ROM images that use coreboot's "text mode" instead of the coreboot framebuffer, booting the Trisquel net installer results in graphical corruption because it is trying to switch to a framebuffer which doesn't exist. Use that kernel parameter on the 'linux' line when booting it:@* @strong{vga=normal fb=false} +@image{../resources/images/x200/disassembly/0015,,,,jpg} -Tested in Trisquel 6 (and 7). This forces debian-installer to start in text-mode, instead of trying to switch to a framebuffer. +You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the +end, then it's flashed and should boot. If you see errors, try again (and again, +and again); the message @strong{Chip content is identical to the requested +image} is also an indication of a successful installation. -If selecting text-mode from a GRUB menu created using the ISOLINUX parser, you can press E on the menu entry to add this. Or, if you are booting manually (from GRUB terminal) then just add the parameters. +Example output from running the command (see above): -This workaround was found on the page: @uref{https://www.debian.org/releases/stable/i386/ch05s04.html,https://www.debian.org/releases/stable/i386/ch05s04.html}. It should also work for gNewSense, Debian and any other apt-get distro that provides debian-installer (text mode) net install method. +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Reading old flash chip contents... done. Erasing and writing flash +chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from +0x00000000-0x0000ffff: 0xd716 ERASE FAILED! Reading current flash chip +contents... done. Looking for another erase function. Erase/write done. +Verifying flash... VERIFIED. @end verbatim +@node Wifi - X200 @c @subsubheading Wifi - X200 The X200 typically comes with an +Intel wifi chipset, which does not work without proprietary software. For a list +of wifi chipsets that work without proprietary software, see @ref{Recommended +wifi chipsets,recommended_wifi}. +Some X200 laptops come with an Atheros chipset, but this is 802.11g only. +It is recommended that you install a new wifi chipset. This can only be done +after installing libreboot, because the original firmware has a whitelist of +approved chips, and it will refuse to boot if you use an 'unauthorized' wifi +card. -@node How to replace the default GRUB configuration file on a libreboot system -@subsection How to replace the default GRUB configuration file on a libreboot system -Libreboot on x86 uses the GRUB @uref{http://www.coreboot.org/Payloads#GRUB_2,payload} by default, which means that the GRUB configuration file (where your GRUB menu comes from) is stored directly alongside libreboot and its GRUB payload executable, inside the flash chip. In context, this means that installing distributions and managing them is handled slightly differently compared to traditional BIOS systems. +The following photos show an Atheros AR5B95 being installed, to replace the +Intel chip that this X200 came with:@* +@image{../resources/images/x200/disassembly/0016,,,,jpg} +@image{../resources/images/x200/disassembly/0017,,,,jpg} -A libreboot (or coreboot) ROM image is not simply "flat"; there is an actual filesystem inside called CBFS (coreboot filesystem). A utility called 'cbfstool' allows you to change the contents of the ROM image. In this case, libreboot is configured such that the 'grub.cfg' and 'grubtest.cfg' files exist directly inside CBFS instead of inside the GRUB payload 'memdisk' (which is itself stored in CBFS). +@node WWAN - X200 @c @subsubheading WWAN - X200 If you have a WWAN/3G card +and/or sim card reader, remove them permanently. The WWAN-3G card has +proprietary firmware inside; the technology is identical to what is used in +mobile phones, so it can also track your movements. -You can either modify the GRUB configuration stored in the flash chip, or you can modify a GRUB configuration file on the main storage which the libreboot GRUB payload will automatically search for. +Not to be confused with wifi (wifi is fine). -Here is an excellent writeup about CBFS (coreboot filesystem): @uref{http://lennartb.home.xs4all.nl/coreboot/col5.html,http://lennartb.home.xs4all.nl/coreboot/col5.html}. +@node Memory - X200 @c @subsubheading Memory - X200 You need DDR3 SODIMM +PC3-8500 RAM installed, in matching pairs (speed/size). Non-matching pairs won't +work. You can also install a single module (meaning, one of the slots will be +empty) in slot 0. -@strong{This guide is *only* for the GRUB payload. If you use the depthcharge payload, ignore this section entirely.} +NOTE: reports from some users indicate that non matching pairs might work (e.g. +1+2 GiB). -@menu -* Introduction - GRUB config:: -* 1st option - don't re-flash:: -* 2nd option - re-flash:: -@end menu +Make sure that the RAM you buy is the 2Rx8 density. -@node Introduction - GRUB config -@subsubsection Introduction -Download the latest release from @uref{http://libreboot.org/,http://libreboot.org/} @*@strong{If you downloaded from git, refer to @ref{Get the full source code from metadata,build_meta} before continuing.} +@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be +useful for RAM compatibility info (note: coreboot raminit is different, so this +page might be BS) -There are several advantages to modifying the GRUB configuration stored in CBFS, but this also means that you have to flash a new libreboot ROM image on your system (some users feel intimidated by this, to say the least). Doing so can be risky if not handled correctly, because it can result in a bricked system (recovery is easy if you have the @ref{How to program an SPI flash chip with BeagleBone Black,equipment} for it, but most people don't). If you aren't up to that then don't worry; it is possible to use a custom GRUB menu without flashing a new image, by loading a GRUB configuration from a partition on the main storage instead. +In this photo, 8GiB of RAM (2x4GiB) is installed:@* +@image{../resources/images/x200/disassembly/0018,,,,jpg} -@node 1st option - don't re-flash -@subsubsection 1st option: don't re-flash -By default, GRUB in libreboot is configured to scan all partitions on the main storage for /boot/grub/libreboot_grub.cfg or /grub/libreboot_grub.cfg(for systems where /boot is on a dedicated partition), and then use it automatically. +@node Booting - X200 @c @subsubheading Boot it! You should see something like +this: -Simply create your custom GRUB configuration and save it to @strong{/boot/grub/libreboot_grub.cfg} on the running system. The next time you boot, GRUB (in libreboot) will automatically switch to this configuration file. @strong{This means that you do not have to re-flash, recompile or otherwise modify libreboot at all!} +@image{../resources/images/x200/disassembly/0019,,,,jpg} -Ideally, your distribution should automatically generate a libreboot_grub.cfg file that is written specifically under the assumption that it will be read and used on a libreboot system that uses GRUB as a payload. If your distribution does not do this, then you can try to add that feature yourself or politely ask someone involved with or otherwise knowledgeable about the distribution to do it for you. The libreboot_grub.cfg could either contain the full configuration, or it could chainload another GRUB ELF executable (built to be used as a coreboot payload) that is located in a partition on the main storage. +Now @ref{GNU/Linux distributions,install GNU/Linux}. -If you want to adapt a copy of the existing @emph{libreboot} GRUB configuration and use that for the libreboot_grub.cfg file, then follow @ref{Acquire the necessary utilities,tools}, @ref{Acquiring the correct ROM image,rom} and @ref{Extract grubtestcfg from the ROM image,extract_testconfig} to get the @strong{@emph{grubtest.cfg}}. Rename @strong{@emph{grubtest.cfg}} to @strong{@emph{libreboot_grub.cfg}} and save it to @strong{@emph{/boot/grub/}} on the running system where it is intended to be used. Modify the file at that location however you see fit, and then stop reading this guide (the rest of this page is irrelevant to you); @strong{in libreboot_grub.cfg on disk, if you are adapting it based on grub.cfg from CBFS then remove the check for libreboot_grub.cfg otherwise it will loop.}. +@node X200S and X200 Tablet users GPIO33 trick will not work @c @subsubheading +X200S and X200 Tablet users: GPIO33 trick will not work. sgsit found out about +a pin called GPIO33, which can be grounded to disable the flashing protections +by the descriptor and stop the ME from starting (which itself interferes with +flashing attempts). The theory was proven correct; however, it is still useless +in practise. -This is all well and good, but what should you actually put in your GRUB configuration file? Read @ref{Writing a GRUB configuration file,grub_config} for more information. +Look just above the 7 in TP37 (that's GPIO33):@* +@image{../resources/images/x200/gpio33_location,,,,jpg} +By default we would see this in lenovobios, when trying flashrom -p internal -w +rom.rom: -@node 2nd option - re-flash -@subsubsection 2nd option: re-flash -You can modify what is stored inside the flash chip quite easily. Read on to find out how. +@verbatim FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is +read-only. FREG2: Warning: Management Engine region (0x00001000-0x005f5fff) is +locked. @end verbatim -@menu -* Acquire the necessary utilities:: -* Acquiring the correct ROM image:: -* Extract grubtestcfg from the ROM image:: -* Re-insert the modified grubtestcfg into the ROM image:: -* Testing:: -* Final steps:: -@end menu +With GPIO33 grounded during boot, this disabled the flash protections as set by +descriptor, and stopped the ME from starting. The output changed to: -@node Acquire the necessary utilities -@ifinfo -@subsubheading Acquire the necessary utilities -@end ifinfo -Use @strong{@emph{cbfstool}} and @strong{@emph{flashrom}}. There are available in the @emph{libreboot_util} release archive, or they can be compiled (see @ref{How to build flashrom,build_flashrom}). Flashrom is also available from the repositories:@* # @strong{pacman -S flashrom} +@verbatim The Flash Descriptor Override Strap-Pin is set. Restrictions implied +by the Master Section of the flash descriptor are NOT in effect. Please note +that Protected Range (PR) restrictions still apply. @end verbatim +The part in bold is what got us. This was still observed: -@node Acquiring the correct ROM image -@ifinfo -@subsubheading Acquiring the correct ROM image -@end ifinfo -You can either work directly with one of the ROM images already included in the libreboot ROM archives, or re-use the ROM that you have currently flashed. For the purpose of this tutorial it is assumed that your ROM image file is named @emph{libreboot.rom}, so please make sure to adapt. +@verbatim PR0: Warning: 0x007e0000-0x01ffffff is read-only. PR4: Warning: +0x005f8000-0x005fffff is locked. @end verbatim -ROM images are included pre-compiled in libreboot. You can also dump your current firmware, using flashrom:@* $ @strong{sudo flashrom -p internal -r libreboot.rom}@* # @strong{flashrom -p internal -r libreboot.rom}@* If you are told to specify the chip, add the option @strong{-c @{your chip@}} to the command, for example:@* # @strong{flashrom -c MX25L6405 -p internal -r libreboot.rom} +It is actually possible to disable these protections. Lenovobios does, when +updating the BIOS (proprietary one). One possible way to go about this would be +to debug the BIOS update utility from Lenovo, to find out how it's disabling +these protections. Some more research is available here: +@uref{http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research,http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research} -@node Extract grubtestcfg from the ROM image -@ifinfo -@subsubheading Extract grubtest.cfg from the ROM image -@end ifinfo -You can check the contents of the ROM image, inside CBFS:@* @strong{$ cd .../libreboot_util/cbfstool} @strong{$ ./cbfstool libreboot.rom print} +On a related note, libreboot has a utility that could help with investigating +this: @ref{demefactory utility,demefactory} -The files @emph{grub.cfg} and @emph{grubtest.cfg} should be present. grub.cfg is loaded by default, with a menuentry for switching to grubtest.cfg. In this tutorial, you will first modify and test @emph{grubtest.cfg}. This is to reduce the possibility of bricking your device, so DO NOT SKIP THIS! -Extract grubtest.cfg from the ROM image:@* @strong{$ ./cbfstool libreboot.rom extract -n grubtest.cfg -f grubtest.cfg} -Modify the grubtest.cfg accordingly. +@node ThinkPad R400 @subsubsection Flashing the ThinkPad R400 with a BeagleBone +Black Initial flashing instructions for R400. -This is all well and good, but what should you actually put in your GRUB configuration file? Read @ref{Writing a GRUB configuration file,grub_config} for more information. +This guide is for those who want libreboot on their ThinkPad R400 while they +still have the original Lenovo BIOS present. This guide can also be followed +(adapted) if you brick your R400, to know how to recover. -@node Re-insert the modified grubtestcfg into the ROM image -@ifinfo -@subsubheading Re-insert the modified grubtest.cfg into the ROM image -@end ifinfo -Once your grubtest.cfg is modified and saved, delete the unmodified config from the ROM image:@* @strong{$ ./cbfstool libreboot.rom remove -n grubtest.cfg} +Before following this section, please make sure to setup your libreboot ROM +properly first. Although ROM images are provided pre-built in libreboot, there +are some modifications that you need to make to the one you chose before +flashing. (instructions referenced later in this guide) -Next, insert the modified version:@* @strong{$ ./cbfstool libreboot.rom add -n grubtest.cfg -f grubtest.cfg -t raw} +@menu +* Libreboot T400:: Serial port - R400:: LCD compatibly - R400:: A note about +* CPUs - R400:: A note about GPUs - R400:: CPU paste required - R400:: Flash +* chip size - R400:: MAC address - R400:: Initial BBB configuration - R400:: +* Disassembly - R400:: Thermal paste - IMPORTANT - R400:: Wifi - R400:: WWAN - +* R400:: Memory - R400:: Booting - R400:: +@end menu -@node Testing -@ifinfo -@subsubheading Testing -@end ifinfo -@strong{Now you have a modified ROM. Refer back to @ref{How to update/install,flashrom} for information on how to flash it.@* $ @strong{cd /libreboot_util} # @strong{./flash update libreboot.rom}@* Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but you are sure that you chose the correct ROM image, then run this alternative command:@* # @strong{./flash forceupdate libreboot.rom}@* You should see @strong{"Verifying flash... VERIFIED."} written at the end of the flashrom output. Once you have done that, shut down and then boot up with your new test configuration.} +@node Libreboot T400 @c @subsubheading Libreboot T400 You may also be interested +in the smaller, more portable @ref{ThinkPad T400,Libreboot T400}. + +@node Serial port - R400 @c @subsubheading Serial port EHCI debug might not be +needed. It has been reported that the docking station for this laptop has a +serial port, so it might be possible to use that instead. + +@node LCD compatibly - R400 @c @subsubheading LCD compatibly Not all LCD panels +are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. + +@node A note about CPUs - R400 @c @subsubheading A note about CPUs +@uref{http://www.thinkwiki.org/wiki/Category:R400,ThinkWiki} has a list of CPUs +for this system. The Core 2 Duo P8400 and P8600 are believed to work in +libreboot. The Core 2 Duo T9600 was confirmed to work, so the T9400 probably +also works. @strong{The Core 2 Duo T5870/5670 and Celeron M 575/585 are +untested!} @itemize @item Quad-core CPUs @itemize @minus @item Incompatible. Do +not use. @end itemize @end itemize + +@node A note about GPUs - R400 @c @subsubheading A note about GPUs Some models +have an Intel GPU, while others have both an ATI and an Intel GPU; this is +referred to as "switchable graphics". In the @emph{BIOS setup} program for +lenovobios, you can specify that the system will use one or the other (but not +both). + +Libreboot is known to work on systems with only the Intel GPU, using native +graphics initialization. On systems with switchable graphics, the Intel GPU is +used and the ATI GPU is disabled, so native graphics initialization works all +the same. + +@node CPU paste required - R400 @c @subsubheading CPU paste required See +@xref{paste-r400,,paste}. + +@node Flash chip size - R400 @c @subsubheading Flash chip size Use this to find +out:@* # @strong{dmidecode | grep ROM\ Size}@* + +@node MAC address - R400 @c @subsubheading MAC address On the R400, the MAC +address for the onboard gigabit ethernet chipset is stored inside the flash +chip, along with other configuration data. + +Keep a note of the MAC address before disassembly; this is very important, +because you will need to insert this into the libreboot ROM image before +flashing it. It will be written in one of these locations: + +@image{../resources/images/t400/macaddress0,,,,jpg} +@image{../resources/images/t400/macaddress1,,,,jpg} +@image{../resources/images/x200/disassembly/0001,,,,jpg} + +@node Initial BBB configuration - R400 @c @subsubheading Initial BBB +configuration Refer to @ref{How to program an SPI flash chip with BeagleBone +Black,bbb_setup} for how to setup the BBB for flashing. + +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-16 (clip: Pomona 5252): + +@verbatim POMONA 5252 (correlate with the BBB guide) === ethernet jack and VGA +port ==== NC - - 21 1 - - 17 NC +- - NC NC - - NC NC - - NC NC +- - NC 18 - - 3.3V (PSU) 22 - - NC - + this is pin 1 on the flash chip === SATA port === This is how you will + connect. Numbers refer to pin numbers on the BBB, on the plugs near the + DC jack. @end verbatim + +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-8 (clip: Pomona 5250): + +@verbatim POMONA 5250 (correlate with the BBB guide) === RAM slots ==== 18 +- - 1 22 - - NC NC - - 21 3.3V (PSU) +- - 17 - this is pin 1 on the flash chip === slot where the AC jack is +connected === This is how you will connect. Numbers refer to pin numbers on the +BBB, on the plugs near the DC jack. @end verbatim + +@node Disassembly - R400 @c @subsubheading Disassembly Remove all screws:@* +@image{../resources/images/r400/0000,,,,jpg}@* Remove the HDD and optical +drive:@* @image{../resources/images/r400/0001,,,,jpg}@* Remove the hinge +screws:@* @image{../resources/images/r400/0002,,,,jpg} +@image{../resources/images/r400/0003,,,,jpg} + +Remove the palm rest and keyboard:@* +@image{../resources/images/r400/0004,,,,jpg} +@image{../resources/images/r400/0005,,,,jpg} + +Remove these screws, and then remove the bezel:@* +@image{../resources/images/r400/0006,,,,jpg} +@image{../resources/images/r400/0007,,,,jpg} + +Remove the speaker screws, but don't remove the speakers yet (just set them +loose):@* @image{../resources/images/r400/0008,,,,jpg} +@image{../resources/images/r400/0009,,,,jpg} +@image{../resources/images/r400/0010,,,,jpg} + +Remove these screws, and then remove the metal plate:@* +@image{../resources/images/r400/0011,,,,jpg} +@image{../resources/images/r400/0012,,,,jpg} +@image{../resources/images/r400/0013,,,,jpg} + +Remove the antennas from the wifi card, and then start unrouting them:@* +@image{../resources/images/r400/0014,,,,jpg} +@image{../resources/images/r400/0015,,,,jpg} +@image{../resources/images/r400/0016,,,,jpg} +@image{../resources/images/r400/0017,,,,jpg} +@image{../resources/images/r400/0018,,,,jpg} +@image{../resources/images/r400/0019,,,,jpg} + +Disconnect the LCD cable from the motherboard:@* +@image{../resources/images/r400/0020,,,,jpg} +@image{../resources/images/r400/0021,,,,jpg} +@image{../resources/images/r400/0022,,,,jpg} +@image{../resources/images/r400/0023,,,,jpg} + +Remove the hinge screws, and then remove the LCD panel:@* +@image{../resources/images/r400/0024,,,,jpg} +@image{../resources/images/r400/0025,,,,jpg} +@image{../resources/images/r400/0026,,,,jpg} +@image{../resources/images/r400/0027,,,,jpg} + +Remove this:@* @image{../resources/images/r400/0028,,,,jpg} +@image{../resources/images/r400/0029,,,,jpg} + +Remove this long cable (there are 3 connections):@* +@image{../resources/images/r400/0030,,,,jpg} +@image{../resources/images/r400/0031,,,,jpg} +@image{../resources/images/r400/0032,,,,jpg} +@image{../resources/images/r400/0033,,,,jpg} + +Disconnect the speaker cable, and remove the speakers:@* +@image{../resources/images/r400/0034,,,,jpg} + +Remove the heatsink screws, remove the fan and then remove the heatsink/fan:@* +@image{../resources/images/r400/0035,,,,jpg} +@image{../resources/images/r400/0036,,,,jpg} +@image{../resources/images/r400/0037,,,,jpg} +@image{../resources/images/r400/0038,,,,jpg} + +Remove the NVRAM battery:@* @image{../resources/images/r400/0039,,,,jpg} +@image{../resources/images/r400/0040,,,,jpg} + +Remove this screw:@* @image{../resources/images/r400/0041,,,,jpg} +@image{../resources/images/r400/0042,,,,jpg} + +Disconnect the AC jack:@* @image{../resources/images/r400/0043,,,,jpg} +@image{../resources/images/r400/0044,,,,jpg} + +Remove this screw and then remove what is under it:@* +@image{../resources/images/r400/0045,,,,jpg} -Choose (in GRUB) the menu entry that switches to grubtest.cfg. If it works, then your config is safe and you can continue below. +Remove this:@* @image{../resources/images/r400/0046,,,,jpg} -@strong{If it does not work like you want it to, if you are unsure or sceptical in any way, then re-do the steps above until you get it right! Do *not* proceed past this point unless you are 100% sure that your new configuration is safe (or desirable) to use.} +Lift the motherboard (which is still inside the cage) from the side on the +right, removing it completely:@* @image{../resources/images/r400/0047,,,,jpg} +@image{../resources/images/r400/0048,,,,jpg} +Remove all screws, marking each hole so that you know where to re-insert them. +You should place the screws in a layout corresponding to the order that they +were in before removal: @image{../resources/images/r400/0049,,,,jpg} +@image{../resources/images/r400/0050,,,,jpg} -@node Final steps -@ifinfo -@subsubheading Final steps -@end ifinfo -When you are satisfied booting from grubtest.cfg, you can create a copy of grubtest.cfg, called grub.cfg. This is the same except for one difference: the menuentry 'Switch to grub.cfg' will be changed to 'Switch to grubtest.cfg' and inside it, all instances of grub.cfg to grubtest.cfg. This is so that the main config still links (in the menu) to grubtest.cfg, so that you don't have to manually switch to it, in case you ever want to follow this guide again in the future (modifying the already modified config). From /libreboot_util/cbfstool, do:@* $ @strong{sed -e 's:(cbfsdisk)/grub.cfg:(cbfsdisk)/grubtest.cfg:g' -e 's:Switch to grub.cfg:Switch to grubtest.cfg:g' < grubtest.cfg > grub.cfg}@* +Remove the motherboard from the cage, and the SPI flash chip will be next to the +memory slots:@* @image{../resources/images/r400/0051,,,,jpg} +@image{../resources/images/r400/0052,,,,jpg} -Delete the grub.cfg that remained inside the ROM:@* @strong{$ ./cbfstool libreboot.rom remove -n grub.cfg} +Connect your programmer, then connect GND and 3.3V@* +@image{../resources/images/t400/0065,,,,jpg} +@image{../resources/images/t400/0066,,,,jpg} +@image{../resources/images/t400/0067,,,,jpg} +@image{../resources/images/t400/0069,,,,jpg} +@image{../resources/images/t400/0070,,,,jpg} +@image{../resources/images/t400/0071,,,,jpg} -Add the modified version that you just made:@* @strong{$ ./cbfstool libreboot.rom add -n grub.cfg -f grub.cfg -t raw} +A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is also +fine:@* @image{../resources/images/t400/0072,,,,jpg} -@strong{Now you have a modified ROM. Again, refer back to @ref{How to update/install,flashrom} for information on how to flash it. It's the same method as you used before. Shut down and then boot up with your new configuration.} +Of course, make sure to turn on your PSU:@* +@image{../resources/images/x200/disassembly/0013,,,,jpg} +Now, you should be ready to install libreboot. -@node Writing a GRUB configuration file -@subsection Writing a GRUB configuration file -This section is for those systems which use the GRUB payload. @strong{If your system uses the depthcharge payload, ignore this section.} +Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. +Alternatively, libreboot also distributes flashrom source code which can be +built. + +Log in as root on your BBB, using the instructions in @ref{Accessing the +operating system on the BBB,bbb_access}. + +Test that flashrom works:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: + +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on +linux_spi. Multiple flash chip definitions match the detected chip(s): +"MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" Please specify +which chip definition to use with the -c <chipname> option. @end verbatim + +How to backup factory.rom (change the -c option as neeed, for your flash +chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r +factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 +-r factory1.rom}@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the +@strong{-c} option is not required in libreboot's patched flashrom, because the +redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now +compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, +then just copy one of them (the factory.rom) to a safe place (on a drive +connected to another system, not the BBB). This is useful for reverse +engineering work, if there is a desirable behaviour in the original firmware +that could be replicated in coreboot and libreboot. + +Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC +address inside the libreboot ROM image, before flashing it. Although there is a +default MAC address inside the ROM image, this is not what you want. +@strong{Make sure to always change the MAC address to one that is correct for +your system.} + +Now flash it:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} -The following are some common examples of ways in which the grubtest.cfg file can be modified. @c NOTE: These > The following +@image{../resources/images/x200/disassembly/0015,,,,jpg} -@menu -* Obvious option:: Don't even modify the built-in grub.cfg -* Trisquel with full disk encryption - custom partition layout:: -* Parabola GNU/Linux-libre:: -@end menu +You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the +end, then it's flashed and should boot. If you see errors, try again (and again, +and again); the message @strong{Chip content is identical to the requested +image} is also an indication of a successful installation. +Example output from running the command (see above): -@node Obvious option -@subsubsection Obvious option: don't even modify the built-in grub.cfg -Use the menuentry that says something like @emph{Search for GRUB outside CBFS}. Assuming that you have a grub.cfg file at /boot/grub/ in your installed distro, this will generate a new menuentry in the GRUB menu. Use that to boot. +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Reading old flash chip contents... done. Erasing and writing flash +chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from +0x00000000-0x0000ffff: 0xd716 ERASE FAILED! Reading current flash chip +contents... done. Looking for another erase function. Erase/write done. +Verifying flash... VERIFIED. @end verbatim -Then do this as root:@* $ @strong{cd /boot/grub/}@* $ @strong{ln -s grub.cfg libreboot_grub.cfg} +@node Thermal paste - IMPORTANT - R400 @c @subsubheading Thermal paste +(IMPORTANT) @anchor{paste-r400} Because part of this procedure involved removing +the heatsink, you will need to apply new paste. Arctic MX-4 is ok. You will also +need isopropyl alcohol and an anti-static cloth to clean with. -After that, your system should then boot automatically. +When re-installing the heatsink, you must first clean off all old paste with the +alcohol/cloth. Then apply new paste. Arctic MX-4 is also much better than the +default paste used on these systems. -@node Trisquel with full disk encryption - custom partition layout -@subsubsection Trisquel with full disk encryption, custom partition layout -GRUB can boot from a symlink (or symlinks) pointing to your kernel/initramfs, whether from an unencrypted or encrypted /boot/. You can create your own custom symlink(s) but you have to manually update them when updating your kernel. This guide (not maintained by the libreboot project) shows how to configure Trisquel to automatically update that symlink on every kernel update. @uref{http://www.rel4tion.org/people/fr33domlover/libreboot-fix/,http://www.rel4tion.org/people/fr33domlover/libreboot-fix/} +@image{../resources/images/t400/paste,,,,jpg} -@strong{TODO: adapt those notes and put them here. The author said that it was CC-0, so re-licensing under GFDL shouldn't be a problem.} +NOTE: the photo above is for illustration purposes only, and does not show how +to properly apply the thermal paste. Other guides online detail the proper +application procedure. -As an example, on my test system in /boot/grub/grub.cfg (on the HDD/SSD) I see for the main menu entry: +@node Wifi - R400 @c @subsubheading Wifi The R400 typically comes with an Intel +wifi chipset, which does not work without proprietary software. For a list of +wifi chipsets that work without proprietary software, see @ref{Recommended wifi +chipsets,recommended_wifi}. -@itemize -@item -@strong{linux /boot/vmlinuz-3.15.1-gnu.nonpae root=UUID=3a008e14-4871-497b-95e5-fb180f277951 ro crashkernel=384M-2G:64M,2G-:128M quiet splash $vt_handoff} -@item -@strong{initrd /boot/initrd.img-3.15.1-gnu.nonpae} -@end itemize +Some R400 laptops might come with an Atheros chipset, but this is 802.11g only. -@strong{ro}, @strong{quiet}, @strong{splash}, @strong{crashkernel=384M-2G:64M,2G-:128M} and @strong{$vt_handoff} can be safely ignored. +It is recommended that you install a new wifi chipset. This can only be done +after installing libreboot, because the original firmware has a whitelist of +approved chips, and it will refuse to boot if you use an 'unauthorized' wifi +card. -I use this to get my partition layout:@* $ @strong{lsblk} +The following photos show an Atheros AR5B95 being installed, to replace the +Intel chip that this R400 came with:@* +@image{../resources/images/t400/0012,,,,jpg} +@image{../resources/images/t400/ar5b95,,,,jpg} -In my case, I have no /boot partition, instead /boot is on the same partition as / on sda1. Yours might be different. In GRUB terms, sda means ahci0. 1 means msdos1, or gpt1, depending on whether I am using MBR or GPT partitioning. Thus, /dev/sda1 is GRUB is (ahci0,msdos1) or (ahci0,gpt1). In my case, I use MBR partitioning so it's (ahci0,msdos1). 'msdos' is a GRUB name simply because this partitioning type is traditionally used by MS-DOS. It doesn't mean that you have a proprietary OS. +@node WWAN - R400 @c @subsubheading WWAN If you have a WWAN/3G card and/or sim +card reader, remove them permanently. The WWAN-3G card has proprietary firmware +inside; the technology is identical to what is used in mobile phones, so it can +also track your movements. -Trisquel doesn't keep the filenames of kernels consistent, instead it keeps old kernels and new kernel updates are provided with the version in the filename. This can make GRUB payload a bit tricky. Fortunately, there are symlinks /vmlinuz and /initrd.img so if your /boot and / are on the same partition, you can set GRUB to boot from that. These are also updated automatically when installing kernel updates from your distributions apt-get repositories. @strong{Note: when using @uref{http://jxself.org/linux-libre,jxself kernel releases}, these are not updated at all and you have to update them manually.} +Not to be confused with wifi (wifi is fine). -For the GRUB payload grubtest.cfg (in the 'Load Operating System' menu entry), we therefore have (in this example):@* @strong{set root='ahci0,msdos1'}@* @strong{linux /vmlinuz root=UUID=3a008e14-4871-497b-95e5-fb180f277951}@* @strong{initrd /initrd.img} +@node Memory - R400 @c @subsubheading Memory You need DDR3 SODIMM PC3-8500 RAM +installed, in matching pairs (speed/size). Non-matching pairs won't work. You +can also install a single module (meaning, one of the slots will be empty) in +slot 0. -Optionally, you can convert the UUID to its real device name, for example /dev/sda1 in this case. sdX naming isn't very reliable, though, which is why UUID is used for most distributions. +Make sure that the RAM you buy is the 2Rx8 density. -Alternatively, if your /boot is on a separate partition then you cannot rely on the /vmlinuz and /initrd.img symlinks. Instead, go into /boot and create your own symlinks (update them manually when you install a new kernel update).@* $ @strong{sudo -s} (or @strong{su -})@* # @strong{cd /boot/}@* # @strong{rm -f vmlinuz initrd.img}@* # @strong{ln -s yourkernel ksym}@* # @strong{ln -s yourinitrd isym}@* # @strong{exit} +@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be +useful for RAM compatibility info (note: coreboot raminit is different, so this +page might be BS) -Then your grubtest.cfg menu entry (for payload) becomes like that, for example if / was on sda2 and /boot was on sda1:@* @strong{set root='ahci0,msdos1'}@* @strong{linux /ksym root=/dev/sda2}@* @strong{initrd /isym} +The following photo shows 8GiB (2x4GiB) of RAM installed:@* +@image{../resources/images/t400/memory,,,,jpg} -There are lots of possible variations so please try to adapt. +@node Booting - R400 @c @subsubheading Boot it! You should see something like +this: -@node Parabola GNU/Linux-libre -@subsubsection Parabola GNU/Linux-libre -You can basically adapt the above. Note however that Parabola does not keep old kernels still installed, and the file names are always consistent, so you don't need to boot from symlinks, you can just use the real thing directly. +@image{../resources/images/t400/boot0,,,,jpg} +@image{../resources/images/t400/boot1,,,,jpg} +Now @ref{GNU/Linux distributions,install GNU/Linux}. -@node Installing Parabola GNU/Linux-libre with full disk encryption -@subsection Installing Parabola GNU/Linux-libre with full disk encryption including /boot -Libreboot on x86 uses the GRUB @uref{http://www.coreboot.org/Payloads#GRUB_2,payload} by default, which means that the GRUB configuration file (where your GRUB menu comes from) is stored directly alongside libreboot and it's GRUB payload executable, inside the flash chip. In context, this means that installing distributions and managing them is handled slightly differently compared to traditional BIOS systems. -On most systems, the /boot partition has to be left unencrypted while the others are encrypted. This is so that GRUB, and therefore the kernel, can be loaded and executed since the firmware can't open a LUKS volume. Not so with libreboot! Since GRUB is already included directly as a payload, even /boot can be encrypted. This protects /boot from tampering by someone with physical access to the system. +@node ThinkPad T400 @subsubsection Flashing the T400 with a BeagleBone Black +Initial flashing instructions for the ThinkPad T400. -NOTE: When finishing implementing this setup, if the boot stalls when running cryptomount -a, try removing the DVD drive (on thinkpads). +This guide is for those who want libreboot on their ThinkPad T400 while they +still have the original Lenovo BIOS present. This guide can also be followed +(adapted) if you brick your T400, to know how to recover. -@strong{This guide is *only* for the GRUB payload. If you use the depthcharge payload, ignore this section entirely.} +Before following this section, please make sure to setup your libreboot ROM +properly first. Although ROM images are provided pre-built in libreboot, there +are some modifications that you need to make to the one you chose before +flashing. (instructions referenced later in this guide) @menu -* Booting the install environment:: @c Added -* Setting up the storage device:: @c Added -* Change keyboard layout:: -* Establish an internet connection:: -* Getting started:: -* dm-mod:: -* Create LUKS partition:: -* Create LVM:: -* Create / and swap partitions and mount:: -* Continue with Parabola installation:: -* Configure the system:: -* Extra security tweaks:: -* Unmount reboot!:: -* Booting from GRUB:: -* Follow-up tutorial configuring Parabola:: -* Modify grubcfg inside the ROM:: -* Bonus Using a key file to unlock /boot/:: -* Further security tips:: -* Troubleshooting Parabola:: +* T400 laptops with libreboot pre-installed:: Serial port - T400:: LCD +* compatibly - T400:: A note about CPUs - T400:: A note about GPUs - T400:: CPU +* paste required - T400:: Flash chip size - T400:: MAC address - T400:: Initial +* BBB configuration - T400:: The procedure - T400:: Thermal paste - IMPORTANT - +* T400:: Wifi - T400:: WWAN - T400:: Memory - T400:: Booting - T400:: @end menu -@node Booting the install environment -@subsubsection Booting the install environment -Boot Parabola's install environment. @ref{How to install GNU/Linux on a libreboot system,How to boot a GNU/Linux installer}. +@node T400 laptops with libreboot pre-installed @c @subsubheading T400 laptops +with libreboot pre-installed If you don't want to install libreboot yourself, +companies exist that sell these laptops with libreboot pre-installed, along with +a free GNU/Linux distribution. + +@node Serial port - T400 @c @subsubheading Serial port EHCI debug might not be +needed. It has been reported that the docking station for this laptop has a +serial port, so it might be possible to use that instead. + +@node LCD compatibly - T400 @c @subsubheading LCD compatibly Not all LCD panels +are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. + +@node A note about CPUs - T400 @c @subsubheading A note about CPUs +@uref{http://www.thinkwiki.org/wiki/Category:T400,ThinkWiki} has a list of CPUs +for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in +libreboot. The T9600 was confirmed to work, so the T9500/T9550 probably also +work. @itemize @item Quad-core CPUs @itemize @minus @item Incompatible. Do not +use. @end itemize @end itemize + +@node A note about GPUs - T400 @c @subsubheading A note about GPUs Some models +have an Intel GPU, while others have both an ATI and an Intel GPU; this is +referred to as ``switchable graphics''. In the @emph{BIOS setup} program for +lenovobios, you can specify that the system will use one or the other (but not +both). + +Libreboot is known to work on systems with only the Intel GPU, using native +graphics initialization. On systems with switchable graphics, the Intel GPU is +used and the ATI GPU is disabled, so native graphics initialization works all +the same. + +@node CPU paste required - T400 @c @subsubheading CPU paste required See +@xref{paste-t400,,paste}. + +@node Flash chip size - T400 @c @subsubheading Flash chip size Use this to find +out:@* # @strong{dmidecode | grep ROM\ Size}@* + +@node MAC address - T400 @c @subsubheading MAC address On the T400, the MAC +address for the onboard gigabit ethernet chipset is stored inside the flash +chip, along with other configuration data. + +Keep a note of the MAC address before disassembly; this is very important, +because you will need to insert this into the libreboot ROM image before +flashing it. It will be written in one of these locations: + +@image{../resources/images/t400/macaddress0,,,,jpg} +@image{../resources/images/t400/macaddress1,,,,jpg} +@image{../resources/images/x200/disassembly/0001,,,,jpg} + + +@node Initial BBB configuration - T400 @c @subsubheading Initial BBB +configuration Refer to @ref{How to program an SPI flash chip with BeagleBone +Black,bbb_setup} for how to configure the BBB for flashing. + +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-16 (clip: Pomona 5252): + +@verbatim POMONA 5252 (correlate with the BBB guide) === ethernet jack and VGA +port ==== NC - - 21 1 - - 17 NC +- - NC NC - - NC NC - - NC NC +- - NC 18 - - 3.3V (PSU) 22 - - NC - + this is pin 1 on the flash chip === SATA port === This is how you will + connect. Numbers refer to pin numbers on the BBB, on the plugs near the + DC jack. @end verbatim + +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-8 (clip: Pomona 5250): + +@verbatim POMONA 5250 (correlate with the BBB guide) === RAM slots ==== 18 +- - 1 22 - - NC NC - - 21 3.3V (PSU) +- - 17 - this is pin 1 on the flash chip === slot where the AC jack is +connected === This is how you will connect. Numbers refer to pin numbers on the +BBB, on the plugs near the DC jack. @end verbatim + +@node The procedure - T400 @c @subsubheading The procedure Remove @emph{all} +screws, placing them in the order that you removed them:@* +@image{../resources/images/t400/0001,,,,jpg} +@image{../resources/images/t400/0002,,,,jpg} + +Remove those three screws then remove the rear bezel:@* +@image{../resources/images/t400/0003,,,,jpg} +@image{../resources/images/t400/0004,,,,jpg} +@image{../resources/images/t400/0005,,,,jpg} +@image{../resources/images/t400/0006,,,,jpg} + +Remove the speakers:@* @image{../resources/images/t400/0007,,,,jpg} +@image{../resources/images/t400/0008,,,,jpg} +@image{../resources/images/t400/0009,,,,jpg} +@image{../resources/images/t400/0010,,,,jpg} +@image{../resources/images/t400/0011,,,,jpg} + +Remove the wifi:@* @image{../resources/images/t400/0012,,,,jpg} +@image{../resources/images/t400/0013,,,,jpg} + +Remove this cable:@* @image{../resources/images/t400/0014,,,,jpg} +@image{../resources/images/t400/0015,,,,jpg} +@image{../resources/images/t400/0016,,,,jpg} +@image{../resources/images/t400/0017,,,,jpg} +@image{../resources/images/t400/0018,,,,jpg} + +Unroute those antenna wires:@* @image{../resources/images/t400/0019,,,,jpg} +@image{../resources/images/t400/0020,,,,jpg} +@image{../resources/images/t400/0021,,,,jpg} +@image{../resources/images/t400/0022,,,,jpg} +@image{../resources/images/t400/0023,,,,jpg} + +Remove the LCD assembly:@* @image{../resources/images/t400/0024,,,,jpg} +@image{../resources/images/t400/0025,,,,jpg} +@image{../resources/images/t400/0026,,,,jpg} +@image{../resources/images/t400/0027,,,,jpg} +@image{../resources/images/t400/0028,,,,jpg} +@image{../resources/images/t400/0029,,,,jpg} +@image{../resources/images/t400/0030,,,,jpg} +@image{../resources/images/t400/0031,,,,jpg} -For this guide I used the 2015 08 01 image to boot the live installer and install the system. This is available at @uref{https://wiki.parabola.nu/Get_Parabola#Main_live_ISO,this page}. +Disconnect the NVRAM battery:@* @image{../resources/images/t400/0033,,,,jpg} -This guide will go through the installation steps taken at the time of writing, which may or may not change due to the volatile nature of Parabola (it changes all the time). In general most of it should remain the same. If you spot mistakes, please say so! This guide will be ported to the Parabola wiki at a later date. For up to date Parabola install guide, go to the Parabola wiki. This guide essentially cherry picks the useful information (valid at the time of writing: 2015-08-25). +Disconnect the fan:@* @image{../resources/images/t400/0034,,,,jpg} -@node Setting up the storage device -@subsubsection Setting up the storage device -This section deals with wiping the storage device on which you plan to install Parabola GNU/Linux. Follow these steps, but if you use an SSD, also: +Unscrew these:@* @image{../resources/images/t400/0035,,,,jpg} +@image{../resources/images/t400/0036,,,,jpg} +@image{../resources/images/t400/0037,,,,jpg} +@image{../resources/images/t400/0038,,,,jpg} -- beware there are issues with TRIM (not enabled through luks) and security issues if you do enable it. See @uref{https://wiki.archlinux.org/index.php/Dm-crypt/Specialties#Discard.2FTRIM_support_for_solid_state_drives_.28SSD.29,this page} for more info. +Unscrew the heatsink, then lift it off:@* +@image{../resources/images/t400/0039,,,,jpg} +@image{../resources/images/t400/0040,,,,jpg} -- make sure it's brand-new (or barely used). Or, otherwise, be sure that it never previously contained plaintext copies of your data. +Disconnect the power jack:@* @image{../resources/images/t400/0041,,,,jpg} +@image{../resources/images/t400/0042,,,,jpg} -- make sure to read @uref{https://wiki.archlinux.org/index.php/Solid_State_Drives,this article}. Edit /etc/fstab later on when chrooted into your install. Also, read the whole article and keep all points in mind, adapting them for this guide. +Loosen this:@* @image{../resources/images/t400/0043,,,,jpg} -Securely wipe the drive:@* # @strong{dd if=/dev/urandom of=/dev/sda; sync}@* NOTE: If you have an SSD, only do this the first time. If it was already LUKS-encrypted before, use the info below to wipe the LUKS header. Also, check online for your SSD what the recommended erase block size is. For example if it was 2MiB:@* # @strong{dd if=/dev/urandom of=/dev/sda bs=2M; sync} +Remove this:@* @image{../resources/images/t400/0044,,,,jpg} +@image{../resources/images/t400/0045,,,,jpg} +@image{../resources/images/t400/0046,,,,jpg} +@image{../resources/images/t400/0047,,,,jpg} +@image{../resources/images/t400/0048,,,,jpg} -If your drive was already LUKS encrypted (maybe you are re-installing your distro) then it is already 'wiped'. You should just wipe the LUKS header. @uref{https://www.lisenet.com/2013/luks-add-keys-backup-and-restore-volume-header/,https://www.lisenet.com/2013/luks-add-keys-backup-and-restore-volume-header/} showed me how to do this. It recommends doing the first 3MiB. Now, that guide is recommending putting zero there. I'm going to use urandom. Do this:@* # @strong{head -c 3145728 /dev/urandom > /dev/sda; sync}@* (Wiping the LUKS header is important, since it has hashed passphrases and so on. It's 'secure', but 'potentially' a risk). +Unscrew these:@* @image{../resources/images/t400/0049,,,,jpg} +@image{../resources/images/t400/0050,,,,jpg} -@node Change keyboard layout -@subsubsection Change keyboard layout -Parabola live shell assumes US Qwerty. If you have something different, list the available keymaps and use yours:@* # @strong{localectl list-keymaps}@* # @strong{loadkeys LAYOUT}@* For me, LAYOUT would have been dvorak-uk. +Remove this:@* @image{../resources/images/t400/0051,,,,jpg} +@image{../resources/images/t400/0052,,,,jpg} -@node Establish an internet connection -@subsubsection Establish an internet connection -Refer to @uref{https://wiki.parabola.nu/Beginners%27_guide#Establish_an_internet_connection,this guide}. Wired is recommended, but wireless is also explained there. +Unscrew this:@* @image{../resources/images/t400/0053,,,,jpg} -@node Getting started -@subsubsection Getting started -The beginning is based on @uref{https://wiki.parabolagnulinux.org/Installation_Guide,https://wiki.parabolagnulinux.org/Installation_Guide}. Then I referred to @uref{https://wiki.archlinux.org/index.php/Partitioning,https://wiki.archlinux.org/index.php/Partitioning} at first. +Remove the motherboard (the cage is still attached) from the right hand side, +then lift it out:@* @image{../resources/images/t400/0054,,,,jpg} +@image{../resources/images/t400/0055,,,,jpg} +@image{../resources/images/t400/0056,,,,jpg} + +Remove these screws, placing the screws in the same layout and marking each +screw hole (so that you know what ones to put the screws back into later): +@image{../resources/images/t400/0057,,,,jpg} +@image{../resources/images/t400/0058,,,,jpg} +@image{../resources/images/t400/0059,,,,jpg} +@image{../resources/images/t400/0060,,,,jpg} +@image{../resources/images/t400/0061,,,,jpg} +@image{../resources/images/t400/0062,,,,jpg} + +Separate the motherboard:@* @image{../resources/images/t400/0063,,,,jpg} +@image{../resources/images/t400/0064,,,,jpg} + +Connect your programmer, then connect GND and 3.3V@* +@image{../resources/images/t400/0065,,,,jpg} +@image{../resources/images/t400/0066,,,,jpg} +@image{../resources/images/t400/0067,,,,jpg} +@image{../resources/images/t400/0069,,,,jpg} +@image{../resources/images/t400/0070,,,,jpg} +@image{../resources/images/t400/0071,,,,jpg} + +A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is also +fine:@* @image{../resources/images/t400/0072,,,,jpg} + +Of course, make sure to turn on your PSU:@* +@image{../resources/images/x200/disassembly/0013,,,,jpg} -@node dm-mod -@subsubsection dm-mod -device-mapper will be used - a lot. Make sure that the kernel module is loaded:@* # @strong{modprobe dm-mod} +Now, you should be ready to install libreboot. -@node Create LUKS partition -@subsubsection Create LUKS partition -I am using MBR partitioning, so I use cfdisk:@* # @strong{cfdisk /dev/sda} +Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. +Alternatively, libreboot also distributes flashrom source code which can be +built. + +Log in as root on your BBB, using the instructions in @ref{Accessing the +operating system on the BBB,bbb_access}. + +Test that flashrom works:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: + +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on +linux_spi. Multiple flash chip definitions match the detected chip(s): +"MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" Please specify +which chip definition to use with the -c <chipname> option. @end verbatim + +How to backup factory.rom (change the -c option as neeed, for your flash +chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r +factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 +-r factory1.rom}@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the +@strong{-c} option is not required in libreboot's patched flashrom, because the +redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now +compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, +then just copy one of them (the factory.rom) to a safe place (on a drive +connected to another system, not the BBB). This is useful for reverse +engineering work, if there is a desirable behaviour in the original firmware +that could be replicated in coreboot and libreboot. + +Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC +address inside the libreboot ROM image, before flashing it. Although there is a +default MAC address inside the ROM image, this is not what you want. +@strong{Make sure to always change the MAC address to one that is correct for +your system.} + +Now flash it:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} -I create a single large sda1 filling the whole drive, leaving it as the default type 'Linux' (83). +@image{../resources/images/x200/disassembly/0015,,,,jpg} -Now I refer to @uref{https://wiki.archlinux.org/index.php/Dm-crypt/Drive_preparation#Partitioning,https://wiki.archlinux.org/index.php/Dm-crypt/Drive_preparation#Partitioning}:@* I am then directed to @uref{https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption,https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption}. +You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the +end, then it's flashed and should boot. If you see errors, try again (and again, +and again); the message @strong{Chip content is identical to the requested +image} is also an indication of a successful installation. -Parabola forces you to RTFM. Do that. +Example output from running the command (see above): -It tells me to run:@* # @strong{cryptsetup benchmark} (for making sure the list below is populated)@* Then:@* # @strong{cat /proc/crypto}@* This gives me crypto options that I can use. It also provides a representation of the best way to set up LUKS (in this case, security is a priority; speed, a distant second). To gain a better understanding, I am also reading:@* # @strong{man cryptsetup} +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Reading old flash chip contents... done. Erasing and writing flash +chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from +0x00000000-0x0000ffff: 0xd716 ERASE FAILED! Reading current flash chip +contents... done. Looking for another erase function. Erase/write done. +Verifying flash... VERIFIED. @end verbatim -Following that page, based on my requirements, I do the following based on @uref{https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption#Encryption_options_for_LUKS_mode,https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption#Encryption_options_for_LUKS_mode}. Reading through, it seems like Serpent (encryption) and Whirlpool (hash) is the best option. +@node Thermal paste - IMPORTANT - T400 @c @subsubheading Thermal paste +(IMPORTANT) @anchor{paste-t400} Because part of this procedure involved removing +the heatsink, you will need to apply new paste. Arctic MX-4 is ok. You will also +need isopropyl alcohol and an anti-static cloth to clean with. -I am initializing LUKS with the following:@* # @strong{cryptsetup -v --cipher serpent-xts-plain64 --key-size 512 --hash whirlpool --use-random --verify-passphrase luksFormat /dev/sda1} Choose a @strong{secure} passphrase here. Ideally lots of lowercase/uppercase numbers, letters, symbols etc all in a random pattern. The password length should be as long as you are able to handle without writing it down or storing it anywhere. +When re-installing the heatsink, you must first clean off all old paste with the +alcohol/cloth. Then apply new paste. Arctic MX-4 is also much better than the +default paste used on these systems. -Use of the @emph{diceware method} is recommended, for generating secure passphrases (instead of passwords). +@image{../resources/images/t400/paste,,,,jpg} -@node Create LVM -@subsubsection Create LVM -Now I refer to @uref{https://wiki.archlinux.org/index.php/LVM,https://wiki.archlinux.org/index.php/LVM}. +NOTE: the photo above is for illustration purposes only, and does not show how +to properly apply the thermal paste. Other guides online detail the proper +application procedure. -Open the LUKS partition:@* # @strong{cryptsetup luksOpen /dev/sda1 lvm}@* (it will be available at /dev/mapper/lvm) +@node Wifi - T400 @c @subsubheading Wifi The T400 typically comes with an Intel +wifi chipset, which does not work without proprietary software. For a list of +wifi chipsets that work without proprietary software, see @ref{Recommended wifi +chipsets,recommended_wifi}. -Create LVM partition:@* # @strong{pvcreate /dev/mapper/lvm}@* Show that you just created it:@* # @strong{pvdisplay} +Some T400 laptops might come with an Atheros chipset, but this is 802.11g only. -Now I create the volume group, inside of which the logical volumes will be created:@* # @strong{vgcreate matrix /dev/mapper/lvm}@* (volume group name is 'matrix' - choose your own name, if you like) Show that you created it:@* # @strong{vgdisplay} +It is recommended that you install a new wifi chipset. This can only be done +after installing libreboot, because the original firmware has a whitelist of +approved chips, and it will refuse to boot if you use an 'unauthorized' wifi +card. -Now create the logical volumes:@* # @strong{lvcreate -L 2G matrix -n swapvol} (2G swap partition, named swapvol)@* Again, choose your own name if you like. Also, make sure to choose a swap size of your own needs. It basically depends on how much RAM you have installed. I refer to @uref{http://www.linux.com/news/software/applications/8208-all-about-linux-swap-space,http://www.linux.com/news/software/applications/8208-all-about-linux-swap-space}.@* # @strong{lvcreate -l +100%FREE matrix -n root} (single large partition in the rest of the space, named root)@* You can also be flexible here, for example you can specify a /boot, a /, a /home, a /var, a /usr, etc. For example, if you will be running a web/mail server then you want /var in its own partition (so that if it fills up with logs, it won't crash your system). For a home/laptop system (typical use case), a root and a swap will do (really). +The following photos show an Atheros AR5B95 being installed, to replace the +Intel chip that this T400 came with:@* +@image{../resources/images/t400/0012,,,,jpg} +@image{../resources/images/t400/ar5b95,,,,jpg} -Verify that the logical volumes were created, using the following command:@* # @strong{lvdisplay} +@node WWAN - T400 @c @subsubheading WWAN If you have a WWAN/3G card and/or sim +card reader, remove them permanently. The WWAN-3G card has proprietary firmware +inside; the technology is identical to what is used in mobile phones, so it can +also track your movements. -@node Create / and swap partitions and mount -@subsubsection Create / and swap partitions, and mount -For the swapvol LV I use:@* # @strong{mkswap /dev/mapper/matrix-swapvol}@* Activate swap:@* # @strong{swapon /dev/matrix/swapvol} +Not to be confused with wifi (wifi is fine). -For the root LV I use:@* # @strong{mkfs.ext4 /dev/mapper/matrix-root} +@node Memory - T400 @c @subsubheading Memory You need DDR3 SODIMM PC3-8500 RAM +installed, in matching pairs (speed/size). Non-matching pairs won't work. You +can also install a single module (meaning, one of the slots will be empty) in +slot 0. -Mount the root (/) partition:@* # @strong{mount /dev/matrix/root /mnt} +Make sure that the RAM you buy is the 2Rx8 density. -@node Continue with Parabola installation -@subsubsection Continue with Parabola installation -This guide is really about GRUB, Parabola and cryptomount. I have to show how to install Parabola so that the guide can continue. +@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be +useful for RAM compatibility info (note: coreboot raminit is different, so this +page might be BS) -Now I am following the rest of @uref{https://wiki.parabolagnulinux.org/Installation_Guide,https://wiki.parabolagnulinux.org/Installation_Guide}. I also cross referenced @uref{https://wiki.archlinux.org/index.php/Installation_guide,https://wiki.archlinux.org/index.php/Installation_guide}. +The following photo shows 8GiB (2x4GiB) of RAM installed:@* +@image{../resources/images/t400/memory,,,,jpg} -Create /home and /boot on root mountpoint:@* # @strong{mkdir -p /mnt/home}@* # @strong{mkdir -p /mnt/boot} +@node Booting - T400 @c @subsubheading Boot it! You should see something like +this: -Once all the remaining partitions, if any, have been mounted, the devices are ready to install Parabola. +@image{../resources/images/t400/boot0,,,,jpg} +@image{../resources/images/t400/boot1,,,,jpg} -In @strong{/etc/pacman.d/mirrorlist}, comment out all lines except the Server line closest to where you are (I chose the UK Parabola server (main server)) and then did:@* # @strong{pacman -Syy}@* # @strong{pacman -Syu}@* # @strong{pacman -Sy pacman} (and then I did the other 2 steps above, again)@* In my case I did the steps in the next paragraph, and followed the steps in this paragraph again. +Now @ref{GNU/Linux distributions,install GNU/Linux}. -<troubleshooting>@* @ @ @ The following is based on 'Verification of package signatures' in the Parabola install guide.@* @ @ @ Check there first to see if steps differ by now.@* @ @ @ Now you have to update the default Parabola keyring. This is used for signing and verifying packages:@* @ @ @ # @strong{pacman -Sy parabola-keyring}@* @ @ @ It says that if you get GPG errors, then it's probably an expired key and, therefore, you should do:@* @ @ @ # @strong{pacman-key --populate parabola}@* @ @ @ # @strong{pacman-key --refresh-keys}@* @ @ @ # @strong{pacman -Sy parabola-keyring}@* @ @ @ To be honest, you should do the above anyway. Parabola has a lot of maintainers, and a lot of keys. Really!@* @ @ @ If you get an error mentioning dirmngr, do:@* @ @ @ # @strong{dirmngr </dev/null}@* @ @ @ Also, it says that if the clock is set incorrectly then you have to manually set the correct time @* @ @ @ (if keys are listed as expired because of it):@* @ @ @ # @strong{date MMDDhhmm[[CC]YY][.ss]}@* @ @ @ I also had to install:@* @ @ @ # @strong{pacman -S archlinux-keyring}@* @ @ @ # @strong{pacman-key --populate archlinux}@* @ @ @ In my case I saw some conflicting files reported in pacman, stopping me from using it.@* @ @ @ I deleted the files that it mentioned and then it worked. Specifically, I had this error:@* @ @ @ @emph{licenses: /usr/share/licenses/common/MPS exists in filesystem}@* @ @ @ I rm -Rf'd the file and then pacman worked. I'm told that the following would have also made it work:@* @ @ @ # @strong{pacman -Sf licenses}@* </troubleshooting>@* -I also like to install other packages (base-devel, compilers and so on) and wpa_supplicant/dialog/iw/wpa_actiond are needed for wireless after the install:@* # @strong{pacstrap /mnt base base-devel wpa_supplicant dialog iw wpa_actiond} +@node ThinkPad T500 @subsubsection Flashing the T500 with a BeagleBone Black +Initial flashing instructions for T500. -@node Configure the system -@subsubsection Configure the system -Generate an fstab - UUIDs are used because they have certain advantages (see @uref{https://wiki.parabola.nu/Fstab#Identifying_filesystems,https://wiki.parabola.nu/Fstab#Identifying_filesystems}. If you prefer labels instead, replace the -U option with -L):@* # @strong{genfstab -U -p /mnt >> /mnt/etc/fstab}@* Check the created file:@* # @strong{cat /mnt/etc/fstab}@* (If there are any errors, edit the file. Do @strong{NOT} run the genfstab command again!) +This guide is for those who want libreboot on their ThinkPad T500 while they +still have the original Lenovo BIOS present. This guide can also be followed +(adapted) if you brick your T500, to know how to recover. -Chroot into new system:@* # @strong{arch-chroot /mnt /bin/bash} +@menu +* Libreboot T400 - T500:: Serial port - T500:: LCD compatibly - T500:: A note +* about CPUs - T500:: A note about GPUs - T500:: CPU paste required - T500:: +* Flash chip size - T500:: MAC address - T500:: Initial BBB configuration - +* T500:: The procedure - T500:: Thermal paste - IMPORTANT - T500:: Wifi - T500:: +* WWAN - T500:: Memory - T500:: Booting - T500:: +@end menu -It's a good idea to have this installed:@* # @strong{pacman -S linux-libre-lts} +@node Libreboot T400 - T500 @c @subsubheading Libreboot T400 You may also be +interested in the smaller, more portable @ref{ThinkPad T400,Libreboot T400}. + +@node Serial port - T500 @c @subsubheading Serial port EHCI debug might not be +needed. It has been reported that the docking station for this laptop has a +serial port, so it might be possible to use that instead. + +@node LCD compatibly - T500 @c @subsubheading LCD compatibly Not all LCD panels +are compatible yet. See @ref{LCD compatibility on GM45 laptops,gm45_lcd}. + +@node A note about CPUs - T500 @c @subsubheading A note about CPUs +@uref{http://www.thinkwiki.org/wiki/Category:T500,ThinkWiki} has a list of CPUs +for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in +libreboot. The T9600 was also tested on the T400 and confirmed working, so the +T9400/T9500/T9550 probably also work, but they are untested. + +@itemize @item Quad-core CPUs @itemize @minus @item Incompatible. Do not use. +@end itemize @end itemize + +@node A note about GPUs - T500 @c @subsubheading A note about GPUs Some models +have an Intel GPU, while others have both an ATI and an Intel GPU; this is +referred to as "switchable graphics". In the @emph{BIOS setup} program for +lenovobios, you can specify that the system will use one or the other (but not +both). + +Libreboot is known to work on systems with only the Intel GPU, using native +graphics initialization. On systems with switchable graphics, the Intel GPU is +used and the ATI GPU is disabled, so native graphics initialization works all +the same. + +@node CPU paste required - T500 @c @subsubheading CPU paste required See +@xref{paste-t500,,paste}. + +@node Flash chip size - T500 @c @subsubheading Flash chip size Use this to find +out:@* # @strong{dmidecode | grep ROM\ Size} + +@node MAC address - T500 @c @subsubheading MAC address On the T500, the MAC +address for the onboard gigabit ethernet chipset is stored inside the flash +chip, along with other configuration data. + +Keep a note of the MAC address before disassembly; this is very important, +because you will need to insert this into the libreboot ROM image before +flashing it. It will be written in one of these locations: + +@image{../resources/images/t400/macaddress0,,,,jpg} +@image{../resources/images/t400/macaddress1,,,,jpg} +@image{../resources/images/x200/disassembly/0001,,,,jpg} + +@node Initial BBB configuration - T500 @c @subsubheading Initial BBB +configuration Refer to @ref{How to program an SPI flash chip with BeagleBone +Black,bbb_setup} for how to configure the BBB for flashing. + +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-16 (clip: Pomona 5252): + +@verbatim POMONA 5252 (correlate with the BBB guide) === ethernet jack and VGA +port ==== NC - - 21 1 - - 17 NC +- - NC NC - - NC NC - - NC NC +- - NC 18 - - 3.3V (PSU) 22 - - NC - + this is pin 1 on the flash chip === SATA port === This is how you will + connect. Numbers refer to pin numbers on the BBB, on the plugs near the + DC jack. @end verbatim + +The following shows how to connect clip to the BBB (on the P9 header), for +SOIC-8 (clip: Pomona 5250): + +@verbatim POMONA 5250 (correlate with the BBB guide) === RAM slots ==== 18 +- - 1 22 - - NC NC - - 21 3.3V (PSU) +- - 17 - this is pin 1 on the flash chip === slot where the AC jack is +connected === This is how you will connect. Numbers refer to pin numbers on the +BBB, on the plugs near the DC jack. @end verbatim + + +@node The procedure - T500 @c @subsubheading The procedure Remove all screws:@* +@image{../resources/images/t500/0000,,,,jpg}@* It is also advisable to, +throughout the disassembly, place any screws and/or components that you removed +in the same layout or arrangement. The follow photos demonstrate this:@* +@image{../resources/images/t500/0001,,,,jpg} +@image{../resources/images/t500/0002,,,,jpg} + +Remove the HDD/SSD and optical drive:@* +@image{../resources/images/t500/0003,,,,jpg} +@image{../resources/images/t500/0004,,,,jpg} + +Remove the palm rest:@* @image{../resources/images/t500/0005,,,,jpg} +@image{../resources/images/t500/0006,,,,jpg} + +Remove the keyboard and rear bezel:@* +@image{../resources/images/t500/0007,,,,jpg} +@image{../resources/images/t500/0008,,,,jpg} +@image{../resources/images/t500/0009,,,,jpg} +@image{../resources/images/t500/0010,,,,jpg} +@image{../resources/images/t500/0011,,,,jpg} +@image{../resources/images/t500/0012,,,,jpg} + +If you have a WWAN/3G card and/or sim card reader, remove them permanently. The +WWAN-3G card has proprietary firmware inside; the technology is identical to +what is used in mobile phones, so it can also track your movements:@* +@image{../resources/images/t500/0013,,,,jpg} +@image{../resources/images/t500/0017,,,,jpg} +@image{../resources/images/t500/0018,,,,jpg} + +Remove this frame, and then remove the wifi chip:@* +@image{../resources/images/t500/0014,,,,jpg} +@image{../resources/images/t500/0015,,,,jpg} +@image{../resources/images/t500/0016,,,,jpg} + +Remove the speakers:@* @image{../resources/images/t500/0019,,,,jpg} +@image{../resources/images/t500/0020,,,,jpg} +@image{../resources/images/t500/0021,,,,jpg} +@image{../resources/images/t500/0022,,,,jpg} +@image{../resources/images/t500/0023,,,,jpg} +@image{../resources/images/t500/0024,,,,jpg} +@image{../resources/images/t500/0025,,,,jpg} + +Remove the NVRAM battery (already removed in this photo):@* +@image{../resources/images/t500/0026,,,,jpg} + +When you re-assemble, you will be replacing the wifi chip with another. These +two screws don't hold anything together, but they are included in your system +because the screw holes for half-height cards are a different size, so use these +if you will be installing a half-height card:@* +@image{../resources/images/t500/0027,,,,jpg} + +Unroute the antenna wires:@* @image{../resources/images/t500/0028,,,,jpg} +@image{../resources/images/t500/0029,,,,jpg} +@image{../resources/images/t500/0030,,,,jpg} +@image{../resources/images/t500/0031,,,,jpg} + +Disconnect the LCD cable from the motherboard:@* +@image{../resources/images/t500/0032,,,,jpg} +@image{../resources/images/t500/0033,,,,jpg} + +Remove the LCD assembly hinge screws, and then remove the LCD assembly:@* +@image{../resources/images/t500/0034,,,,jpg} +@image{../resources/images/t500/0035,,,,jpg} +@image{../resources/images/t500/0036,,,,jpg} + +Remove the fan and heatsink:@* @image{../resources/images/t500/0037,,,,jpg} +@image{../resources/images/t500/0038,,,,jpg} +@image{../resources/images/t500/0039,,,,jpg} -It was also suggested that you should install this kernel (read up on what GRSEC is):@* # @strong{pacman -S linux-libre-grsec} +Remove this screw:@* @image{../resources/images/t500/0040,,,,jpg} -This is another kernel that sits inside /boot, which you can use. LTS means 'long-term support'. These are so-called 'stable' kernels that can be used as a fallback during updates, if a bad kernel causes issues for you. +Remove these cables, keeping note of how and in what arrangement they are +connected:@* @image{../resources/images/t500/0041,,,,jpg} +@image{../resources/images/t500/0042,,,,jpg} +@image{../resources/images/t500/0043,,,,jpg} +@image{../resources/images/t500/0044,,,,jpg} +@image{../resources/images/t500/0045,,,,jpg} +@image{../resources/images/t500/0046,,,,jpg} +@image{../resources/images/t500/0047,,,,jpg} +@image{../resources/images/t500/0048,,,,jpg} +@image{../resources/images/t500/0049,,,,jpg} + +Disconnect the power jack:@* @image{../resources/images/t500/0050,,,,jpg} +@image{../resources/images/t500/0051,,,,jpg} + +Remove the motherboard and cage from the base (the marked hole is where those +cables were routed through):@* @image{../resources/images/t500/0052,,,,jpg} +@image{../resources/images/t500/0053,,,,jpg} + +Remove all screws, arranging them in the same layout when placing the screws on +a surface and marking each screw hole (this is to reduce the possibility of +putting them back in the wrong holes):@* +@image{../resources/images/t500/0054,,,,jpg} +@image{../resources/images/t500/0055,,,,jpg} + +Also remove this:@* @image{../resources/images/t500/0056,,,,jpg} +@image{../resources/images/t500/0057,,,,jpg} + +Separate the motherboard from the cage:@* +@image{../resources/images/t500/0058,,,,jpg} +@image{../resources/images/t500/0059,,,,jpg} + +The flash chip is next to the memory slots. On this system, it was a SOIC-8 +(4MiB or 32Mb) flash chip:@* @image{../resources/images/t500/0060,,,,jpg} + +Connect your programmer, then connect GND and 3.3V@* +@image{../resources/images/t500/0061,,,,jpg}@* +@image{../resources/images/t400/0067,,,,jpg} +@image{../resources/images/t400/0069,,,,jpg} +@image{../resources/images/t400/0070,,,,jpg} +@image{../resources/images/t400/0071,,,,jpg} + +A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is also +fine:@* @image{../resources/images/t400/0072,,,,jpg} + +Of course, make sure to turn on your PSU:@* +@image{../resources/images/x200/disassembly/0013,,,,jpg} -Parabola does not have wget. This is sinister. Install it:@* # @strong{pacman -S wget} +Now, you should be ready to install libreboot. -Locale:@* # @strong{nano /etc/locale.gen}@* Uncomment your needed localisations. For example en_GB.UTF-8 (UTF-8 is highly recommended over other options).@* # @strong{locale-gen}@* # @strong{echo LANG=en_GB.UTF-8 > /etc/locale.conf}@* # @strong{export LANG=en_GB.UTF-8} +Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. +Alternatively, libreboot also distributes flashrom source code which can be +built. + +Log in as root on your BBB, using the instructions in @ref{Accessing the +operating system on the BBB,bbb_access}. + +Test that flashrom works:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512}@* In this case, the output was: + +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on +linux_spi. Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on +linux_spi. Multiple flash chip definitions match the detected chip(s): +"MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" Please specify +which chip definition to use with the -c <chipname> option. @end verbatim + +How to backup factory.rom (change the -c option as neeed, for your flash +chip):@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r +factory.rom}@* # @strong{./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 +-r factory1.rom}@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom}@* Note: the +@strong{-c} option is not required in libreboot's patched flashrom, because the +redundant flash chip definitions in @emph{flashchips.c} have been removed.@* Now +compare the 3 images:@* # @strong{sha512sum factory*.rom}@* If the hashes match, +then just copy one of them (the factory.rom) to a safe place (on a drive +connected to another system, not the BBB). This is useful for reverse +engineering work, if there is a desirable behaviour in the original firmware +that could be replicated in coreboot and libreboot. + +Follow the instructions at @ref{ICH9 gen utility,ich9gen} to change the MAC +address inside the libreboot ROM image, before flashing it. Although there is a +default MAC address inside the ROM image, this is not what you want. +@strong{Make sure to always change the MAC address to one that is correct for +your system.} + +Now flash it:@* # @strong{./flashrom -p +linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V} -Console font and keymap:@* # @strong{nano /etc/vconsole.conf}@* In my case: +@image{../resources/images/x200/disassembly/0015,,,,jpg} -@verbatim -KEYMAP=dvorak-uk -FONT=lat9w-16 -@end verbatim +You might see errors, but if it says @strong{Verifying flash... VERIFIED} at the +end, then it's flashed and should boot. If you see errors, try again (and again, +and again); the message @strong{Chip content is identical to the requested +image} is also an indication of a successful installation. -Time zone:@* # @strong{ln -s /usr/share/zoneinfo/Europe/London /etc/localtime}@* (Replace Zone and Subzone to your liking. See /usr/share/zoneinfo) +Example output from running the command (see above): -Hardware clock:@* # @strong{hwclock --systohc --utc} +@verbatim flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) flashrom is free +software, get the source code at http://www.flashrom.org Calibrating delay +loop... OK. Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on +linux_spi. Reading old flash chip contents... done. Erasing and writing flash +chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from +0x00000000-0x0000ffff: 0xd716 ERASE FAILED! Reading current flash chip +contents... done. Looking for another erase function. Erase/write done. +Verifying flash... VERIFIED. @end verbatim -Hostname: Write your hostname to /etc/hostname. For example, if your hostname is parabola:@* # @strong{echo parabola > /etc/hostname}@* Add the same hostname to /etc/hosts:@* # @strong{nano /etc/hosts}@* -@verbatim -#<ip-address> <hostname.domain.org> <hostname> -127.0.0.1 localhost.localdomain localhost parabola -::1 localhost.localdomain localhost parabola -@end verbatim +@node Thermal paste - IMPORTANT - T500 @c @subsubheading Thermal paste +(IMPORTANT) @anchor{paste-t500} Because part of this procedure involved removing +the heatsink, you will need to apply new paste. Arctic MX-4 is ok. You will also +need isopropyl alcohol and an anti-static cloth to clean with. -Configure the network: Refer to @uref{https://wiki.parabola.nu/Beginners%27_guide#Configure_the_network,https://wiki.parabola.nu/Beginners%27_guide#Configure_the_network}. +When re-installing the heatsink, you must first clean off all old paste with the +alcohol/cloth. Then apply new paste. Arctic MX-4 is also much better than the +default paste used on these systems. -Mkinitcpio: Configure /etc/mkinitcpio.conf as needed (see @uref{https://wiki.parabola.nu/Mkinitcpio,https://wiki.parabola.nu/Mkinitcpio}). Runtime modules can be found in /usr/lib/initcpio/hooks, and build hooks can be found in /usr/lib/initcpio/install. (# @strong{mkinitcpio -H hookname} gives information about each hook.) Specifically, for this use case:@* # @strong{nano /etc/mkinitcpio.conf}@* Then modify the file like so: +@image{../resources/images/t400/paste,,,,jpg} -@itemize -@item -MODULES="i915" -@item -This forces the driver to load earlier, so that the console font isn't wiped out after getting to login). Macbook21 users will also need to add the @strong{"hid-generic", "hid" and "hid-apple" modules to have a working keyboard when asked to enter the LUKS password.} -@item -HOOKS="base udev autodetect modconf block keyboard keymap consolefont encrypt lvm2 filesystems fsck shutdown" -@item -Explanation: -@item -keymap adds to initramfs the keymap that you specified in /etc/vconsole.conf -@item -consolefont adds to initramfs the font that you specified in /etc/vconsole.conf -@item -encrypt adds LUKS support to the initramfs - needed to unlock your disks at boot time -@item -lvm2 adds LVM support to the initramfs - needed to mount the LVM partitions at boot time -@item -shutdown is needed according to Parabola wiki for unmounting devices (such as LUKS/LVM) during shutdown) -@end itemize +NOTE: the photo above is for illustration purposes only, and does not show how +to properly apply the thermal paste. Other guides online detail the proper +application procedure. + +@node Wifi - T500 @c @subsubheading Wifi The T500 typically comes with an Intel +wifi chipset, which does not work without proprietary software. For a list of +wifi chipsets that work without proprietary software, see @ref{Recommended wifi +chipsets,recommended_wifi}. + +Some T500 laptops might come with an Atheros chipset, but this is 802.11g only. -Now using mkinitcpio, you can create the kernel and ramdisk for booting with (this is different from Arch, specifying linux-libre instead of linux):@* # @strong{mkinitcpio -p linux-libre}@* Also do it for linux-libre-lts:@* # @strong{mkinitcpio -p linux-libre-lts}@* Also do it for linux-libre-grsec:@* # @strong{mkinitcpio -p linux-libre-grsec} +It is recommended that you install a new wifi chipset. This can only be done +after installing libreboot, because the original firmware has a whitelist of +approved chips, and it will refuse to boot if you use an 'unauthorized' wifi +card. -Set the root password: At the time of writing, Parabola used SHA512 by default for its password hashing. I referred to @uref{https://wiki.archlinux.org/index.php/SHA_password_hashes,https://wiki.archlinux.org/index.php/SHA_password_hashes}.@* # @strong{nano /etc/pam.d/passwd}@* Add rounds=65536 at the end of the uncommented 'password' line.@* # @strong{passwd root}@* Make sure to set a secure password! Also, it must never be the same as your LUKS password. +The following photos show an Atheros AR5B95 being installed, to replace the +Intel chip that this T500 came with:@* +@image{../resources/images/t400/0012,,,,jpg} +@image{../resources/images/t400/ar5b95,,,,jpg} -Use of the @emph{diceware method} is recommended, for generating secure passphrases (instead of passwords). +@node WWAN - T500 @c @subsubheading WWAN If you have a WWAN/3G card and/or sim +card reader, remove them permanently. The WWAN-3G card has DMA, and proprietary +firmware inside; the technology is identical to what is used in mobile phones, +so it can also track your movements. -@node Extra security tweaks -@subsubsection Extra security tweaks -Based on @uref{https://wiki.archlinux.org/index.php/Security,https://wiki.archlinux.org/index.php/Security}. +Not to be confused with wifi (wifi is fine). + +@node Memory - T500 @c @subsubheading Memory You need DDR3 SODIMM PC3-8500 RAM +installed, in matching pairs (speed/size). Non-matching pairs won't work. You +can also install a single module (meaning, one of the slots will be empty) in +slot 0. -Restrict access to important directories:@* # @strong{chmod 700 /boot /etc/@{iptables,arptables@}} +Make sure that the RAM you buy is the 2Rx8 density. -Lockout user after three failed login attempts:@* Edit the file /etc/pam.d/system-login and comment out that line:@* @emph{# auth required pam_tally.so onerr=succeed file=/var/log/faillog}@* Or just delete it. Above it, put:@* @emph{auth required pam_tally.so deny=2 unlock_time=600 onerr=succeed file=/var/log/faillog}@* To unlock a user manually (if a password attempt is failed 3 times), do:@* # @strong{pam_tally --user @emph{theusername} --reset} What the above configuration does is lock the user out for 10 minutes, if they make 3 failed login attempts. +@uref{http://www.forum.thinkpads.com/viewtopic.php?p=760721, This page} might be +useful for RAM compatibility info (note: coreboot raminit is different, so this +page might be BS) -Configure sudo - not covered here. Will be covered post-installation in another tutorial, at a later date. If this is a single-user system, you don't really need sudo. +The following photo shows 8GiB (2x4GiB) of RAM installed:@* +@image{../resources/images/t400/memory,,,,jpg} -@node Unmount reboot! -@subsubsection Unmount, reboot! -Exit from chroot:@* # @strong{exit} +@node Booting - T500 @c @subsubheading Boot it! You should see something like +this: -unmount:@* # @strong{umount -R /mnt}@* # @strong{swapoff -a} +@image{../resources/images/t500/0062,,,,jpg} -deactivate the lvm lv's:@* # @strong{lvchange -an /dev/matrix/root}@* # @strong{lvchange -an /dev/matrix/swapvol}@* +Now @ref{GNU/Linux distributions,install GNU/Linux}. -Lock the encrypted partition (close it):@* # @strong{cryptsetup luksClose lvm} -# @strong{shutdown -h now}@* Remove the installation media, then boot up again. -@node Booting from GRUB -@subsubsection Booting from GRUB -Initially you will have to boot manually. Press C to get to the GRUB command line. The underlined parts are optional (using those 2 underlines will boot lts kernel instead of normal). -grub> @strong{cryptomount -a}@* grub> @strong{set root='lvm/matrix-root'}@* grub> @strong{linux /boot/vmlinuz-linux-libre-lts root=/dev/matrix/root cryptdevice=/dev/sda1:root}@* grub> @strong{initrd /boot/initramfs-linux-libre-lts.img}@* grub> @strong{boot}@* -You could also make it load /boot/vmlinuz-linux-libre-grsec and /boot/initramfs-linux-libre-grsec.img -@node Follow-up tutorial configuring Parabola -@subsubsection Follow-up tutorial: configuring Parabola -We will modify grub.config inside the ROM and do all kinds of fun stuff, but I recommend that you first transform the current bare-bones Parabola install into a more useable system. Doing so will make the upcoming ROM modifications MUCH easier to perform and less risky! @ref{Configuring Parabola post-install,configuring_parabola} shows my own notes post-installation. Using these, you can get a basic system similar to the one that I chose for myself. You can also cherry pick useful notes and come up with your own system. Parabola is user-centric, which means that you are in control. For more information, read @uref{https://wiki.archlinux.org/index.php/The_Arch_Way,The Arch Way} (Parabola also follows it). +@node GNU/Linux distributions @section GNU/Linux distributions This section +relates to dealing with GNU/Linux distributions: preparing bootable USB drives, +changing the default GRUB menu and so on. -@node Modify grubcfg inside the ROM -@subsubsection Modify grub.cfg inside the ROM -(Re-)log in to your system, pressing C, so booting manually from GRUB (see above). You need to modify the ROM, so that Parabola can boot automatically with this configuration. @ref{How to replace the default GRUB configuration file on a libreboot system,grub_cbfs} shows you how. Follow that guide, using the configuration details below. If you go for option 2 (re-flash), promise to do this on grubtest.cfg first! We can't emphasise this enough. This is to reduce the possibility of bricking your device! +@strong{This section is only for the *GRUB* payload. For depthcharge, +instructions have yet to be written.} -I will go for the re-flash option here. Firstly, cd to the libreboot_util/cbfstool/@{armv7l i686 x86_64@} directory. Dump the current firmware - where @emph{libreboot.rom} is an example: make sure to adapt:@* # @strong{flashrom -p internal -r libreboot.rom}@* If flashrom complains about multiple flash chips detected, add a @emph{-c} option at the end, with the name of your chosen chip is quotes.@* You can check if everything is in there (@emph{grub.cfg} and @emph{grubtest.cfg} would be really nice):@* $ @strong{./cbfstool libreboot.rom print}@* Extract grubtest.cfg:@* $ @strong{./cbfstool libreboot.rom extract -n grubtest.cfg -f grubtest.cfg}@* And modify:@* $ @strong{nano grubtest.cfg} +@menu +* How to install GNU/Linux on a libreboot system:: How to replace the default +* GRUB configuration file on a libreboot system:: Writing a GRUB configuration +* file:: Installing Parabola GNU/Linux-libre with full disk encryption:: +* (Including /boot) Configuring Parabola post-install:: Installing Trisquel +* GNU/Linux-libre with full disk encryption:: (Including /boot) +@end menu -In grubtest.cfg, inside the 'Load Operating System' menu entry, change the contents to: -@verbatim -cryptomount -a -set root='lvm/matrix-root' -linux /boot/vmlinuz-linux-libre-lts root=/dev/matrix/root cryptdevice=/dev/sda1:root -initrd /boot/initramfs-linux-libre-lts.img -@end verbatim +@node How to install GNU/Linux on a libreboot system @subsection How to install +GNU/Linux on a libreboot system This section relates to preparing, booting and +installing a GNU/Linux distribution on your libreboot system, using nothing more +than a USB flash drive (and @emph{dd}). -Note: the underlined parts above (-lts) can also be removed, to boot the latest kernel instead of LTS (long-term support) kernels. You could also copy the menu entry and in one have -lts, and without in the other menuentry. You could also create a menu entry to load /boot/vmlinuz-linux-libre-grsec and /boot/initramfs-linux-libre-grsec.img The first entry will load by default. +@strong{This section is only for the GRUB payload. For depthcharge (used on CrOS +devices in libreboot), instructions have yet to be written in the libreboot +documentation.} -Without specifying a device, the @emph{-a} parameter tries to unlock all detected LUKS volumes. You can also specify -u UUID or -a (device). +@menu +* Prepare the USB drive in GNU/Linux:: Installing GNU/Linux with full disk +* encryption:: GNU Guix System Distribution?:: Trisquel net install?:: Booting +* ISOLINUX images - automatic method:: Booting ISOLINUX images - manual method:: +* Troubleshooting GNU/Linux installation:: +@end menu -Now, to protect your system from an attacker simply booting a live usb distro and re-flashing the boot firmware, we are going to add a password for GRUB. In a new terminal window, if you are not yet online, start dhcp on ethernet:@* # @strong{systemctl start dhcpcd.service} Or make sure to get connected to the internet in any other way you prefer, at least. +@node Prepare the USB drive in GNU/Linux @subsubsection Prepare the USB drive +(in GNU/Linux) Connect the USB drive. Check dmesg:@* @strong{$ dmesg}@* Check +lsblk to confirm which drive it is:@* @strong{$ lsblk} + +Check that it wasn't automatically mounted. If it was, unmount it. For +example:@* @strong{$ sudo umount /dev/sdX*}@* @strong{# umount /dev/sdX*} + +dmesg told you what device it is. Overwrite the drive, writing your distro ISO +to it with dd. For example:@* @strong{$ sudo dd if=gnulinux.iso of=/dev/sdX +bs=8M; sync}@* @strong{# dd if=gnulinux.iso of=/dev/sdX bs=8M; sync} + +You should now be able to boot the installer from your USB drive. Continue +reading, for information about how to do that. + +@node Installing GNU/Linux with full disk encryption @subsubsection Installing +GNU/Linux with full disk encryption @itemize @item @ref{Installing Trisquel +GNU/Linux-libre with full disk encryption,Installing Trisquel GNU/Linux with +full disk encryption (including /boot)} @item @ref{Installing Parabola +GNU/Linux-libre with full disk encryption,Installing Parabola GNU/Linux with +full disk encryption (including /boot)} @end itemize + +@node GNU Guix System Distribution? @subsubsection GNU Guix System +Distribution? The Guix installers use the GRUB bootloader, unlike most +GNU/Linux installers which will likely use ISOLINUX. @c TYPO: uses > use + +To boot the Guix live USB install, select @strong{@emph{Search for GRUB +configuration (grub.cfg) outside of CBFS}} from the GRUB payload menu. After you +have done that, a new menuentry will appear at the very bottom with text like +@strong{@emph{Load Config from (usb0)}}; select that, and it should boot. + +Once you have installed Guix onto the main storage device, check @ref{1st option +- don't re-flash,option1_dont_reflash} for hints on how to boot it. + +GuixSD (Guix System Distribution) is highly recommended; it's part of GNU, and +@uref{https://www.gnu.org/distros/free-distros.html,endorsed} by the Free +Software Foundation. + +@node Trisquel net install? @subsubsection Trisquel net install? Tip: don't +use the official net install image. Download the full GNOME ISO (the ~1.5GiB +one). In this ISO, there is still the capability to boot the net install, while +it also provides an easy to use live system (which you can boot from USB). This +ISO also works using @emph{syslinux_configfile -i} (the @emph{Parse ISOLINUX} +menu entries in the default GRUB configuration that libreboot uses). + +@node Booting ISOLINUX images - automatic method @subsubsection Booting ISOLINUX +images (automatic method) Boot it in GRUB using the @emph{Parse ISOLINUX config +(USB)} option. A new menu should appear in GRUB, showing the boot options for +that distro; this is a GRUB menu, converted from the usual ISOLINUX menu +provided by that distro. + +@node Booting ISOLINUX images - manual method @subsubsection Booting ISOLINUX +images (manual method) @emph{These are generic instructions. They may or may not +be correct for your distribution. You must adapt them appropriately, for +whatever GNU/Linux distribution it is that you are trying to install.} + +If the ISOLINUX parser or @emph{Search for GRUB configuration} options won't +work, then press C in GRUB to access the command line.@* grub> @strong{ls}@* Get +the device from above output, eg (usb0). Example:@* grub> @strong{cat +(usb0)/isolinux/isolinux.cfg}@* Either this will show the ISOLINUX menuentries +for that ISO, or link to other .cfg files, for example /isolinux/foo.cfg.@* If +it did that, then you do:@* grub> @strong{cat (usb0)/isolinux/foo.cfg}@* And so +on, until you find the correct menuentries for ISOLINUX. @strong{The file +@emph{/isolinux/foo.cfg} is a fictional example. Do not actually use this +example, unless you actually have that file, if it is appropriate.} + +For Trisquel (and other debian-based distros), there are typically menuentries +listed in @emph{/isolinux/txt.cfg} or @emph{/isolinux/gtk.cfg}. For +dual-architecture ISO images (i686 and x86_64), there may be separate +files/directories for each architecture. Just keep searching through the image, +until you find the correct ISOLINUX configuration file. + +Now look at the ISOLINUX menuentry. It'll look like:@* @strong{kernel +/path/to/kernel@* append PARAMETERS initrd=/path/to/initrd +MAYBE_MORE_PARAMETERS@*} GRUB works the same way, but in it's own way. Example +GRUB commands:@* grub> @strong{set root='usb0'}@* grub> @strong{linux +/path/to/kernel PARAMETERS MAYBE_MORE_PARAMETERS}@* grub> @strong{initrd +/path/to/initrd}@* grub> @strong{boot}@* Note: @emph{usb0} may be incorrect. +Check the output of the @emph{ls} command in GRUB, to see a list of USB +devices/partitions. Of course this will vary from distro to distro. If you did +all of that correctly, then it should now be booting your USB drive in the way +that you specified. + + +@node Troubleshooting GNU/Linux installation @subsubsection Troubleshooting +GNU/Linux installation Most of these issues occur when using libreboot with +coreboot's 'text mode' instead of the coreboot framebuffer. This mode is useful +for booting payloads like memtest86+ which expect text-mode, but for GNU/Linux +distributions it can be problematic when they are trying to switch to a +framebuffer because it doesn't exist. + +In most cases, you should use the vesafb ROM images. Example filename: +libreboot_ukdvorak_vesafb.rom. -Use of the @emph{diceware method} is recommended, for generating secure passphrases (instead of passwords). +@menu +* Parabola won't boot in text-mode:: Debian-installer graphical corruption in +* text-mode:: (Trisquel net install) +@end menu -AGAIN: MAKE SURE TO DO THIS WHOLE SECTION ON grubtest.cfg *BEFORE* DOING IT ON grub.cfg. (When we get there, upon reboot, select the menu entry that says @emph{Switch to grubtest.cfg} and test that it works. Only once you are satisfied, copy that to grub.cfg. Only a few steps to go, though.) WHY? BECAUSE AN INCORRECTLY SET PASSWORD CONFIG MEANS YOU CAN'T AUTHENTICATE, WHICH MEANS 'BRICK'. +@node Parabola won't boot in text-mode @ifinfo @subsubheading Parabola won't +boot in text-mode @end ifinfo Use one of the ROM images with vesafb in the +filename (uses coreboot framebuffer instead of text-mode). -(emphasis added, because it's needed: this is a common roadblock for users.) +@node Debian-installer graphical corruption in text-mode @ifinfo @subsubheading +Debian-installer (trisquel net install) graphical corruption in text-mode @end +ifinfo When using the ROM images that use coreboot's "text mode" instead of the +coreboot framebuffer, booting the Trisquel net installer results in graphical +corruption because it is trying to switch to a framebuffer which doesn't exist. +Use that kernel parameter on the 'linux' line when booting it:@* +@strong{vga=normal fb=false} -We need a utility that comes with GRUB, so we will download it temporarily. (Remember that GRUB isn't needed for booting, since it's already included as a payload in libreboot.) Also, we will use flashrom, and I installed dmidecode. You only need base-devel (compilers and so on) to build and use cbfstool. It was already installed if you followed this tutorial, but here it is:@* # @strong{pacman -S grub flashrom dmidecode base-devel}@* Next, do:@* # @strong{grub-mkpasswd-pbkdf2}@* Enter your chosen password at the prompt and your hash will be shown. Copy this string - you will add it to your grubtest.cfg. +Tested in Trisquel 6 (and 7). This forces debian-installer to start in +text-mode, instead of trying to switch to a framebuffer. -The password below (it's @strong{password}, by the way) after @emph{'password_pbkdf2 root'} @emph{should be changed} to your own. Make sure to specify a password that is different from both your LUKS *and* your root/user password. Obviously, do not simply copy and paste the examples shown here... +If selecting text-mode from a GRUB menu created using the ISOLINUX parser, you +can press E on the menu entry to add this. Or, if you are booting manually (from +GRUB terminal) then just add the parameters. -Next, back in grubtest.cfg, above the first 'Load Operating System' menu entry, you should now add your GRUB password, like so (replace with your own name (I used @strong{root} on both lines, feel free to choose another one) and the password hash which you copied): +This workaround was found on the page: +@uref{https://www.debian.org/releases/stable/i386/ch05s04.html,https://www.debian.org/releases/stable/i386/ch05s04.html}. +It should also work for gNewSense, Debian and any other apt-get distro that +provides debian-installer (text mode) net install method. -@verbatim -set superusers="root" -password_pbkdf2 root grub.pbkdf2.sha512.10000.711F186347156BC105CD83A2ED7AF1EB971AA2B1EB2640172F34B0DEFFC97E654AF48E5F0C3B7622502B76458DA494270CC0EA6504411D676E6752FD1651E749.8DD11178EB8D1F633308FD8FCC64D0B243F949B9B99CCEADE2ECA11657A757D22025986B0FA116F1D5191E0A22677674C994EDBFADE62240E9D161688266A711 -@end verbatim -Save your changes in grubtest.cfg, then delete the unmodified config from the ROM image:@* $ @strong{./cbfstool libreboot.rom remove -n grubtest.cfg}@* and insert the modified grubtest.cfg:@* $ @strong{./cbfstool libreboot.rom add -n grubtest.cfg -f grubtest.cfg -t raw}@* -Now refer to @uref{http://libreboot.org/install/index.html#flashrom,http://libreboot.org/install/index.html#flashrom}. Cd (up) to the libreboot_util directory and update the flash chip contents:@* # @strong{./flash update libreboot.rom}@* Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but you are sure that you chose the correct ROM image, then run this alternative command:@* # @strong{./flash forceupdate libreboot.rom}@* You should see "Verifying flash... VERIFIED." written at the end of the flashrom output. -With this new configuration, Parabola can boot automatically and you will have to enter a password at boot time, in GRUB, before being able to use any of the menu entries or switch to the terminal. Let's test it out: reboot and choose grubtest.cfg from the GRUB menu, using the arrow keys on your keyboard. Enter the name you chose, the GRUB password, your LUKS passphrase and login as root/your user. All went well? Great! +@node How to replace the default GRUB configuration file on a libreboot system +@subsection How to replace the default GRUB configuration file on a libreboot +system Libreboot on x86 uses the GRUB +@uref{http://www.coreboot.org/Payloads#GRUB_2,payload} by default, which means +that the GRUB configuration file (where your GRUB menu comes from) is stored +directly alongside libreboot and its GRUB payload executable, inside the flash +chip. In context, this means that installing distributions and managing them is +handled slightly differently compared to traditional BIOS systems. + +A libreboot (or coreboot) ROM image is not simply "flat"; there is an actual +filesystem inside called CBFS (coreboot filesystem). A utility called 'cbfstool' +allows you to change the contents of the ROM image. In this case, libreboot is +configured such that the 'grub.cfg' and 'grubtest.cfg' files exist directly +inside CBFS instead of inside the GRUB payload 'memdisk' (which is itself stored +in CBFS). + +You can either modify the GRUB configuration stored in the flash chip, or you +can modify a GRUB configuration file on the main storage which the libreboot +GRUB payload will automatically search for. + +Here is an excellent writeup about CBFS (coreboot filesystem): +@uref{http://lennartb.home.xs4all.nl/coreboot/col5.html,http://lennartb.home.xs4all.nl/coreboot/col5.html}. + +@strong{This guide is *only* for the GRUB payload. If you use the depthcharge +payload, ignore this section entirely.} -If it does not work like you want it to, if you are unsure or sceptical in any way, don't despair: you have been wise and did not brick your device! Reboot and login the default way, and then modify your grubtest.cfg until you get it right! @strong{Do *not* proceed past this point unless you are 100% sure that your new configuration is safe (or desirable) to use.} +@menu +* Introduction - GRUB config:: 1st option - don't re-flash:: 2nd option - +* re-flash:: +@end menu -Now, we can easily and safely create a copy of grubtest.cfg, called grub.cfg. This will be the same except for one difference: the menuentry 'Switch to grub.cfg' is changed to 'Switch to grubtest.cfg' and, inside it, all instances of grub.cfg to grubtest.cfg. This is so that the main config still links (in the menu) to grubtest.cfg, so that you don't have to manually switch to it, in case you ever want to follow this guide again in the future (modifying the already modified config). Inside libreboot_util/cbfstool/@{armv7l i686 x86_64@}, we can do this with the following command:@* $ @strong{sed -e 's:(cbfsdisk)/grub.cfg:(cbfsdisk)/grubtest.cfg:g' -e 's:Switch to grub.cfg:Switch to grubtest.cfg:g' < grubtest.cfg > grub.cfg}@* Delete the grub.cfg that remained inside the ROM:@* $ @strong{./cbfstool libreboot.rom remove -n grub.cfg}@* Add the modified version that you just made:@* $ @strong{./cbfstool libreboot.rom add -n grub.cfg -f grub.cfg -t raw}@* +@node Introduction - GRUB config @subsubsection Introduction Download the latest +release from @uref{http://libreboot.org/,http://libreboot.org/} @*@strong{If you +downloaded from git, refer to @ref{Get the full source code from +metadata,build_meta} before continuing.} + +There are several advantages to modifying the GRUB configuration stored in CBFS, +but this also means that you have to flash a new libreboot ROM image on your +system (some users feel intimidated by this, to say the least). Doing so can be +risky if not handled correctly, because it can result in a bricked system +(recovery is easy if you have the @ref{How to program an SPI flash chip with +BeagleBone Black,equipment} for it, but most people don't). If you aren't up to +that then don't worry; it is possible to use a custom GRUB menu without flashing +a new image, by loading a GRUB configuration from a partition on the main +storage instead. + +@node 1st option - don't re-flash @subsubsection 1st option: don't re-flash By +default, GRUB in libreboot is configured to scan all partitions on the main +storage for /boot/grub/libreboot_grub.cfg or /grub/libreboot_grub.cfg(for +systems where /boot is on a dedicated partition), and then use it automatically. + +Simply create your custom GRUB configuration and save it to +@strong{/boot/grub/libreboot_grub.cfg} on the running system. The next time you +boot, GRUB (in libreboot) will automatically switch to this configuration file. +@strong{This means that you do not have to re-flash, recompile or otherwise +modify libreboot at all!} + +Ideally, your distribution should automatically generate a libreboot_grub.cfg +file that is written specifically under the assumption that it will be read and +used on a libreboot system that uses GRUB as a payload. If your distribution +does not do this, then you can try to add that feature yourself or politely ask +someone involved with or otherwise knowledgeable about the distribution to do it +for you. The libreboot_grub.cfg could either contain the full configuration, or +it could chainload another GRUB ELF executable (built to be used as a coreboot +payload) that is located in a partition on the main storage. + +If you want to adapt a copy of the existing @emph{libreboot} GRUB configuration +and use that for the libreboot_grub.cfg file, then follow @ref{Acquire the +necessary utilities,tools}, @ref{Acquiring the correct ROM image,rom} and +@ref{Extract grubtestcfg from the ROM image,extract_testconfig} to get the +@strong{@emph{grubtest.cfg}}. Rename @strong{@emph{grubtest.cfg}} to +@strong{@emph{libreboot_grub.cfg}} and save it to @strong{@emph{/boot/grub/}} on +the running system where it is intended to be used. Modify the file at that +location however you see fit, and then stop reading this guide (the rest of this +page is irrelevant to you); @strong{in libreboot_grub.cfg on disk, if you are +adapting it based on grub.cfg from CBFS then remove the check for +libreboot_grub.cfg otherwise it will loop.}. + +This is all well and good, but what should you actually put in your GRUB +configuration file? Read @ref{Writing a GRUB configuration file,grub_config} for +more information. + + +@node 2nd option - re-flash @subsubsection 2nd option: re-flash You can modify +what is stored inside the flash chip quite easily. Read on to find out how. -Now you have a modified ROM. Once more, refer to @uref{http://libreboot.org/install/index.html#flashrom,http://libreboot.org/install/index.html#flashrom}. Cd to the libreboot_util directory and update the flash chip contents:@* # @strong{./flash update libreboot.rom}@* And wait for the "Verifying flash... VERIFIED." Once you have done that, shut down and then boot up with your new configuration. +@menu +* Acquire the necessary utilities:: Acquiring the correct ROM image:: Extract +* grubtestcfg from the ROM image:: Re-insert the modified grubtestcfg into the +* ROM image:: Testing:: Final steps:: +@end menu -When done, delete GRUB (remember, we only needed it for the @emph{grub-mkpasswd-pbkdf2} utility; GRUB is already part of libreboot, flashed alongside it as a @emph{payload}):@* # @strong{pacman -R grub} +@node Acquire the necessary utilities @ifinfo @subsubheading Acquire the +necessary utilities @end ifinfo Use @strong{@emph{cbfstool}} and +@strong{@emph{flashrom}}. There are available in the @emph{libreboot_util} +release archive, or they can be compiled (see @ref{How to build +flashrom,build_flashrom}). Flashrom is also available from the repositories:@* # +@strong{pacman -S flashrom} -If you followed all that correctly, you should now have a fully encrypted Parabola installation. Refer to the wiki for how to do the rest. -@node Bonus Using a key file to unlock /boot/ -@subsubsection Bonus: Using a key file to unlock /boot/ -By default, you will have to enter your LUKS passphrase twice; once in GRUB, and once when booting the kernel. GRUB unlocks the encrypted partition and then loads the kernel, but the kernel is not aware of the fact that it is being loaded from an encrypted volume. Therefore, you will be asked to enter your passphrase a second time. A workaround is to put a keyfile inside initramfs, with instructions for the kernel to use it when booting. This is safe, because /boot/ is encrypted (otherwise, putting a keyfile inside initramfs would be a bad idea).@* Boot up and login as root or your user. Then generate the key file:@* # @strong{dd bs=512 count=4 if=/dev/urandom of=/etc/mykeyfile iflag=fullblock}@* Insert it into the luks volume:@* # @strong{cryptsetup luksAddKey /dev/sdX /etc/mykeyfile}@* and enter your LUKS passphrase when prompted. Add the keyfile to the initramfs by adding it to FILES in /etc/mkinitcpio.conf. For example:@* # @strong{FILES="/etc/mykeyfile"}@* Create the initramfs image from scratch:@* # @strong{mkinitcpio -p linux-libre}@* # @strong{mkinitcpio -p linux-libre-lts}@* # @strong{mkinitcpio -p linux-libre-grsec}@* Add the following to your grub.cfg - you are now able to do that, see above! -, or add it in the kernel command line for GRUB:@* # @strong{cryptkey=rootfs:/etc/mykeyfile}@* @* You can also place this inside the grub.cfg that exists in CBFS: @ref{How to replace the default GRUB configuration file on a libreboot system,grub_cbfs}. +@node Acquiring the correct ROM image @ifinfo @subsubheading Acquiring the +correct ROM image @end ifinfo You can either work directly with one of the ROM +images already included in the libreboot ROM archives, or re-use the ROM that +you have currently flashed. For the purpose of this tutorial it is assumed that +your ROM image file is named @emph{libreboot.rom}, so please make sure to adapt. -@node Further security tips -@subsubsection Further security tips -@uref{https://wiki.archlinux.org/index.php/Security,https://wiki.archlinux.org/index.php/Security}.@* @uref{https://wiki.parabolagnulinux.org/User:GNUtoo/laptop,https://wiki.parabolagnulinux.org/User:GNUtoo/laptop} +ROM images are included pre-compiled in libreboot. You can also dump your +current firmware, using flashrom:@* $ @strong{sudo flashrom -p internal -r +libreboot.rom}@* # @strong{flashrom -p internal -r libreboot.rom}@* If you are +told to specify the chip, add the option @strong{-c @{your chip@}} to the +command, for example:@* # @strong{flashrom -c MX25L6405 -p internal -r +libreboot.rom} -@node Troubleshooting Parabola -@subsubsection Troubleshooting Parabola -A user reported issues when booting with a docking station attached on an X200, when decrypting the disk in GRUB. The error @emph{AHCI transfer timed out} was observed. The workaround was to remove the docking station. +@node Extract grubtestcfg from the ROM image @ifinfo @subsubheading Extract +grubtest.cfg from the ROM image @end ifinfo You can check the contents of the +ROM image, inside CBFS:@* @strong{$ cd .../libreboot_util/cbfstool} @strong{$ +./cbfstool libreboot.rom print} -Further investigation revealed that it was the DVD drive causing problems. Removing that worked around the issue. +The files @emph{grub.cfg} and @emph{grubtest.cfg} should be present. grub.cfg is +loaded by default, with a menuentry for switching to grubtest.cfg. In this +tutorial, you will first modify and test @emph{grubtest.cfg}. This is to reduce +the possibility of bricking your device, so DO NOT SKIP THIS! -@verbatim +Extract grubtest.cfg from the ROM image:@* @strong{$ ./cbfstool libreboot.rom +extract -n grubtest.cfg -f grubtest.cfg} -"sudo wodim -prcap" shows information about the drive: -Device was not specified. Trying to find an appropriate drive... -Detected CD-R drive: /dev/sr0 -Using /dev/cdrom of unknown capabilities -Device type : Removable CD-ROM -Version : 5 -Response Format: 2 -Capabilities : -Vendor_info : 'HL-DT-ST' -Identification : 'DVDRAM GU10N ' -Revision : 'MX05' -Device seems to be: Generic mmc2 DVD-R/DVD-RW. +Modify the grubtest.cfg accordingly. -Drive capabilities, per MMC-3 page 2A: +This is all well and good, but what should you actually put in your GRUB +configuration file? Read @ref{Writing a GRUB configuration file,grub_config} for +more information. - Does read CD-R media - Does write CD-R media - Does read CD-RW media - Does write CD-RW media - Does read DVD-ROM media - Does read DVD-R media - Does write DVD-R media - Does read DVD-RAM media - Does write DVD-RAM media - Does support test writing - - Does read Mode 2 Form 1 blocks - Does read Mode 2 Form 2 blocks - Does read digital audio blocks - Does restart non-streamed digital audio reads accurately - Does support Buffer-Underrun-Free recording - Does read multi-session CDs - Does read fixed-packet CD media using Method 2 - Does not read CD bar code - Does not read R-W subcode information - Does read raw P-W subcode data from lead in - Does return CD media catalog number - Does return CD ISRC information - Does support C2 error pointers - Does not deliver composite A/V data - - Does play audio CDs - Number of volume control levels: 256 - Does support individual volume control setting for each channel - Does support independent mute setting for each channel - Does not support digital output on port 1 - Does not support digital output on port 2 - - Loading mechanism type: tray - Does support ejection of CD via START/STOP command - Does not lock media on power up via prevent jumper - Does allow media to be locked in the drive via PREVENT/ALLOW command - Is not currently in a media-locked state - Does not support changing side of disk - Does not have load-empty-slot-in-changer feature - Does not support Individual Disk Present feature - - Maximum read speed: 4234 kB/s (CD 24x, DVD 3x) - Current read speed: 4234 kB/s (CD 24x, DVD 3x) - Maximum write speed: 4234 kB/s (CD 24x, DVD 3x) - Current write speed: 4234 kB/s (CD 24x, DVD 3x) - Rotational control selected: CLV/PCAV - Buffer size in KB: 1024 - Copy management revision supported: 1 - Number of supported write speeds: 4 - Write speed # 0: 4234 kB/s CLV/PCAV (CD 24x, DVD 3x) - Write speed # 1: 2822 kB/s CLV/PCAV (CD 16x, DVD 2x) - Write speed # 2: 1764 kB/s CLV/PCAV (CD 10x, DVD 1x) - Write speed # 3: 706 kB/s CLV/PCAV (CD 4x, DVD 0x) - -Supported CD-RW media types according to MMC-4 feature 0x37: - Does write multi speed CD-RW media - Does write high speed CD-RW media - Does write ultra high speed CD-RW media - Does not write ultra high speed+ CD-RW media -@end verbatim +@node Re-insert the modified grubtestcfg into the ROM image @ifinfo +@subsubheading Re-insert the modified grubtest.cfg into the ROM image @end +ifinfo Once your grubtest.cfg is modified and saved, delete the unmodified +config from the ROM image:@* @strong{$ ./cbfstool libreboot.rom remove -n +grubtest.cfg} +Next, insert the modified version:@* @strong{$ ./cbfstool libreboot.rom add -n +grubtest.cfg -f grubtest.cfg -t raw} +@node Testing @ifinfo @subsubheading Testing @end ifinfo @strong{Now you have a +modified ROM. Refer back to @ref{How to update/install,flashrom} for information +on how to flash it.@* $ @strong{cd /libreboot_util} # @strong{./flash update +libreboot.rom}@* Ocassionally, coreboot changes the name of a given board. If +flashrom complains about a board mismatch, but you are sure that you chose the +correct ROM image, then run this alternative command:@* # @strong{./flash +forceupdate libreboot.rom}@* You should see @strong{"Verifying flash... +VERIFIED."} written at the end of the flashrom output. Once you have done that, +shut down and then boot up with your new test configuration.} -@node Configuring Parabola post-install -@subsection Configuring Parabola (post-install) -Post-installation configuration steps for Parabola GNU/Linux-libre. Parabola is extremely flexible; this is just an example. +Choose (in GRUB) the menu entry that switches to grubtest.cfg. If it works, then +your config is safe and you can continue below. -While not strictly related to the libreboot project, this guide is intended to be useful for those interested in installing Parabola on their libreboot system. +@strong{If it does not work like you want it to, if you are unsure or sceptical +in any way, then re-do the steps above until you get it right! Do *not* proceed +past this point unless you are 100% sure that your new configuration is safe (or +desirable) to use.} -It details configuration steps that I took after installing the base system, as a follow up to @ref{Installing Parabola GNU/Linux-libre with full disk encryption,encrypted_parabola}. This guide is likely to become obsolete at a later date (due to the volatile 'rolling-release' model that Arch/Parabola both use), but attempts will be made to maintain it. -@strong{This guide was valid on 2014-09-21. If you see any changes that should to be made at the present date, please get in touch with the libreboot project!} +@node Final steps @ifinfo @subsubheading Final steps @end ifinfo When you are +satisfied booting from grubtest.cfg, you can create a copy of grubtest.cfg, +called grub.cfg. This is the same except for one difference: the menuentry +'Switch to grub.cfg' will be changed to 'Switch to grubtest.cfg' and inside it, +all instances of grub.cfg to grubtest.cfg. This is so that the main config still +links (in the menu) to grubtest.cfg, so that you don't have to manually switch +to it, in case you ever want to follow this guide again in the future (modifying +the already modified config). From /libreboot_util/cbfstool, do:@* $ @strong{sed +-e 's:(cbfsdisk)/grub.cfg:(cbfsdisk)/grubtest.cfg:g' -e 's:Switch to +grub.cfg:Switch to grubtest.cfg:g' < grubtest.cfg > grub.cfg}@* -You do not necessarily have to follow this guide word-for-word; @emph{parabola} is extremely flexible. The aim here is to provide a common setup that most users will be happy with. While Parabola can seem daunting at first glance (especially for new GNU/Linux users), with a simple guide it can provide all the same usability as Trisquel, without hiding any details from the user. +Delete the grub.cfg that remained inside the ROM:@* @strong{$ ./cbfstool +libreboot.rom remove -n grub.cfg} -Paradoxically, as you get more advanced Parabola can actually become @emph{easier to use} when you want to set up your system in a special way compared to what most distributions provide. You will find over time that other distributions tend to @emph{get in your way}. +Add the modified version that you just made:@* @strong{$ ./cbfstool +libreboot.rom add -n grub.cfg -f grub.cfg -t raw} -@strong{This guide assumes that you already have Parabola installed. If you have not yet installed Parabola, then @ref{Installing Parabola GNU/Linux-libre with full disk encryption,this guide} is highly recommended!} +@strong{Now you have a modified ROM. Again, refer back to @ref{How to +update/install,flashrom} for information on how to flash it. It's the same +method as you used before. Shut down and then boot up with your new +configuration.} -A lot of the steps in this guide will refer to the Arch wiki. Arch is the upstream distribution that Parabola uses. Most of this guide will also tell you to read wiki articles, other pages, manuals, and so on. In general it tries to cherry pick the most useful information but nonetheless you are encouraged to learn as much as possible. @strong{It might take you a few days to fully install your system how you like, depending on how much you need to read. Patience is key, especially for new users}. -The Arch wiki will sometimes use bad language, such as calling the whole system Linux, using the term open-source (or closed-source), and it will sometimes recommend the use of proprietary software. You need to be careful about this when reading anything on the Arch wiki. +@node Writing a GRUB configuration file @subsection Writing a GRUB configuration +file This section is for those systems which use the GRUB payload. @strong{If +your system uses the depthcharge payload, ignore this section.} -Some of these steps require internet access. I'll go into networking later but for now, I just connected my system to a switch and did:@* # @strong{systemctl start dhcpcd.service}@* You can stop it later by running:@* # @strong{systemctl stop dhcpcd.service}@* For most people this should be enough, but if you don't have DHCP on your network then you should setup your network connection first:@* @ref{Setup a network connection in Parabola,Setup network connection in Parabola} +The following are some common examples of ways in which the grubtest.cfg file +can be modified. @c NOTE: These > The following @menu -* Configure pacman:: -* Updating Parabola:: -* Maintaining Parabola:: -* your-freedom:: -* Add a user:: -* systemd:: -* Interesting repositories:: -* Setup a network connection in Parabola:: -* System Maintenance:: -* Configuring the desktop:: +* Obvious option:: Don't even modify the built-in grub.cfg Trisquel with full +* disk encryption - custom partition layout:: Parabola GNU/Linux-libre:: @end menu -@node Configure pacman -@subsubsection Configure pacman -pacman (@strong{pac}kage @strong{man}ager) is the name of the package management system in Arch, which Parabola (as a deblobbed parallel effort) also uses. Like with 'apt-get' on debian-based systems like Trisquel, this can be used to add/remove and update the software on your computer. -Based on @uref{https://wiki.parabolagnulinux.org/Installation_Guide#Configure_pacman,https://wiki.parabolagnulinux.org/Installation_Guide#Configure_pacman} and from reading @uref{https://wiki.archlinux.org/index.php/Pacman,https://wiki.archlinux.org/index.php/Pacman} (make sure to read and understand this, it's very important) and @uref{https://wiki.parabolagnulinux.org/Official_Repositories,https://wiki.parabolagnulinux.org/Official_Repositories} +@node Obvious option @subsubsection Obvious option: don't even modify the +built-in grub.cfg Use the menuentry that says something like @emph{Search for +GRUB outside CBFS}. Assuming that you have a grub.cfg file at /boot/grub/ in +your installed distro, this will generate a new menuentry in the GRUB menu. Use +that to boot. -@node Updating Parabola -@subsubsection Updating Parabola -In the end, I didn't change my configuration for pacman. When you are updating, resync with the latest package names/versions:@* # @strong{pacman -Syy}@* (according to the wiki, -Syy is better than Sy because it refreshes the package list even if it appears to be up to date, which can be useful when switching to another mirror).@* Then, update the system:@* # @strong{pacman -Syu} +Then do this as root:@* $ @strong{cd /boot/grub/}@* $ @strong{ln -s grub.cfg +libreboot_grub.cfg} -@strong{Before installing packages with 'pacman -S', always update first, using the notes above.} +After that, your system should then boot automatically. -Keep an eye out on the output, or read it in /var/log/pacman.log. Sometimes, pacman will show messages about maintenance steps that you will need to perform with certain files (typically configurations) after the update. Also, you should check both the Parabola and Arch home pages to see if they mention any issues. If a new kernel is insta